Merge branch 'systemport-next'
Florian Fainelli says: ==================== net: systemport: PM and Wake-on-LAN support This patchset brings Power Management and Wake-on-LAN support to the Broadcom SYSTEM PORT driver. S2 and S3 modes are supported, while we only support Wake-on-LAN using MagicPackets for now ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
Коммит
081a20ffcc
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@ -4,7 +4,8 @@ Required properties:
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- compatible: should be one of "brcm,systemport-v1.00" or "brcm,systemport"
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- reg: address and length of the register set for the device.
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- interrupts: interrupts for the device, first cell must be for the the rx
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interrupts, and the second cell should be for the transmit queues
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interrupts, and the second cell should be for the transmit queues. An
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optional third interrupt cell for Wake-on-LAN can be specified
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- local-mac-address: Ethernet MAC address (48 bits) of this adapter
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- phy-mode: Should be a string describing the PHY interface to the
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Ethernet switch/PHY, see Documentation/devicetree/bindings/net/ethernet.txt
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@ -124,9 +124,9 @@ static int bcm_sysport_set_rx_csum(struct net_device *dev,
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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u32 reg;
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priv->rx_csum_en = !!(wanted & NETIF_F_RXCSUM);
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priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
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reg = rxchk_readl(priv, RXCHK_CONTROL);
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if (priv->rx_csum_en)
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if (priv->rx_chk_en)
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reg |= RXCHK_EN;
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else
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reg &= ~RXCHK_EN;
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@ -134,7 +134,7 @@ static int bcm_sysport_set_rx_csum(struct net_device *dev,
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/* If UniMAC forwards CRC, we need to skip over it to get
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* a valid CHK bit to be set in the per-packet status word
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*/
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if (priv->rx_csum_en && priv->crc_fwd)
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if (priv->rx_chk_en && priv->crc_fwd)
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reg |= RXCHK_SKIP_FCS;
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else
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reg &= ~RXCHK_SKIP_FCS;
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@ -384,6 +384,64 @@ static void bcm_sysport_get_stats(struct net_device *dev,
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}
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}
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static void bcm_sysport_get_wol(struct net_device *dev,
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struct ethtool_wolinfo *wol)
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{
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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u32 reg;
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wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
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wol->wolopts = priv->wolopts;
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if (!(priv->wolopts & WAKE_MAGICSECURE))
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return;
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/* Return the programmed SecureOn password */
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reg = umac_readl(priv, UMAC_PSW_MS);
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put_unaligned_be16(reg, &wol->sopass[0]);
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reg = umac_readl(priv, UMAC_PSW_LS);
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put_unaligned_be32(reg, &wol->sopass[2]);
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}
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static int bcm_sysport_set_wol(struct net_device *dev,
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struct ethtool_wolinfo *wol)
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{
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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struct device *kdev = &priv->pdev->dev;
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u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
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if (!device_can_wakeup(kdev))
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return -ENOTSUPP;
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if (wol->wolopts & ~supported)
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return -EINVAL;
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/* Program the SecureOn password */
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if (wol->wolopts & WAKE_MAGICSECURE) {
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umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
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UMAC_PSW_MS);
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umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
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UMAC_PSW_LS);
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}
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/* Flag the device and relevant IRQ as wakeup capable */
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if (wol->wolopts) {
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device_set_wakeup_enable(kdev, 1);
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enable_irq_wake(priv->wol_irq);
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priv->wol_irq_disabled = 0;
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} else {
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device_set_wakeup_enable(kdev, 0);
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/* Avoid unbalanced disable_irq_wake calls */
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if (!priv->wol_irq_disabled)
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disable_irq_wake(priv->wol_irq);
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priv->wol_irq_disabled = 1;
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}
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priv->wolopts = wol->wolopts;
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return 0;
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}
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static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
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{
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dev_kfree_skb_any(cb->skb);
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@ -692,6 +750,20 @@ static int bcm_sysport_poll(struct napi_struct *napi, int budget)
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return work_done;
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}
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static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
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{
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u32 reg;
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/* Stop monitoring MPD interrupt */
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intrl2_0_mask_set(priv, INTRL2_0_MPD);
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/* Clear the MagicPacket detection logic */
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reg = umac_readl(priv, UMAC_MPD_CTRL);
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reg &= ~MPD_EN;
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umac_writel(priv, reg, UMAC_MPD_CTRL);
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netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
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}
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/* RX and misc interrupt routine */
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static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
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@ -722,6 +794,11 @@ static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
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if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
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bcm_sysport_tx_reclaim_all(priv);
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if (priv->irq0_stat & INTRL2_0_MPD) {
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netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
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bcm_sysport_resume_from_wol(priv);
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}
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return IRQ_HANDLED;
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}
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@ -757,6 +834,15 @@ static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
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{
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struct bcm_sysport_priv *priv = dev_id;
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pm_wakeup_event(&priv->pdev->dev, 0);
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return IRQ_HANDLED;
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}
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static int bcm_sysport_insert_tsb(struct sk_buff *skb, struct net_device *dev)
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{
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struct sk_buff *nskb;
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@ -1236,15 +1322,15 @@ static void bcm_sysport_set_rx_mode(struct net_device *dev)
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}
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static inline void umac_enable_set(struct bcm_sysport_priv *priv,
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unsigned int enable)
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u32 mask, unsigned int enable)
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{
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u32 reg;
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reg = umac_readl(priv, UMAC_CMD);
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if (enable)
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reg |= CMD_RX_EN | CMD_TX_EN;
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reg |= mask;
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else
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reg &= ~(CMD_RX_EN | CMD_TX_EN);
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reg &= ~mask;
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umac_writel(priv, reg, UMAC_CMD);
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/* UniMAC stops on a packet boundary, wait for a full-sized packet
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@ -1295,11 +1381,35 @@ static void topctrl_flush(struct bcm_sysport_priv *priv)
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topctrl_writel(priv, 0, TX_FLUSH_CNTL);
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}
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static void bcm_sysport_netif_start(struct net_device *dev)
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{
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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/* Enable NAPI */
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napi_enable(&priv->napi);
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phy_start(priv->phydev);
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/* Enable TX interrupts for the 32 TXQs */
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intrl2_1_mask_clear(priv, 0xffffffff);
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/* Last call before we start the real business */
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netif_tx_start_all_queues(dev);
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}
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static void rbuf_init(struct bcm_sysport_priv *priv)
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{
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u32 reg;
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reg = rbuf_readl(priv, RBUF_CONTROL);
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reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
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rbuf_writel(priv, reg, RBUF_CONTROL);
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}
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static int bcm_sysport_open(struct net_device *dev)
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{
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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unsigned int i;
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u32 reg;
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int ret;
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/* Reset UniMAC */
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@ -1313,12 +1423,10 @@ static int bcm_sysport_open(struct net_device *dev)
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topctrl_flush(priv);
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/* Disable the UniMAC RX/TX */
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umac_enable_set(priv, 0);
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umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
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/* Enable RBUF 2bytes alignment and Receive Status Block */
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reg = rbuf_readl(priv, RBUF_CONTROL);
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reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
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rbuf_writel(priv, reg, RBUF_CONTROL);
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rbuf_init(priv);
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/* Set maximum frame length */
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umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
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@ -1394,19 +1502,10 @@ static int bcm_sysport_open(struct net_device *dev)
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if (ret)
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goto out_clear_rx_int;
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/* Enable NAPI */
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napi_enable(&priv->napi);
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/* Turn on UniMAC TX/RX */
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umac_enable_set(priv, 1);
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umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
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phy_start(priv->phydev);
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/* Enable TX interrupts for the 32 TXQs */
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intrl2_1_mask_clear(priv, 0xffffffff);
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/* Last call before we start the real business */
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netif_tx_start_all_queues(dev);
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bcm_sysport_netif_start(dev);
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return 0;
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@ -1425,12 +1524,9 @@ out_phy_disconnect:
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return ret;
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}
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static int bcm_sysport_stop(struct net_device *dev)
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static void bcm_sysport_netif_stop(struct net_device *dev)
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{
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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unsigned int i;
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u32 reg;
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int ret;
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/* stop all software from updating hardware */
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netif_tx_stop_all_queues(dev);
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@ -1442,11 +1538,18 @@ static int bcm_sysport_stop(struct net_device *dev)
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intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
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intrl2_1_mask_set(priv, 0xffffffff);
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intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
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}
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static int bcm_sysport_stop(struct net_device *dev)
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{
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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unsigned int i;
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int ret;
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bcm_sysport_netif_stop(dev);
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/* Disable UniMAC RX */
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reg = umac_readl(priv, UMAC_CMD);
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reg &= ~CMD_RX_EN;
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umac_writel(priv, reg, UMAC_CMD);
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umac_enable_set(priv, CMD_RX_EN, 0);
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ret = tdma_enable_set(priv, 0);
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if (ret) {
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@ -1464,9 +1567,7 @@ static int bcm_sysport_stop(struct net_device *dev)
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}
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/* Disable UniMAC TX */
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reg = umac_readl(priv, UMAC_CMD);
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reg &= ~CMD_TX_EN;
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umac_writel(priv, reg, UMAC_CMD);
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umac_enable_set(priv, CMD_TX_EN, 0);
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/* Free RX/TX rings SW structures */
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for (i = 0; i < dev->num_tx_queues; i++)
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@ -1492,6 +1593,8 @@ static struct ethtool_ops bcm_sysport_ethtool_ops = {
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.get_strings = bcm_sysport_get_strings,
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.get_ethtool_stats = bcm_sysport_get_stats,
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.get_sset_count = bcm_sysport_get_sset_count,
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.get_wol = bcm_sysport_get_wol,
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.set_wol = bcm_sysport_set_wol,
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};
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static const struct net_device_ops bcm_sysport_netdev_ops = {
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@ -1533,6 +1636,7 @@ static int bcm_sysport_probe(struct platform_device *pdev)
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priv->irq0 = platform_get_irq(pdev, 0);
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priv->irq1 = platform_get_irq(pdev, 1);
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priv->wol_irq = platform_get_irq(pdev, 2);
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if (priv->irq0 <= 0 || priv->irq1 <= 0) {
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dev_err(&pdev->dev, "invalid interrupts\n");
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ret = -EINVAL;
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@ -1585,6 +1689,13 @@ static int bcm_sysport_probe(struct platform_device *pdev)
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dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
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NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
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/* Request the WOL interrupt and advertise suspend if available */
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priv->wol_irq_disabled = 1;
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ret = devm_request_irq(&pdev->dev, priv->wol_irq,
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bcm_sysport_wol_isr, 0, dev->name, priv);
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if (!ret)
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device_set_wakeup_capable(&pdev->dev, 1);
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/* Set the needed headroom once and for all */
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BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
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dev->needed_headroom += sizeof(struct bcm_tsb);
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@ -1631,6 +1742,208 @@ static int bcm_sysport_remove(struct platform_device *pdev)
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
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{
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struct net_device *ndev = priv->netdev;
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unsigned int timeout = 1000;
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u32 reg;
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/* Password has already been programmed */
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reg = umac_readl(priv, UMAC_MPD_CTRL);
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reg |= MPD_EN;
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reg &= ~PSW_EN;
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if (priv->wolopts & WAKE_MAGICSECURE)
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reg |= PSW_EN;
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umac_writel(priv, reg, UMAC_MPD_CTRL);
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/* Make sure RBUF entered WoL mode as result */
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do {
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reg = rbuf_readl(priv, RBUF_STATUS);
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if (reg & RBUF_WOL_MODE)
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break;
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udelay(10);
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} while (timeout-- > 0);
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/* Do not leave the UniMAC RBUF matching only MPD packets */
|
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if (!timeout) {
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reg = umac_readl(priv, UMAC_MPD_CTRL);
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reg &= ~MPD_EN;
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umac_writel(priv, reg, UMAC_MPD_CTRL);
|
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netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
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return -ETIMEDOUT;
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}
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|
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/* UniMAC receive needs to be turned on */
|
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umac_enable_set(priv, CMD_RX_EN, 1);
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|
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/* Enable the interrupt wake-up source */
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intrl2_0_mask_clear(priv, INTRL2_0_MPD);
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|
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netif_dbg(priv, wol, ndev, "entered WOL mode\n");
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|
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return 0;
|
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}
|
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|
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static int bcm_sysport_suspend(struct device *d)
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{
|
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struct net_device *dev = dev_get_drvdata(d);
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struct bcm_sysport_priv *priv = netdev_priv(dev);
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unsigned int i;
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int ret = 0;
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u32 reg;
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if (!netif_running(dev))
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return 0;
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|
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bcm_sysport_netif_stop(dev);
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|
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phy_suspend(priv->phydev);
|
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|
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netif_device_detach(dev);
|
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|
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/* Disable UniMAC RX */
|
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umac_enable_set(priv, CMD_RX_EN, 0);
|
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|
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ret = rdma_enable_set(priv, 0);
|
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if (ret) {
|
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netdev_err(dev, "RDMA timeout!\n");
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return ret;
|
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}
|
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|
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/* Disable RXCHK if enabled */
|
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if (priv->rx_chk_en) {
|
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reg = rxchk_readl(priv, RXCHK_CONTROL);
|
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reg &= ~RXCHK_EN;
|
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rxchk_writel(priv, reg, RXCHK_CONTROL);
|
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}
|
||||
|
||||
/* Flush RX pipe */
|
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if (!priv->wolopts)
|
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topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
|
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|
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ret = tdma_enable_set(priv, 0);
|
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if (ret) {
|
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netdev_err(dev, "TDMA timeout!\n");
|
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return ret;
|
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}
|
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|
||||
/* Wait for a packet boundary */
|
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usleep_range(2000, 3000);
|
||||
|
||||
umac_enable_set(priv, CMD_TX_EN, 0);
|
||||
|
||||
topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
|
||||
|
||||
/* Free RX/TX rings SW structures */
|
||||
for (i = 0; i < dev->num_tx_queues; i++)
|
||||
bcm_sysport_fini_tx_ring(priv, i);
|
||||
bcm_sysport_fini_rx_ring(priv);
|
||||
|
||||
/* Get prepared for Wake-on-LAN */
|
||||
if (device_may_wakeup(d) && priv->wolopts)
|
||||
ret = bcm_sysport_suspend_to_wol(priv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int bcm_sysport_resume(struct device *d)
|
||||
{
|
||||
struct net_device *dev = dev_get_drvdata(d);
|
||||
struct bcm_sysport_priv *priv = netdev_priv(dev);
|
||||
unsigned int i;
|
||||
u32 reg;
|
||||
int ret;
|
||||
|
||||
if (!netif_running(dev))
|
||||
return 0;
|
||||
|
||||
/* We may have been suspended and never received a WOL event that
|
||||
* would turn off MPD detection, take care of that now
|
||||
*/
|
||||
bcm_sysport_resume_from_wol(priv);
|
||||
|
||||
/* Initialize both hardware and software ring */
|
||||
for (i = 0; i < dev->num_tx_queues; i++) {
|
||||
ret = bcm_sysport_init_tx_ring(priv, i);
|
||||
if (ret) {
|
||||
netdev_err(dev, "failed to initialize TX ring %d\n",
|
||||
i);
|
||||
goto out_free_tx_rings;
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize linked-list */
|
||||
tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
|
||||
|
||||
/* Initialize RX ring */
|
||||
ret = bcm_sysport_init_rx_ring(priv);
|
||||
if (ret) {
|
||||
netdev_err(dev, "failed to initialize RX ring\n");
|
||||
goto out_free_rx_ring;
|
||||
}
|
||||
|
||||
netif_device_attach(dev);
|
||||
|
||||
/* Enable RX interrupt and TX ring full interrupt */
|
||||
intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
|
||||
|
||||
/* RX pipe enable */
|
||||
topctrl_writel(priv, 0, RX_FLUSH_CNTL);
|
||||
|
||||
ret = rdma_enable_set(priv, 1);
|
||||
if (ret) {
|
||||
netdev_err(dev, "failed to enable RDMA\n");
|
||||
goto out_free_rx_ring;
|
||||
}
|
||||
|
||||
/* Enable rxhck */
|
||||
if (priv->rx_chk_en) {
|
||||
reg = rxchk_readl(priv, RXCHK_CONTROL);
|
||||
reg |= RXCHK_EN;
|
||||
rxchk_writel(priv, reg, RXCHK_CONTROL);
|
||||
}
|
||||
|
||||
rbuf_init(priv);
|
||||
|
||||
/* Set maximum frame length */
|
||||
umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
|
||||
|
||||
/* Set MAC address */
|
||||
umac_set_hw_addr(priv, dev->dev_addr);
|
||||
|
||||
umac_enable_set(priv, CMD_RX_EN, 1);
|
||||
|
||||
/* TX pipe enable */
|
||||
topctrl_writel(priv, 0, TX_FLUSH_CNTL);
|
||||
|
||||
umac_enable_set(priv, CMD_TX_EN, 1);
|
||||
|
||||
ret = tdma_enable_set(priv, 1);
|
||||
if (ret) {
|
||||
netdev_err(dev, "TDMA timeout!\n");
|
||||
goto out_free_rx_ring;
|
||||
}
|
||||
|
||||
phy_resume(priv->phydev);
|
||||
|
||||
bcm_sysport_netif_start(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
out_free_rx_ring:
|
||||
bcm_sysport_fini_rx_ring(priv);
|
||||
out_free_tx_rings:
|
||||
for (i = 0; i < dev->num_tx_queues; i++)
|
||||
bcm_sysport_fini_tx_ring(priv, i);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
|
||||
bcm_sysport_suspend, bcm_sysport_resume);
|
||||
|
||||
static const struct of_device_id bcm_sysport_of_match[] = {
|
||||
{ .compatible = "brcm,systemport-v1.00" },
|
||||
{ .compatible = "brcm,systemport" },
|
||||
|
|
@ -1644,6 +1957,7 @@ static struct platform_driver bcm_sysport_driver = {
|
|||
.name = "brcm-systemport",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = bcm_sysport_of_match,
|
||||
.pm = &bcm_sysport_pm_ops,
|
||||
},
|
||||
};
|
||||
module_platform_driver(bcm_sysport_driver);
|
||||
|
|
|
|||
|
|
@ -246,6 +246,15 @@ struct bcm_rsb {
|
|||
#define MIB_RX_CNT_RST (1 << 0)
|
||||
#define MIB_RUNT_CNT_RST (1 << 1)
|
||||
#define MIB_TX_CNT_RST (1 << 2)
|
||||
|
||||
#define UMAC_MPD_CTRL 0x620
|
||||
#define MPD_EN (1 << 0)
|
||||
#define MSEQ_LEN_SHIFT 16
|
||||
#define MSEQ_LEN_MASK 0xff
|
||||
#define PSW_EN (1 << 27)
|
||||
|
||||
#define UMAC_PSW_MS 0x624
|
||||
#define UMAC_PSW_LS 0x628
|
||||
#define UMAC_MDF_CTRL 0x650
|
||||
#define UMAC_MDF_ADDR 0x654
|
||||
|
||||
|
|
@ -642,6 +651,7 @@ struct bcm_sysport_priv {
|
|||
struct platform_device *pdev;
|
||||
int irq0;
|
||||
int irq1;
|
||||
int wol_irq;
|
||||
|
||||
/* Transmit rings */
|
||||
struct bcm_sysport_tx_ring tx_rings[TDMA_NUM_RINGS];
|
||||
|
|
@ -664,10 +674,12 @@ struct bcm_sysport_priv {
|
|||
int old_duplex;
|
||||
|
||||
/* Misc fields */
|
||||
unsigned int rx_csum_en:1;
|
||||
unsigned int rx_chk_en:1;
|
||||
unsigned int tsb_en:1;
|
||||
unsigned int crc_fwd:1;
|
||||
u16 rev;
|
||||
u32 wolopts;
|
||||
unsigned int wol_irq_disabled:1;
|
||||
|
||||
/* MIB related fields */
|
||||
struct bcm_sysport_mib mib;
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче