powercap / RAPL: abstract per cpu type functions
RAPL implementations may vary slightly between Core and Atom CPUs. There are also potential differences among generations of CPUs within the family. This patch adds a per model structure to abstract the differences such that variations can be handled cleanly. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -188,6 +188,15 @@ struct rapl_package {
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*/
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struct list_head plist;
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};
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struct rapl_defaults {
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int (*check_unit)(struct rapl_package *rp, int cpu);
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void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
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u64 (*compute_time_window)(struct rapl_package *rp, u64 val,
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bool to_raw);
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};
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static struct rapl_defaults *rapl_defaults;
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#define PACKAGE_PLN_INT_SAVED BIT(0)
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#define MAX_PRIM_NAME (32)
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@ -946,16 +955,28 @@ static void package_power_limit_irq_restore(int package_id)
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wrmsr_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
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}
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static const struct rapl_defaults rapl_defaults_core = {
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};
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static const struct rapl_defaults rapl_defaults_atom = {
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};
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#define RAPL_CPU(_model, _ops) { \
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.vendor = X86_VENDOR_INTEL, \
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.family = 6, \
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.model = _model, \
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.driver_data = (kernel_ulong_t)&_ops, \
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}
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static const struct x86_cpu_id rapl_ids[] = {
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{ X86_VENDOR_INTEL, 6, 0x2a},/* Sandy Bridge */
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{ X86_VENDOR_INTEL, 6, 0x2d},/* Sandy Bridge EP */
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{ X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */
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{ X86_VENDOR_INTEL, 6, 0x3a},/* Ivy Bridge */
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{ X86_VENDOR_INTEL, 6, 0x3c},/* Haswell */
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{ X86_VENDOR_INTEL, 6, 0x3d},/* Broadwell */
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{ X86_VENDOR_INTEL, 6, 0x3f},/* Haswell */
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{ X86_VENDOR_INTEL, 6, 0x45},/* Haswell ULT */
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/* TODO: Add more CPU IDs after testing */
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RAPL_CPU(0x2a, rapl_defaults_core),/* Sandy Bridge */
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RAPL_CPU(0x2d, rapl_defaults_core),/* Sandy Bridge EP */
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RAPL_CPU(0x37, rapl_defaults_atom),/* Valleyview */
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RAPL_CPU(0x3a, rapl_defaults_core),/* Ivy Bridge */
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RAPL_CPU(0x3c, rapl_defaults_core),/* Haswell */
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RAPL_CPU(0x3d, rapl_defaults_core),/* Broadwell */
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RAPL_CPU(0x3f, rapl_defaults_core),/* Haswell */
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RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
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@ -1358,14 +1379,18 @@ static struct notifier_block rapl_cpu_notifier = {
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static int __init rapl_init(void)
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{
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int ret = 0;
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const struct x86_cpu_id *id;
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if (!x86_match_cpu(rapl_ids)) {
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id = x86_match_cpu(rapl_ids);
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if (!id) {
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pr_err("driver does not support CPU family %d model %d\n",
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boot_cpu_data.x86, boot_cpu_data.x86_model);
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return -ENODEV;
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}
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rapl_defaults = (struct rapl_defaults *)id->driver_data;
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cpu_notifier_register_begin();
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/* prevent CPU hotplug during detection */
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