perf cs-etm: Move mapping of Trace ID and cpu into helper function
The information to associate Trace ID and CPU will be changing. Drivers will start outputting this as a hardware ID packet in the data file which if present will be used in preference to the AUXINFO values. To prepare for this we provide a helper functions to do the individual ID mapping, and one to extract the IDs from the completed metadata blocks. Reviewed-by: James Clark <james.clark@arm.com> Signed-off-by: Mike Leach <mike.leach@linaro.org> Acked-by: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Darren Hart <darren@os.amperecomputing.com> Cc: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230331055645.26918-2-mike.leach@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Mike Leach
Arnaldo Carvalho de Melo
Родитель
84c3a2bb4c
Коммит
0927729555
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@ -7,9 +7,14 @@
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#ifndef _LINUX_CORESIGHT_PMU_H
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#define _LINUX_CORESIGHT_PMU_H
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#include <linux/bits.h>
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#define CORESIGHT_ETM_PMU_NAME "cs_etm"
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#define CORESIGHT_ETM_PMU_SEED 0x10
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/* CoreSight trace ID is currently the bottom 7 bits of the value */
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#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0)
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/*
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* Below are the definition of bit offsets for perf option, and works as
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* arbitrary values for all ETM versions.
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@ -148,7 +148,8 @@ static void cs_etm__print_auxtrace_info(u64 *val, int num)
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for (i = CS_HEADER_VERSION_MAX; cpu < num; cpu++) {
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if (version == 0)
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err = cs_etm__print_cpu_metadata_v0(val, &i);
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else if (version == 1)
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/* printing same for both, but value bit flags added on v2 */
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else if ((version == 1) || (version == 2))
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err = cs_etm__print_cpu_metadata_v1(val, &i);
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if (err)
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return;
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@ -196,6 +196,30 @@ int cs_etm__get_pid_fmt(u8 trace_chan_id, u64 *pid_fmt)
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return 0;
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}
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static int cs_etm__map_trace_id(u8 trace_chan_id, u64 *cpu_metadata)
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{
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struct int_node *inode;
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/* Get an RB node for this CPU */
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inode = intlist__findnew(traceid_list, trace_chan_id);
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/* Something went wrong, no need to continue */
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if (!inode)
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return -ENOMEM;
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/*
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* The node for that CPU should not be taken.
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* Back out if that's the case.
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*/
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if (inode->priv)
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return -EINVAL;
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/* All good, associate the traceID with the metadata pointer */
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inode->priv = cpu_metadata;
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return 0;
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}
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void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq,
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u8 trace_chan_id)
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{
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@ -2804,17 +2828,46 @@ static bool cs_etm__has_virtual_ts(u64 **metadata, int num_cpu)
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return true;
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}
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/* map trace ids to correct metadata block, from information in metadata */
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static int cs_etm__map_trace_ids_metadata(int num_cpu, u64 **metadata)
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{
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u64 cs_etm_magic;
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u8 trace_chan_id;
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int i, err;
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for (i = 0; i < num_cpu; i++) {
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cs_etm_magic = metadata[i][CS_ETM_MAGIC];
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switch (cs_etm_magic) {
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case __perf_cs_etmv3_magic:
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trace_chan_id = (u8)((metadata[i][CS_ETM_ETMTRACEIDR]) &
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CORESIGHT_TRACE_ID_VAL_MASK);
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break;
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case __perf_cs_etmv4_magic:
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case __perf_cs_ete_magic:
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trace_chan_id = (u8)((metadata[i][CS_ETMV4_TRCTRACEIDR]) &
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CORESIGHT_TRACE_ID_VAL_MASK);
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break;
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default:
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/* unknown magic number */
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return -EINVAL;
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}
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err = cs_etm__map_trace_id(trace_chan_id, metadata[i]);
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if (err)
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return err;
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}
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return 0;
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}
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int cs_etm__process_auxtrace_info_full(union perf_event *event,
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struct perf_session *session)
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{
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struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info;
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struct cs_etm_auxtrace *etm = NULL;
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struct int_node *inode;
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struct perf_record_time_conv *tc = &session->time_conv;
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int event_header_size = sizeof(struct perf_event_header);
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int total_size = auxtrace_info->header.size;
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int priv_size = 0;
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int num_cpu, trcidr_idx;
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int num_cpu;
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int err = 0;
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int i, j;
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u64 *ptr = NULL;
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@ -2853,23 +2906,13 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event,
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cs_etm__create_meta_blk(ptr, &i,
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CS_ETM_PRIV_MAX,
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CS_ETM_NR_TRC_PARAMS_V0);
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/* The traceID is our handle */
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trcidr_idx = CS_ETM_ETMTRACEIDR;
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} else if (ptr[i] == __perf_cs_etmv4_magic) {
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metadata[j] =
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cs_etm__create_meta_blk(ptr, &i,
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CS_ETMV4_PRIV_MAX,
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CS_ETMV4_NR_TRC_PARAMS_V0);
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/* The traceID is our handle */
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trcidr_idx = CS_ETMV4_TRCTRACEIDR;
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} else if (ptr[i] == __perf_cs_ete_magic) {
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metadata[j] = cs_etm__create_meta_blk(ptr, &i, CS_ETE_PRIV_MAX, -1);
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/* ETE shares first part of metadata with ETMv4 */
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trcidr_idx = CS_ETMV4_TRCTRACEIDR;
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} else {
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ui__error("CS ETM Trace: Unrecognised magic number %#"PRIx64". File could be from a newer version of perf.\n",
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ptr[i]);
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@ -2881,26 +2924,6 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event,
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err = -ENOMEM;
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goto err_free_metadata;
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}
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/* Get an RB node for this CPU */
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inode = intlist__findnew(traceid_list, metadata[j][trcidr_idx]);
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/* Something went wrong, no need to continue */
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if (!inode) {
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err = -ENOMEM;
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goto err_free_metadata;
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}
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/*
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* The node for that CPU should not be taken.
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* Back out if that's the case.
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*/
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if (inode->priv) {
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err = -EINVAL;
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goto err_free_metadata;
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}
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/* All good, associate the traceID with the metadata pointer */
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inode->priv = metadata[j];
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}
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/*
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@ -2994,6 +3017,11 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event,
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if (err)
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goto err_delete_thread;
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/* before aux records are queued, need to map metadata to trace IDs */
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err = cs_etm__map_trace_ids_metadata(num_cpu, metadata);
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if (err)
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goto err_delete_thread;
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err = cs_etm__queue_aux_records(session);
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if (err)
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goto err_delete_thread;
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@ -29,13 +29,17 @@ enum {
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/*
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* Update the version for new format.
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*
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* New version 1 format adds a param count to the per cpu metadata.
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* Version 1: format adds a param count to the per cpu metadata.
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* This allows easy adding of new metadata parameters.
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* Requires that new params always added after current ones.
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* Also allows client reader to handle file versions that are different by
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* checking the number of params in the file vs the number expected.
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*
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* Version 2: Drivers will use PERF_RECORD_AUX_OUTPUT_HW_ID to output
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* CoreSight Trace ID. ...TRACEIDR metadata will be set to legacy values
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* but with addition flags.
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*/
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#define CS_HEADER_CURRENT_VERSION 1
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#define CS_HEADER_CURRENT_VERSION 2
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/* Beginning of header common to both ETMv3 and V4 */
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enum {
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@ -97,6 +101,12 @@ enum {
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CS_ETE_PRIV_MAX
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};
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/*
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* Check for valid CoreSight trace ID. If an invalid value is present in the metadata,
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* then IDs are present in the hardware ID packet in the data file.
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*/
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#define CS_IS_VALID_TRACE_ID(id) ((id > 0) && (id < 0x70))
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/*
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* ETMv3 exception encoding number:
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* See Embedded Trace Macrocell specification (ARM IHI 0014Q)
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