mvebu dt changes for v4.1 (part #1)
- fix SDHCI nodes on Armada 38x - add Linksys WRT1900AC (Mamba) support (including the Ethernet switch) - add several fixes and improvement for dove - enable GPIO fan alarm support for 2Big Network v2 - add several fixes about unit address - add support for Armada 39x SoC and board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlT9S+0ACgkQCwYYjhRyO9XSkQCfcrsiF6bS+B1B9Gdu+nBwyXdC BHYAmwUm92D7yH8ePjbKldM4ONM1315b =yn/6 -----END PGP SIGNATURE----- Merge tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu into next/dt Pull "mvebu dt changes for v4.1 (part #1)" from Gregory CLEMENT: - fix SDHCI nodes on Armada 38x - add Linksys WRT1900AC (Mamba) support (including the Ethernet switch) - add several fixes and improvement for dove - enable GPIO fan alarm support for 2Big Network v2 - add several fixes about unit address - add support for Armada 39x SoC and board * tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu: ARM: mvebu: add Device Tree files for Armada 39x SoC and board ARM: mvebu: fix unit address of MPIC nodes ARM: mvebu: use stdout-path in all armada-*.dts ARM: mvebu: add serial port aliases on Armada 370/375/38x/XP ARM: mvebu: remove aliases for Ethernet devices on Armada 370/375/38x/XP ARM: mvebu: add UART labels to Armada 375 ARM: mvebu: add missing UART labels on Armada 38x ARM: mvebu: fix usb@ unit address on Armada 38x to match register address ARM: mvebu: a385-db-ap: Enable the NAND ARM: ARMADA XP: WRT1900AC: Add support for the Ethernet switch ARM: Kirkwood: enable GPIO fan alarm support for 2Big Network v2 ARM: mvebu: Fix MPIC unit address ARM: dts: dove: Add some more common pinctrl settings ARM: dts: dove: Add node labels for PCIe ports 0 and 1 ARM: dts: dove: Always include gpio and interrupt-controller headers ARM: dts: dove: Fix uart[23] reg property ARM: mvebu: add Linksys WRT1900AC (Mamba) support ARM: mvebu: Add Device Tree description of SDHCI for Armada 388 RD ARM: mvebu: Update the SDHCI node on Armada 38x ARM: mvebu: Use macros for interrupt flags on Armada 38x sdhci node
This commit is contained in:
Коммит
094a29d023
|
@ -629,11 +629,14 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
|
|||
armada-388-db.dtb \
|
||||
armada-388-gp.dtb \
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||||
armada-388-rd.dtb
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||||
dtb-$(CONFIG_MACH_ARMADA_39X) += \
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||||
armada-398-db.dtb
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||||
dtb-$(CONFIG_MACH_ARMADA_XP) += \
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armada-xp-axpwifiap.dtb \
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armada-xp-db.dtb \
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armada-xp-gp.dtb \
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armada-xp-lenovo-ix4-300d.dtb \
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armada-xp-linksys-mamba.dtb \
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armada-xp-matrix.dtb \
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armada-xp-netgear-rn2120.dtb \
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armada-xp-openblocks-ax3-4.dtb \
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|
|
|
@ -55,7 +55,7 @@
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|||
compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp";
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||||
|
||||
chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory {
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|
|
|
@ -51,7 +51,7 @@
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compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory {
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|
|
|
@ -53,7 +53,7 @@
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compatible = "netgear,readynas-102", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory {
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|
|
|
@ -53,7 +53,7 @@
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compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory {
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|
|
|
@ -64,7 +64,7 @@
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compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory {
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|
|
|
@ -67,8 +67,7 @@
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"marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = &uart0;
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stdout-path = "serial0:115200n8";
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};
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memory {
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|
|
|
@ -59,8 +59,8 @@
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compatible = "marvell,armada-370-xp";
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aliases {
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eth0 = ð0;
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eth1 = ð1;
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serial0 = &uart0;
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serial1 = &uart1;
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};
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cpus {
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|
@ -223,7 +223,7 @@
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<0x20250 0x8>;
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};
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mpic: interrupt-controller@20000 {
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mpic: interrupt-controller@20a00 {
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compatible = "marvell,mpic";
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#interrupt-cells = <1>;
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#size-cells = <1>;
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|
|
|
@ -232,7 +232,7 @@
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reg = <0x18330 0x4>;
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};
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interrupt-controller@20000 {
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interrupt-controller@20a00 {
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reg = <0x20a00 0x1d0>, <0x21870 0x58>;
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};
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|
|
|
@ -55,7 +55,7 @@
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compatible = "marvell,a375-db", "marvell,armada375";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory {
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|
|
|
@ -60,8 +60,8 @@
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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ethernet0 = ð0;
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ethernet1 = ð1;
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serial0 = &uart0;
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serial1 = &uart1;
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};
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clocks {
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|
@ -276,7 +276,7 @@
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status = "disabled";
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};
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serial@12000 {
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uart0: serial@12000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x12000 0x100>;
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reg-shift = <2>;
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||||
|
@ -286,7 +286,7 @@
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status = "disabled";
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};
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serial@12100 {
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uart1: serial@12100 {
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compatible = "snps,dw-apb-uart";
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reg = <0x12100 0x100>;
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reg-shift = <2>;
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|
@ -394,7 +394,7 @@
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reg = <0x20000 0x100>, <0x20180 0x20>;
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};
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mpic: interrupt-controller@20000 {
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mpic: interrupt-controller@20a00 {
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compatible = "marvell,mpic";
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reg = <0x20a00 0x2d0>, <0x21070 0x58>;
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#interrupt-cells = <1>;
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|
|
|
@ -49,8 +49,7 @@
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compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada38x";
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chosen {
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bootargs = "console=ttyS0,115200";
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stdout-path = &uart1;
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stdout-path = "serial1:115200n8";
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};
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memory {
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|
@ -150,6 +149,19 @@
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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||||
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||||
nfc: flash@d0000 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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num-cs = <1>;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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marvell,nand-keep-config;
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marvell,nand-enable-arbiter;
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nand-on-flash-bbt;
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||||
};
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||||
};
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||||
|
||||
pcie-controller {
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||||
|
|
|
@ -54,7 +54,7 @@
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|||
"marvell,armada385", "marvell,armada380";
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||||
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||||
chosen {
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||||
bootargs = "console=ttyS0,115200 earlyprintk";
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||||
stdout-path = "serial0:115200n8";
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||||
};
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||||
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||||
memory {
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||||
|
@ -99,7 +99,7 @@
|
|||
phy-mode = "rgmii-id";
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||||
};
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||||
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||||
usb@50000 {
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||||
usb@58000 {
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||||
status = "ok";
|
||||
};
|
||||
|
||||
|
|
|
@ -48,8 +48,7 @@
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|||
compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
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||||
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||||
chosen {
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||||
bootargs = "console=ttyS0,115200";
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||||
stdout-path = &uart0;
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
@ -135,7 +134,7 @@
|
|||
};
|
||||
|
||||
/* CON4 */
|
||||
usb@50000 {
|
||||
usb@58000 {
|
||||
vcc-supply = <®_usb2_0_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -55,7 +55,7 @@
|
|||
"marvell,armada385","marvell,armada380";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
@ -85,6 +85,16 @@
|
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clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
sdhci@d8000 {
|
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pinctrl-names = "default";
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||||
pinctrl-0 = <&sdhci_pins>;
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broken-cd;
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||||
no-1-8-v;
|
||||
wp-inverted;
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
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||||
|
|
|
@ -59,9 +59,8 @@
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|||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
ethernet2 = ð2;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
};
|
||||
|
||||
soc {
|
||||
|
@ -216,7 +215,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial@12100 {
|
||||
uart1: serial@12100 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x12100 0x100>;
|
||||
reg-shift = <2>;
|
||||
|
@ -368,7 +367,7 @@
|
|||
reg = <0x20000 0x100>, <0x20180 0x20>;
|
||||
};
|
||||
|
||||
mpic: interrupt-controller@20000 {
|
||||
mpic: interrupt-controller@20a00 {
|
||||
compatible = "marvell,mpic";
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
#interrupt-cells = <1>;
|
||||
|
@ -435,7 +434,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
usb@58000 {
|
||||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x58000 0x500>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -548,8 +547,11 @@
|
|||
|
||||
sdhci@d8000 {
|
||||
compatible = "marvell,armada-380-sdhci";
|
||||
reg = <0xd8000 0x1000>, <0xdc000 0x100>;
|
||||
interrupts = <0 25 0x4>;
|
||||
reg-names = "sdhci", "mbus", "conf-sdio3";
|
||||
reg = <0xd8000 0x1000>,
|
||||
<0xdc000 0x100>,
|
||||
<0x18454 0x4>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gateclk 17>;
|
||||
mrvl,clk-delay-cycles = <0x1F>;
|
||||
status = "disabled";
|
||||
|
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Device Tree Include file for Marvell Armada 390 SoC.
|
||||
*
|
||||
* Copyright (C) 2015 Marvell
|
||||
*
|
||||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "armada-39x.dtsi"
|
||||
|
||||
/ {
|
||||
soc {
|
||||
internal-regs {
|
||||
pinctrl@18000 {
|
||||
compatible = "marvell,mv88f6920-pinctrl";
|
||||
reg = <0x18000 0x20>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,153 @@
|
|||
/*
|
||||
* Device Tree Include file for Marvell Armada 398 Development Board
|
||||
*
|
||||
* Copyright (C) 2015 Marvell
|
||||
*
|
||||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-398.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 398 Development Board";
|
||||
compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x80000000>; /* 2 GB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
spi@10680 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "n25q128a13";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <108000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x400000>;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x400000 0x1000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@12100 {
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&nand_pins>;
|
||||
pinctrl-names = "default";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0 0x800000>;
|
||||
};
|
||||
partition@800000 {
|
||||
label = "Linux";
|
||||
reg = <0x800000 0x800000>;
|
||||
};
|
||||
partition@1000000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x1000000 0x3f000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Device Tree Include file for Marvell Armada 398 SoC.
|
||||
*
|
||||
* Copyright (C) 2015 Marvell
|
||||
*
|
||||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "armada-39x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "marvell,armada398", "marvell,armada390";
|
||||
|
||||
soc {
|
||||
internal-regs {
|
||||
pinctrl@18000 {
|
||||
compatible = "marvell,mv88f6928-pinctrl";
|
||||
reg = <0x18000 0x20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,508 @@
|
|||
/*
|
||||
* Device Tree Include file for Marvell Armada 39x family of SoCs.
|
||||
*
|
||||
* Copyright (C) 2015 Marvell
|
||||
*
|
||||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
model = "Marvell Armada 39x family SoC";
|
||||
compatible = "marvell,armada390";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
serial3 = &uart3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
enable-method = "marvell,armada-390-smp";
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0>;
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus",
|
||||
"simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
controller = <&mbusc>;
|
||||
interrupt-parent = <&gic>;
|
||||
pcie-mem-aperture = <0xe0000000 0x8000000>;
|
||||
pcie-io-aperture = <0xe8000000 0x100000>;
|
||||
|
||||
bootrom {
|
||||
compatible = "marvell,bootrom";
|
||||
reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
|
||||
|
||||
L2: cache-controller@8000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x8000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
};
|
||||
|
||||
scu@c000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0xc000 0x100>;
|
||||
};
|
||||
|
||||
timer@c600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xc600 0x20>;
|
||||
interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
|
||||
clocks = <&coreclk 2>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@d000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0xd000 0x1000>,
|
||||
<0xc100 0x100>;
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,orion-spi";
|
||||
reg = <0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,orion-spi";
|
||||
reg = <0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
|
||||
timeout-ms = <1000>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@11100 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
reg = <0x11100 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
timeout-ms = <1000>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@11200 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
reg = <0x11200 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
timeout-ms = <1000>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@11300 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
reg = <0x11300 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
timeout-ms = <1000>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@12000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x12000 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-io-width = <1>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@12100 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x12100 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-io-width = <1>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@12200 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x12200 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-io-width = <1>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@12300 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x12300 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-io-width = <1>;
|
||||
clocks = <&coreclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl@18000 {
|
||||
i2c0_pins: i2c0-pins {
|
||||
marvell,pins = "mpp2", "mpp3";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
marvell,pins = "mpp0", "mpp1";
|
||||
marvell,function = "ua0";
|
||||
};
|
||||
|
||||
uart1_pins: uart1-pins {
|
||||
marvell,pins = "mpp19", "mpp20";
|
||||
marvell,function = "ua1";
|
||||
};
|
||||
|
||||
spi1_pins: spi1-pins {
|
||||
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
nand_pins: nand-pins {
|
||||
marvell,pins = "mpp22", "mpp34", "mpp23", "mpp33",
|
||||
"mpp38", "mpp28", "mpp40", "mpp42",
|
||||
"mpp35", "mpp36", "mpp25", "mpp30",
|
||||
"mpp32";
|
||||
marvell,function = "dev";
|
||||
};
|
||||
};
|
||||
|
||||
system-controller@18200 {
|
||||
compatible = "marvell,armada-390-system-controller",
|
||||
"marvell,armada-370-xp-system-controller";
|
||||
reg = <0x18200 0x100>;
|
||||
};
|
||||
|
||||
gateclk: clock-gating-control@18220 {
|
||||
compatible = "marvell,armada-390-gating-clock";
|
||||
reg = <0x18220 0x4>;
|
||||
clocks = <&coreclk 0>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
coreclk: mvebu-sar@18600 {
|
||||
compatible = "marvell,armada-390-core-clock";
|
||||
reg = <0x18600 0x04>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
mbusc: mbus-controller@20000 {
|
||||
compatible = "marvell,mbus-controller";
|
||||
reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
|
||||
};
|
||||
|
||||
mpic: interrupt-controller@20a00 {
|
||||
compatible = "marvell,mpic";
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-controller;
|
||||
msi-controller;
|
||||
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "marvell,armada-380-timer",
|
||||
"marvell,armada-xp-timer";
|
||||
reg = <0x20300 0x30>, <0x21040 0x30>;
|
||||
interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&mpic 5>,
|
||||
<&mpic 6>;
|
||||
clocks = <&coreclk 2>, <&coreclk 5>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
cpurst@20800 {
|
||||
compatible = "marvell,armada-370-cpu-reset";
|
||||
reg = <0x20800 0x10>;
|
||||
};
|
||||
|
||||
pmsu@22000 {
|
||||
compatible = "marvell,armada-390-pmsu",
|
||||
"marvell,armada-380-pmsu";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
|
||||
xor@60800 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60800 0x100
|
||||
0x60a00 0x100>;
|
||||
clocks = <&gateclk 22>;
|
||||
status = "okay";
|
||||
|
||||
xor00 {
|
||||
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmacap,memcpy;
|
||||
dmacap,xor;
|
||||
};
|
||||
xor01 {
|
||||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmacap,memcpy;
|
||||
dmacap,xor;
|
||||
dmacap,memset;
|
||||
};
|
||||
};
|
||||
|
||||
xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0x60b00 0x100>;
|
||||
clocks = <&gateclk 28>;
|
||||
status = "okay";
|
||||
|
||||
xor10 {
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmacap,memcpy;
|
||||
dmacap,xor;
|
||||
};
|
||||
xor11 {
|
||||
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmacap,memcpy;
|
||||
dmacap,xor;
|
||||
dmacap,memset;
|
||||
};
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
compatible = "marvell,armada370-nand";
|
||||
reg = <0xd0000 0x54>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coredivclk 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci@d8000 {
|
||||
compatible = "marvell,armada-380-sdhci";
|
||||
reg = <0xd8000 0x1000>, <0xdc000 0x100>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gateclk 17>;
|
||||
mrvl,clk-delay-cycles = <0x1F>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
coredivclk: clock@e4250 {
|
||||
compatible = "marvell,armada-390-corediv-clock",
|
||||
"marvell,armada-380-corediv-clock";
|
||||
reg = <0xe4250 0xc>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&mainpll>;
|
||||
clock-output-names = "nand";
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
compatible = "marvell,armada-370-pcie";
|
||||
status = "disabled";
|
||||
device_type = "pci";
|
||||
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
msi-parent = <&mpic>;
|
||||
bus-range = <0x00 0xff>;
|
||||
|
||||
ranges =
|
||||
<0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
|
||||
0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
|
||||
0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
|
||||
0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
|
||||
0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
|
||||
0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
|
||||
0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
|
||||
0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
|
||||
0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
|
||||
0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */
|
||||
0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
|
||||
0x81000000 0x4 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 3 IO */>;
|
||||
|
||||
/*
|
||||
* This port can be either x4 or x1. When
|
||||
* configured in x4 by the bootloader, then
|
||||
* pcie@4,0 is not available.
|
||||
*/
|
||||
pcie@1,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x1 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
marvell,pcie-port = <0>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 8>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* x1 port */
|
||||
pcie@2,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x2 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
marvell,pcie-port = <1>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* x1 port */
|
||||
pcie@3,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
|
||||
reg = <0x1800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x3 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
|
||||
marvell,pcie-port = <2>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/*
|
||||
* x1 port only available when pcie@1,0 is
|
||||
* configured as a x1 port
|
||||
*/
|
||||
pcie@4,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
|
||||
reg = <0x2000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
|
||||
0x81000000 0 0 0x81000000 0x4 0 1 0>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
marvell,pcie-port = <3>;
|
||||
marvell,pcie-lane = <0>;
|
||||
clocks = <&gateclk 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 2 GHz fixed main PLL */
|
||||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <2000000000>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -59,7 +59,7 @@
|
|||
compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -64,7 +64,7 @@
|
|||
compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -65,7 +65,7 @@
|
|||
compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -54,8 +54,7 @@
|
|||
"marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = &uart0;
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -0,0 +1,393 @@
|
|||
/*
|
||||
* Device Tree file for the Linksys WRT1900AC (Mamba).
|
||||
*
|
||||
* Note: this board is shipped with a new generation boot loader that
|
||||
* remaps internal registers at 0xf1000000. Therefore, if earlyprintk
|
||||
* is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be
|
||||
* used.
|
||||
*
|
||||
* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
* Based on armada-xp-axpwifiap.dts:
|
||||
*
|
||||
* Copyright (C) 2013 Marvell
|
||||
*
|
||||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "armada-xp-mv78230.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Linksys WRT1900AC";
|
||||
compatible = "linksys,mamba", "marvell,armadaxp-mv78230",
|
||||
"marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Etron EJ168 USB 3.0 controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* First mini-PCIe port */
|
||||
pcie@2,0 {
|
||||
/* Port 0, Lane 1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Second mini-PCIe port */
|
||||
pcie@3,0 {
|
||||
/* Port 0, Lane 3 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
|
||||
/* J10: VCC, NC, RX, NC, TX, GND */
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@a0000 {
|
||||
nr-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@74000 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* USB part of the eSATA/USB 2.0 port */
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
tmp421@4c {
|
||||
compatible = "ti,tmp421";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
tlc59116@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#gpio-cells = <2>;
|
||||
compatible = "ti,tlc59116";
|
||||
reg = <0x68>;
|
||||
|
||||
wan_amber@0 {
|
||||
label = "mamba:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_white@1 {
|
||||
label = "mamba:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
wlan_2g@2 {
|
||||
label = "mamba:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "mamba:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
esata@4 {
|
||||
label = "mamba:white:esata";
|
||||
reg = <0x4>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "mamba:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "mamba:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "mamba:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "mamba:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "mamba:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x100000>; /* 1MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u_env";
|
||||
reg = <0x100000 0x40000>; /* 256KB */
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "s_env";
|
||||
reg = <0x140000 0x40000>; /* 256KB */
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
label = "devinfo";
|
||||
reg = <0x900000 0x100000>; /* 1MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@a00000 {
|
||||
label = "kernel1";
|
||||
reg = <0xa00000 0x2800000>; /* 40MB */
|
||||
};
|
||||
|
||||
partition@d00000 {
|
||||
label = "rootfs1";
|
||||
reg = <0xd00000 0x2500000>; /* 37MB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@3200000 {
|
||||
label = "kernel2";
|
||||
reg = <0x3200000 0x2800000>; /* 40MB */
|
||||
};
|
||||
|
||||
partition@3500000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x3500000 0x2500000>; /* 37MB */
|
||||
};
|
||||
|
||||
/*
|
||||
* 38MB, last MB is for the BBT, not writable
|
||||
*/
|
||||
partition@5a00000 {
|
||||
label = "syscfg";
|
||||
reg = <0x5a00000 0x2600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused area between "s_env" and "devinfo".
|
||||
* Moved here because otherwise the renumbered
|
||||
* partitions would break the bootloader
|
||||
* supplied bootargs
|
||||
*/
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x180000 0x780000>; /* 7.5MB */
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "everspin,mr25h256";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&power_led_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power {
|
||||
label = "mamba:white:power";
|
||||
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_fan {
|
||||
/* SUNON HA4010V4-0000-C99 */
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&gpio0 24 0>;
|
||||
|
||||
gpio-fan,speed-map = <0 0
|
||||
4500 1>;
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsa,ethernet = <ð0>;
|
||||
dsa,mii-bus = <&mdio>;
|
||||
|
||||
switch@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "internet";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
|
||||
keys_pin: keys-pin {
|
||||
marvell,pins = "mpp32", "mpp33";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp40";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
gpio_fan_pin: gpio-fan-pin {
|
||||
marvell,pins = "mpp24";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
|
@ -52,7 +52,7 @@
|
|||
compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -57,7 +57,6 @@
|
|||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
eth3 = ð3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
|
|
@ -57,7 +57,6 @@
|
|||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
eth3 = ð3;
|
||||
};
|
||||
|
||||
|
||||
|
|
|
@ -53,7 +53,7 @@
|
|||
compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -54,7 +54,7 @@
|
|||
compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -67,8 +67,7 @@
|
|||
"marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
stdout-path = &uart0;
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
@ -57,7 +57,8 @@
|
|||
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
|
||||
|
||||
aliases {
|
||||
eth2 = ð2;
|
||||
serial2 = &uart2;
|
||||
serial3 = &uart3;
|
||||
};
|
||||
|
||||
soc {
|
||||
|
@ -153,7 +154,7 @@
|
|||
clocks = <&coreclk 1>;
|
||||
};
|
||||
|
||||
interrupt-controller@20000 {
|
||||
interrupt-controller@20a00 {
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
};
|
||||
|
||||
|
|
|
@ -1,5 +1,8 @@
|
|||
/include/ "skeleton.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||
|
||||
/ {
|
||||
|
@ -61,7 +64,7 @@
|
|||
0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */
|
||||
0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */
|
||||
|
||||
pcie-port@0 {
|
||||
pcie0: pcie-port@0 {
|
||||
device_type = "pci";
|
||||
status = "disabled";
|
||||
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
|
||||
|
@ -79,7 +82,7 @@
|
|||
interrupt-map = <0 0 0 0 &intc 16>;
|
||||
};
|
||||
|
||||
pcie-port@1 {
|
||||
pcie1: pcie-port@1 {
|
||||
device_type = "pci";
|
||||
status = "disabled";
|
||||
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
|
||||
|
@ -154,7 +157,7 @@
|
|||
|
||||
uart2: serial@12200 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x12000 0x100>;
|
||||
reg = <0x12200 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <9>;
|
||||
clocks = <&core_clk 0>;
|
||||
|
@ -163,7 +166,7 @@
|
|||
|
||||
uart3: serial@12300 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x12100 0x100>;
|
||||
reg = <0x12300 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <10>;
|
||||
clocks = <&core_clk 0>;
|
||||
|
@ -448,6 +451,11 @@
|
|||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_pcie1_clkreq: pmx-pcie1-clkreq {
|
||||
marvell,pins = "mpp9";
|
||||
marvell,function = "pex1";
|
||||
};
|
||||
|
||||
pmx_gpio_10: pmx-gpio-10 {
|
||||
marvell,pins = "mpp10";
|
||||
marvell,function = "gpio";
|
||||
|
@ -458,6 +466,11 @@
|
|||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_pcie0_clkreq: pmx-pcie0-clkreq {
|
||||
marvell,pins = "mpp11";
|
||||
marvell,function = "pex0";
|
||||
};
|
||||
|
||||
pmx_gpio_12: pmx-gpio-12 {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
|
@ -563,6 +576,18 @@
|
|||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_spi1_4_7: pmx-spi1-4-7 {
|
||||
marvell,pins = "mpp4", "mpp5",
|
||||
"mpp6", "mpp7";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
pmx_spi1_20_23: pmx-spi1-20-23 {
|
||||
marvell,pins = "mpp20", "mpp21",
|
||||
"mpp22", "mpp23";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
pmx_uart1: pmx-uart1 {
|
||||
marvell,pins = "mpp_uart1";
|
||||
marvell,function = "uart1";
|
||||
|
@ -582,6 +607,36 @@
|
|||
marvell,pins = "mpp_nand";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
pmx_i2c1: pmx-i2c1 {
|
||||
marvell,pins = "mpp17", "mpp19";
|
||||
marvell,function = "twsi";
|
||||
};
|
||||
|
||||
pmx_i2c2: pmx-i2c2 {
|
||||
marvell,pins = "mpp_audio1";
|
||||
marvell,function = "twsi";
|
||||
};
|
||||
|
||||
pmx_ssp_i2c2: pmx-ssp-i2c2 {
|
||||
marvell,pins = "mpp_audio1";
|
||||
marvell,function = "ssp/twsi";
|
||||
};
|
||||
|
||||
pmx_i2cmux_0: pmx-i2cmux-0 {
|
||||
marvell,pins = "twsi";
|
||||
marvell,function = "twsi-opt1";
|
||||
};
|
||||
|
||||
pmx_i2cmux_1: pmx-i2cmux-1 {
|
||||
marvell,pins = "twsi";
|
||||
marvell,function = "twsi-opt2";
|
||||
};
|
||||
|
||||
pmx_i2cmux_2: pmx-i2cmux-2 {
|
||||
marvell,pins = "twsi";
|
||||
marvell,function = "twsi-opt3";
|
||||
};
|
||||
};
|
||||
|
||||
core_clk: core-clocks@d0214 {
|
||||
|
|
|
@ -27,6 +27,11 @@
|
|||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>;
|
||||
};
|
||||
|
||||
fan {
|
||||
compatible = "gpio-fan";
|
||||
alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
®ulators {
|
||||
|
|
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