spi: imx: Revert "spi: imx: dynamic burst length adjust for PIO mode"
This reverts commits8d4a6cad7aand179547e143. Besides the problems already found with this patch it also modifies the spi transfer tx_buf in spi_imx_u32_swap_u8() and spi_imx_u32_swap_u16(). This is hidden from the compiler with an explicit cast from const void* to u32*, so no warning is issued. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sascha Hauer
Mark Brown
Родитель
179547e143
Коммит
09b3ed2d59
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@ -56,11 +56,9 @@
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/* The maximum bytes that a sdma BD can transfer.*/
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#define MAX_SDMA_BD_BYTES (1 << 15)
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#define MX51_ECSPI_CTRL_MAX_BURST 512
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struct spi_imx_config {
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unsigned int speed_hz;
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unsigned int bpw;
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unsigned int len;
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};
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enum spi_imx_devtype {
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@ -99,14 +97,12 @@ struct spi_imx_data {
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unsigned int bytes_per_word;
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unsigned int spi_drctl;
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unsigned int count, count_index;
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unsigned int count;
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void (*tx)(struct spi_imx_data *);
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void (*rx)(struct spi_imx_data *);
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void *rx_buf;
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const void *tx_buf;
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unsigned int txfifo; /* number of words pushed in tx FIFO */
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unsigned int dynamic_burst, bpw_rx;
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unsigned int bpw_w;
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/* DMA */
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bool usedma;
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@ -256,7 +252,6 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
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#define MX51_ECSPI_CTRL_PREDIV_OFFSET 12
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#define MX51_ECSPI_CTRL_CS(cs) ((cs) << 18)
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#define MX51_ECSPI_CTRL_BL_OFFSET 20
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#define MX51_ECSPI_CTRL_BL_MASK (0xfff << 20)
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#define MX51_ECSPI_CONFIG 0x0c
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#define MX51_ECSPI_CONFIG_SCLKPHA(cs) (1 << ((cs) + 0))
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@ -284,77 +279,6 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
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#define MX51_ECSPI_TESTREG 0x20
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#define MX51_ECSPI_TESTREG_LBC BIT(31)
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static void spi_imx_u32_swap_u8(struct spi_transfer *transfer, u32 *buf)
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{
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int i;
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if (!buf)
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return;
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for (i = 0; i < transfer->len / 4; i++)
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*(buf + i) = cpu_to_be32(*(buf + i));
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}
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static void spi_imx_u32_swap_u16(struct spi_transfer *transfer, u32 *buf)
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{
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int i;
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if (!buf)
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return;
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for (i = 0; i < transfer->len / 4; i++) {
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u16 *temp = (u16 *)buf;
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*(temp + i * 2) = cpu_to_be16(*(temp + i * 2));
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*(temp + i * 2 + 1) = cpu_to_be16(*(temp + i * 2 + 1));
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*(buf + i) = cpu_to_be32(*(buf + i));
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}
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}
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static void spi_imx_buf_rx_swap(struct spi_imx_data *spi_imx)
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{
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if (!spi_imx->bpw_rx) {
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spi_imx_buf_rx_u32(spi_imx);
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return;
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}
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if (spi_imx->bpw_w == 1)
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spi_imx_buf_rx_u8(spi_imx);
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else if (spi_imx->bpw_w == 2)
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spi_imx_buf_rx_u16(spi_imx);
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}
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static void spi_imx_buf_tx_swap(struct spi_imx_data *spi_imx)
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{
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u32 ctrl, val;
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if (spi_imx->count == spi_imx->count_index) {
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spi_imx->count_index = spi_imx->count > sizeof(u32) ?
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spi_imx->count % sizeof(u32) : 0;
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ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
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ctrl &= ~MX51_ECSPI_CTRL_BL_MASK;
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if (spi_imx->count >= sizeof(u32)) {
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val = spi_imx->count - spi_imx->count_index;
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} else {
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val = spi_imx->bpw_w;
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spi_imx->bpw_rx = 1;
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}
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ctrl |= ((val * 8 - 1) << MX51_ECSPI_CTRL_BL_OFFSET);
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writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
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}
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if (spi_imx->count >= sizeof(u32)) {
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spi_imx_buf_tx_u32(spi_imx);
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return;
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}
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if (spi_imx->bpw_w == 1)
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spi_imx_buf_tx_u8(spi_imx);
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else if (spi_imx->bpw_w == 2)
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spi_imx_buf_tx_u16(spi_imx);
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}
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/* MX51 eCSPI */
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static unsigned int mx51_ecspi_clkdiv(struct spi_imx_data *spi_imx,
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unsigned int fspi, unsigned int *fres)
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@ -446,15 +370,7 @@ static int mx51_ecspi_config(struct spi_device *spi,
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/* set chip select to use */
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ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select);
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if (spi_imx->dynamic_burst) {
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if (config->len > MX51_ECSPI_CTRL_MAX_BURST)
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ctrl |= MX51_ECSPI_CTRL_BL_MASK;
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else
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ctrl |= (((config->len - config->len % 4) * 8 - 1) <<
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MX51_ECSPI_CTRL_BL_OFFSET);
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} else {
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ctrl |= (config->bpw - 1) << MX51_ECSPI_CTRL_BL_OFFSET;
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}
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ctrl |= (config->bpw - 1) << MX51_ECSPI_CTRL_BL_OFFSET;
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cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select);
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@ -889,8 +805,6 @@ static void spi_imx_push(struct spi_imx_data *spi_imx)
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while (spi_imx->txfifo < spi_imx_get_fifosize(spi_imx)) {
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if (!spi_imx->count)
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break;
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if (spi_imx->txfifo && (spi_imx->count == spi_imx->count_index))
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break;
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spi_imx->tx(spi_imx);
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spi_imx->txfifo++;
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}
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@ -981,12 +895,8 @@ static int spi_imx_setupxfer(struct spi_device *spi,
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struct spi_imx_config config;
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int ret;
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spi_imx->dynamic_burst = 0;
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spi_imx->bpw_rx = 0;
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config.bpw = t ? t->bits_per_word : spi->bits_per_word;
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config.speed_hz = t ? t->speed_hz : spi->max_speed_hz;
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config.len = t->len;
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if (!config.speed_hz)
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config.speed_hz = spi->max_speed_hz;
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@ -995,32 +905,14 @@ static int spi_imx_setupxfer(struct spi_device *spi,
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/* Initialize the functions for transfer */
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if (config.bpw <= 8) {
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if (t->len >= sizeof(u32) && is_imx51_ecspi(spi_imx)) {
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spi_imx->dynamic_burst = 1;
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spi_imx->rx = spi_imx_buf_rx_swap;
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spi_imx->tx = spi_imx_buf_tx_swap;
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} else {
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spi_imx->rx = spi_imx_buf_rx_u8;
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spi_imx->tx = spi_imx_buf_tx_u8;
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}
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spi_imx->rx = spi_imx_buf_rx_u8;
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spi_imx->tx = spi_imx_buf_tx_u8;
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} else if (config.bpw <= 16) {
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if (t->len >= sizeof(u32) && is_imx51_ecspi(spi_imx)) {
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spi_imx->dynamic_burst = 1;
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spi_imx->rx = spi_imx_buf_rx_swap;
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spi_imx->tx = spi_imx_buf_tx_swap;
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} else {
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spi_imx->rx = spi_imx_buf_rx_u16;
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spi_imx->tx = spi_imx_buf_tx_u16;
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}
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spi_imx->rx = spi_imx_buf_rx_u16;
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spi_imx->tx = spi_imx_buf_tx_u16;
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} else {
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if (is_imx51_ecspi(spi_imx)) {
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spi_imx->dynamic_burst = 1;
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spi_imx->rx = spi_imx_buf_rx_swap;
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spi_imx->tx = spi_imx_buf_tx_swap;
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} else {
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spi_imx->rx = spi_imx_buf_rx_u32;
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spi_imx->tx = spi_imx_buf_tx_u32;
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}
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spi_imx->rx = spi_imx_buf_rx_u32;
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spi_imx->tx = spi_imx_buf_tx_u32;
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}
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if (spi_imx_can_dma(spi_imx->bitbang.master, spi, t))
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@ -1028,8 +920,6 @@ static int spi_imx_setupxfer(struct spi_device *spi,
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else
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spi_imx->usedma = 0;
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spi_imx->bpw_w = DIV_ROUND_UP(config.bpw, 8);
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if (spi_imx->usedma) {
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ret = spi_imx_dma_configure(spi->master,
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spi_imx_bytes_per_word(config.bpw));
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@ -1204,27 +1094,6 @@ static int spi_imx_pio_transfer(struct spi_device *spi,
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spi_imx->count = transfer->len;
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spi_imx->txfifo = 0;
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if (spi_imx->dynamic_burst) {
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if (spi_imx->count > MX51_ECSPI_CTRL_MAX_BURST)
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spi_imx->count_index = spi_imx->count %
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MX51_ECSPI_CTRL_MAX_BURST;
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else
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spi_imx->count_index = spi_imx->count % sizeof(u32);
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switch (spi_imx->bpw_w) {
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case 1:
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spi_imx_u32_swap_u8(transfer,
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(u32 *)transfer->tx_buf);
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break;
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case 2:
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spi_imx_u32_swap_u16(transfer,
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(u32 *)transfer->tx_buf);
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break;
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default:
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break;
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}
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}
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reinit_completion(&spi_imx->xfer_done);
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spi_imx_push(spi_imx);
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@ -1241,22 +1110,6 @@ static int spi_imx_pio_transfer(struct spi_device *spi,
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return -ETIMEDOUT;
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}
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if (spi_imx->dynamic_burst) {
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switch (spi_imx->bpw_w) {
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case 1:
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spi_imx_u32_swap_u8(transfer,
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(u32 *)transfer->rx_buf);
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break;
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case 2:
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spi_imx_u32_swap_u16(transfer,
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(u32 *)transfer->rx_buf);
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break;
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default:
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break;
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}
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spi_imx->dynamic_burst = 0;
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}
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return transfer->len;
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}
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