PCI: export __pci_read_base()
Export __pci_read_base() so it can be used by whole PCI subsystem. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -162,6 +162,15 @@ struct pci_slot_attribute {
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};
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#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
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enum pci_bar_type {
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pci_bar_unknown, /* Standard PCI BAR probe */
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pci_bar_io, /* An io port BAR */
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pci_bar_mem32, /* A 32-bit memory BAR */
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pci_bar_mem64, /* A 64-bit memory BAR */
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};
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extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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struct resource *res, unsigned int reg);
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extern void pci_enable_ari(struct pci_dev *dev);
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/**
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* pci_ari_enabled - query ARI forwarding status
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@ -135,13 +135,6 @@ static u64 pci_size(u64 base, u64 maxbase, u64 mask)
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return size;
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}
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enum pci_bar_type {
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pci_bar_unknown, /* Standard PCI BAR probe */
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pci_bar_io, /* An io port BAR */
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pci_bar_mem32, /* A 32-bit memory BAR */
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pci_bar_mem64, /* A 64-bit memory BAR */
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};
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static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
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{
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if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
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@ -156,11 +149,16 @@ static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
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return pci_bar_mem32;
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}
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/*
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* If the type is not unknown, we assume that the lowest bit is 'enable'.
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* Returns 1 if the BAR was 64-bit and 0 if it was 32-bit.
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/**
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* pci_read_base - read a PCI BAR
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* @dev: the PCI device
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* @type: type of the BAR
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* @res: resource buffer to be filled in
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* @pos: BAR position in the config space
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*
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* Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
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*/
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static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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struct resource *res, unsigned int pos)
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{
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u32 l, sz, mask;
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