clk: composite: allow read-only clocks
This allows readl-only composite clocks by making mux_ops->set_parent and divider_ops->round_rate/set_rate optional. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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3eb635f1ca
Коммит
0c02cf2f1c
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@ -207,7 +207,7 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
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clk_composite_ops = &composite->ops;
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if (mux_hw && mux_ops) {
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if (!mux_ops->get_parent || !mux_ops->set_parent) {
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if (!mux_ops->get_parent) {
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clk = ERR_PTR(-EINVAL);
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goto err;
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}
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@ -215,6 +215,7 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
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composite->mux_hw = mux_hw;
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composite->mux_ops = mux_ops;
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clk_composite_ops->get_parent = clk_composite_get_parent;
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if (mux_ops->set_parent)
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clk_composite_ops->set_parent = clk_composite_set_parent;
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if (mux_ops->determine_rate)
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clk_composite_ops->determine_rate = clk_composite_determine_rate;
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@ -232,10 +233,6 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
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if (rate_ops->set_rate) {
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clk_composite_ops->set_rate = clk_composite_set_rate;
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}
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} else {
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WARN(rate_ops->set_rate,
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"%s: missing round_rate op is required\n",
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__func__);
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}
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composite->rate_hw = rate_hw;
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