b43: LCN-PHY: set TX filters
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki
John W. Linville
Родитель
b534706a06
Коммит
0c5644b98b
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@ -37,6 +37,11 @@
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#include "tables_phy_lcn.h"
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#include "main.h"
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struct lcn_tx_iir_filter {
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u8 type;
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u16 values[16];
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};
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/**************************************************
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* Radio 2064.
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**************************************************/
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@ -282,6 +287,86 @@ static void b43_phy_lcn_sense_setup(struct b43_wldev *dev)
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b43_radio_write(dev, 0x4a4, save_radio_4a4);
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}
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static bool b43_phy_lcn_load_tx_iir_cck_filter(struct b43_wldev *dev,
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u8 filter_type)
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{
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int i, j;
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u16 phy_regs[] = { 0x910, 0x91e, 0x91f, 0x924, 0x925, 0x926, 0x920,
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0x921, 0x927, 0x928, 0x929, 0x922, 0x923, 0x930,
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0x931, 0x932 };
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/* Table is from brcmsmac, values for type 25 were outdated, probably
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* others need updating too */
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struct lcn_tx_iir_filter tx_iir_filters_cck[] = {
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{ 0, { 1, 415, 1874, 64, 128, 64, 792, 1656, 64, 128, 64, 778,
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1582, 64, 128, 64 } },
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{ 1, { 1, 402, 1847, 259, 59, 259, 671, 1794, 68, 54, 68, 608,
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1863, 93, 167, 93 } },
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{ 2, { 1, 415, 1874, 64, 128, 64, 792, 1656, 192, 384, 192,
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778, 1582, 64, 128, 64 } },
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{ 3, { 1, 302, 1841, 129, 258, 129, 658, 1720, 205, 410, 205,
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754, 1760, 170, 340, 170 } },
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{ 20, { 1, 360, 1884, 242, 1734, 242, 752, 1720, 205, 1845, 205,
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767, 1760, 256, 185, 256 } },
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{ 21, { 1, 360, 1884, 149, 1874, 149, 752, 1720, 205, 1883, 205,
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767, 1760, 256, 273, 256 } },
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{ 22, { 1, 360, 1884, 98, 1948, 98, 752, 1720, 205, 1924, 205,
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767, 1760, 256, 352, 256 } },
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{ 23, { 1, 350, 1884, 116, 1966, 116, 752, 1720, 205, 2008, 205,
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767, 1760, 128, 233, 128 } },
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{ 24, { 1, 325, 1884, 32, 40, 32, 756, 1720, 256, 471, 256, 766,
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1760, 256, 1881, 256 } },
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{ 25, { 1, 299, 1884, 51, 64, 51, 736, 1720, 256, 471, 256, 765,
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1760, 262, 1878, 262 } },
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/* brcmsmac version { 25, { 1, 299, 1884, 51, 64, 51, 736, 1720,
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* 256, 471, 256, 765, 1760, 256, 1881, 256 } }, */
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{ 26, { 1, 277, 1943, 39, 117, 88, 637, 1838, 64, 192, 144, 614,
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1864, 128, 384, 288 } },
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{ 27, { 1, 245, 1943, 49, 147, 110, 626, 1838, 256, 768, 576,
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613, 1864, 128, 384, 288 } },
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{ 30, { 1, 302, 1841, 61, 122, 61, 658, 1720, 205, 410, 205,
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754, 1760, 170, 340, 170 } },
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};
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for (i = 0; i < ARRAY_SIZE(tx_iir_filters_cck); i++) {
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if (tx_iir_filters_cck[i].type == filter_type) {
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for (j = 0; j < 16; j++)
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b43_phy_write(dev, phy_regs[j],
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tx_iir_filters_cck[i].values[j]);
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return true;
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}
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}
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return false;
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}
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static bool b43_phy_lcn_load_tx_iir_ofdm_filter(struct b43_wldev *dev,
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u8 filter_type)
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{
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int i, j;
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u16 phy_regs[] = { 0x90f, 0x900, 0x901, 0x906, 0x907, 0x908, 0x902,
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0x903, 0x909, 0x90a, 0x90b, 0x904, 0x905, 0x90c,
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0x90d, 0x90e };
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struct lcn_tx_iir_filter tx_iir_filters_ofdm[] = {
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{ 0, { 0, 0xa2, 0x0, 0x100, 0x100, 0x0, 0x0, 0x0, 0x100, 0x0,
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0x0, 0x278, 0xfea0, 0x80, 0x100, 0x80 } },
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{ 1, { 0, 374, 0xFF79, 16, 32, 16, 799, 0xFE74, 50, 32, 50, 750,
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0xFE2B, 212, 0xFFCE, 212 } },
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{ 2, { 0, 375, 0xFF16, 37, 76, 37, 799, 0xFE74, 32, 20, 32, 748,
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0xFEF2, 128, 0xFFE2, 128 } },
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};
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for (i = 0; i < ARRAY_SIZE(tx_iir_filters_ofdm); i++) {
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if (tx_iir_filters_ofdm[i].type == filter_type) {
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for (j = 0; j < 16; j++)
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b43_phy_write(dev, phy_regs[j],
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tx_iir_filters_ofdm[i].values[j]);
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return true;
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}
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}
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return false;
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}
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/**************************************************
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* Channel switching ops.
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**************************************************/
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@ -329,6 +414,12 @@ static int b43_phy_lcn_set_channel(struct b43_wldev *dev,
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struct ieee80211_channel *channel,
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enum nl80211_channel_type channel_type)
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{
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static const u16 sfo_cfg[14][2] = {
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{965, 1087}, {967, 1085}, {969, 1082}, {971, 1080}, {973, 1078},
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{975, 1076}, {977, 1073}, {979, 1071}, {981, 1069}, {983, 1067},
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{985, 1065}, {987, 1063}, {989, 1060}, {994, 1055},
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};
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b43_phy_lcn_set_channel_tweaks(dev, channel->hw_value);
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b43_phy_set(dev, 0x44a, 0x44);
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@ -339,7 +430,21 @@ static int b43_phy_lcn_set_channel(struct b43_wldev *dev,
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b43_phy_lcn_afe_set_unset(dev);
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/* TODO */
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b43_phy_write(dev, 0x657, sfo_cfg[channel->hw_value - 1][0]);
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b43_phy_write(dev, 0x658, sfo_cfg[channel->hw_value - 1][1]);
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if (channel->hw_value == 14) {
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b43_phy_maskset(dev, 0x448, ~(0x3 << 8), (2) << 8);
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b43_phy_lcn_load_tx_iir_cck_filter(dev, 3);
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} else {
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b43_phy_maskset(dev, 0x448, ~(0x3 << 8), (1) << 8);
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/* brcmsmac uses filter_type 2, we follow wl with 25 */
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b43_phy_lcn_load_tx_iir_cck_filter(dev, 25);
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}
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/* brcmsmac uses filter_type 2, we follow wl with 0 */
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b43_phy_lcn_load_tx_iir_ofdm_filter(dev, 0);
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b43_phy_maskset(dev, 0x4eb, ~(0x7 << 3), 0x1 << 3);
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return 0;
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}
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