ath9k: Fix regulatory compliance
Adjusting the CCA registers for maximum permissible noise floor in ETSI/Japan domains has to be done for all AR9003 family chips. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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ca488b921e
Коммит
0c7c2bb4da
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@ -341,14 +341,15 @@
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#define AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ -95
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#define AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ -100
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#define AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_2GHZ -95
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#define AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_5GHZ -100
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#define AR_PHY_CCA_NOM_VAL_9462_2GHZ -127
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#define AR_PHY_CCA_MIN_GOOD_VAL_9462_2GHZ -127
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#define AR_PHY_CCA_MAX_GOOD_VAL_9462_2GHZ -60
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#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ -95
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#define AR_PHY_CCA_NOM_VAL_9462_5GHZ -127
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#define AR_PHY_CCA_MIN_GOOD_VAL_9462_5GHZ -127
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#define AR_PHY_CCA_MAX_GOOD_VAL_9462_5GHZ -60
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#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ -100
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#define AR_PHY_CCA_NOM_VAL_9330_2GHZ -118
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@ -548,11 +548,11 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
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* EEPROM needs to be initialized before we do this.
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* This is required for regulatory compliance.
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*/
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if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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u16 regdmn = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
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if ((regdmn & 0xF0) == CTL_FCC) {
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ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ;
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ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ;
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ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_2GHZ;
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ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_5GHZ;
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}
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}
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