ARM: OMAP2+: clock: fix rate prints
Printing with unsigned long rates with %ld gives wrong result if the rate is high enough. Fix this by using %lu. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -306,7 +306,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
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ref_rate = __clk_get_rate(dd->clk_ref);
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clk_name = __clk_get_name(hw->clk);
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pr_debug("clock: %s: starting DPLL round_rate, target rate %ld\n",
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pr_debug("clock: %s: starting DPLL round_rate, target rate %lu\n",
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clk_name, target_rate);
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scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR);
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@ -342,7 +342,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
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if (r == DPLL_MULT_UNDERFLOW)
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continue;
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pr_debug("clock: %s: m = %d: n = %d: new_rate = %ld\n",
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pr_debug("clock: %s: m = %d: n = %d: new_rate = %lu\n",
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clk_name, m, n, new_rate);
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if (target_rate == new_rate) {
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@ -354,7 +354,7 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
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}
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if (target_rate != new_rate) {
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pr_debug("clock: %s: cannot round to rate %ld\n",
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pr_debug("clock: %s: cannot round to rate %lu\n",
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clk_name, target_rate);
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return ~0;
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}
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