net: calxedaxgmac: determine number of address filters at runtime
Highbank and Midway xgmac h/w have different number of MAC address filter registers with 7 and 31, respectively. Highbank has been wrong, so fix it and detect the number of filter registers at run-time. Unfortunately, the version register is the same on both SOCs, so simply test if write to the last filter register will take a value. It always reads as 0 if not. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Родитель
8a8c3f5beb
Коммит
0cf2f38007
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@ -106,7 +106,6 @@
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#define XGMAC_DMA_HW_FEATURE 0x00000f58 /* Enabled Hardware Features */
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#define XGMAC_ADDR_AE 0x80000000
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#define XGMAC_MAX_FILTER_ADDR 31
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/* PMT Control and Status */
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#define XGMAC_PMT_POINTER_RESET 0x80000000
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@ -384,6 +383,7 @@ struct xgmac_priv {
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struct device *device;
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struct napi_struct napi;
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int max_macs;
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struct xgmac_extra_stats xstats;
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spinlock_t stats_lock;
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@ -1296,7 +1296,7 @@ static void xgmac_set_rx_mode(struct net_device *dev)
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memset(hash_filter, 0, sizeof(hash_filter));
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if (netdev_uc_count(dev) > XGMAC_MAX_FILTER_ADDR) {
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if (netdev_uc_count(dev) > priv->max_macs) {
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use_hash = true;
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value |= XGMAC_FRAME_FILTER_HUC | XGMAC_FRAME_FILTER_HPF;
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}
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@ -1319,7 +1319,7 @@ static void xgmac_set_rx_mode(struct net_device *dev)
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goto out;
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}
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if ((netdev_mc_count(dev) + reg - 1) > XGMAC_MAX_FILTER_ADDR) {
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if ((netdev_mc_count(dev) + reg - 1) > priv->max_macs) {
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use_hash = true;
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value |= XGMAC_FRAME_FILTER_HMC | XGMAC_FRAME_FILTER_HPF;
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} else {
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@ -1340,7 +1340,7 @@ static void xgmac_set_rx_mode(struct net_device *dev)
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}
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out:
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for (i = reg; i <= XGMAC_MAX_FILTER_ADDR; i++)
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for (i = reg; i <= priv->max_macs; i++)
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xgmac_set_mac_addr(ioaddr, NULL, i);
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for (i = 0; i < XGMAC_NUM_HASH; i++)
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writel(hash_filter[i], ioaddr + XGMAC_HASH(i));
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@ -1759,6 +1759,13 @@ static int xgmac_probe(struct platform_device *pdev)
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uid = readl(priv->base + XGMAC_VERSION);
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netdev_info(ndev, "h/w version is 0x%x\n", uid);
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/* Figure out how many valid mac address filter registers we have */
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writel(1, priv->base + XGMAC_ADDR_HIGH(31));
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if (readl(priv->base + XGMAC_ADDR_HIGH(31)) == 1)
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priv->max_macs = 31;
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else
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priv->max_macs = 7;
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writel(0, priv->base + XGMAC_DMA_INTR_ENA);
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ndev->irq = platform_get_irq(pdev, 0);
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if (ndev->irq == -ENXIO) {
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