Merge branch 'omap-for-v5.10/prm-genpd' into omap-for-v5.10/ti-sysc-drop-pdata
This commit is contained in:
Коммит
0d7ce5c5c4
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@ -18,6 +18,7 @@ Required properties:
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(base address and length)
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Optional properties:
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- #power-domain-cells: Should be 0 if the instance is a power domain provider.
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- #reset-cells: Should be 1 if the PRM instance in question supports resets.
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Example:
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@ -25,5 +26,6 @@ Example:
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prm_dsp2: prm@1b00 {
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compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
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reg = <0x1b00 0x40>;
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#power-domain-cells = <0>;
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#reset-cells = <1>;
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};
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@ -578,6 +578,7 @@
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<SYSC_IDLE_SMART>;
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clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
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clock-names = "fck";
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power-domains = <&prm_gfx>;
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resets = <&prm_gfx 0>;
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reset-names = "rstctrl";
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#address-cells = <1>;
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@ -617,6 +618,7 @@
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prm_gfx: prm@1100 {
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compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
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reg = <0x1100 0x100>;
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#power-domain-cells = <0>;
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#reset-cells = <1>;
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};
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};
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@ -517,6 +517,7 @@
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<SYSC_IDLE_SMART>;
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clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>;
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clock-names = "fck";
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power-domains = <&prm_gfx>;
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resets = <&prm_gfx 0>;
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reset-names = "rstctrl";
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#address-cells = <1>;
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@ -533,6 +534,7 @@
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prm_gfx: prm@400 {
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compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
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reg = <0x400 0x100>;
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#power-domain-cells = <0>;
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#reset-cells = <1>;
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};
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@ -1,14 +1,16 @@
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&l4_abe { /* 0x40100000 */
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compatible = "ti,omap4-l4-abe", "simple-bus";
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compatible = "ti,omap4-l4-abe", "simple-pm-bus";
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reg = <0x40100000 0x400>,
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<0x40100400 0x400>;
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reg-names = "la", "ap";
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power-domains = <&prm_abe>;
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/* OMAP4_L4_ABE_CLKCTRL is read-only */
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
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<0x49000000 0x49000000 0x100000>;
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segment@0 { /* 0x40100000 */
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compatible = "simple-bus";
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compatible = "simple-pm-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges =
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@ -658,6 +658,12 @@
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#reset-cells = <1>;
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};
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prm_abe: prm@500 {
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compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
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reg = <0x500 0x100>;
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#power-domain-cells = <0>;
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};
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prm_core: prm@700 {
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compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
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reg = <0x700 0x100>;
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@ -1,14 +1,16 @@
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&l4_abe { /* 0x40100000 */
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compatible = "ti,omap5-l4-abe", "simple-bus";
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compatible = "ti,omap5-l4-abe", "simple-pm-bus";
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reg = <0x40100000 0x400>,
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<0x40100400 0x400>;
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reg-names = "la", "ap";
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power-domains = <&prm_abe>;
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/* OMAP5_L4_ABE_CLKCTRL is read-only */
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
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<0x49000000 0x49000000 0x100000>;
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segment@0 { /* 0x40100000 */
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compatible = "simple-bus";
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compatible = "simple-pm-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges =
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@ -674,6 +674,12 @@
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#reset-cells = <1>;
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};
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prm_abe: prm@500 {
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compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
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reg = <0x500 0x100>;
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#power-domain-cells = <0>;
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};
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prm_core: prm@700 {
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compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
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reg = <0x700 0x100>;
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@ -7,6 +7,7 @@ config ARCH_OMAP2
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depends on ARCH_MULTI_V6
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select ARCH_OMAP2PLUS
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select CPU_V6
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select PM_GENERIC_DOMAINS if PM
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select SOC_HAS_OMAP2_SDRC
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config ARCH_OMAP3
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@ -74,22 +74,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* gfx -> l3 main */
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struct omap_hwmod_ocp_if am33xx_gfx__l3_main = {
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.master = &am33xx_gfx_hwmod,
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.slave = &am33xx_l3_main_hwmod,
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.clk = "dpll_core_m4_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3 main -> gfx */
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struct omap_hwmod_ocp_if am33xx_l3_main__gfx = {
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.master = &am33xx_l3_main_hwmod,
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.slave = &am33xx_gfx_hwmod,
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.clk = "dpll_core_m4_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3s cfg -> gpmc */
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struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
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.master = &am33xx_l3_s_hwmod,
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@ -132,30 +132,6 @@ struct omap_hwmod_class am33xx_wkup_m3_hwmod_class = {
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.name = "wkup_m3",
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};
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/* gfx */
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/* Pseudo hwmod for reset control purpose only */
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static struct omap_hwmod_class am33xx_gfx_hwmod_class = {
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.name = "gfx",
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};
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static struct omap_hwmod_rst_info am33xx_gfx_resets[] = {
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{ .name = "gfx", .rst_shift = 0, .st_shift = 0},
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};
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struct omap_hwmod am33xx_gfx_hwmod = {
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.name = "gfx",
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.class = &am33xx_gfx_hwmod_class,
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.clkdm_name = "gfx_l3_clkdm",
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.main_clk = "gfx_fck_div_ck",
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.prcm = {
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.omap4 = {
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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.rst_lines = am33xx_gfx_resets,
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.rst_lines_cnt = ARRAY_SIZE(am33xx_gfx_resets),
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};
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/*
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* 'prcm' class
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* power and reset manager (whole prcm infrastructure)
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@ -283,22 +259,14 @@ static void omap_hwmod_am33xx_clkctrl(void)
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CLKCTRL(am33xx_l4_ls_hwmod, AM33XX_CM_PER_L4LS_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_l4_wkup_hwmod, AM33XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_l3_main_hwmod, AM33XX_CM_PER_L3_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_gfx_hwmod, AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mpu_hwmod , AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_l3_instr_hwmod , AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
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}
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static void omap_hwmod_am33xx_rst(void)
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{
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RSTCTRL(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTCTRL_OFFSET);
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RSTST(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTST_OFFSET);
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}
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void omap_hwmod_am33xx_reg(void)
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{
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omap_hwmod_am33xx_clkctrl();
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omap_hwmod_am33xx_rst();
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}
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static void omap_hwmod_am43xx_clkctrl(void)
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@ -311,20 +279,12 @@ static void omap_hwmod_am43xx_clkctrl(void)
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CLKCTRL(am33xx_l4_ls_hwmod, AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_l4_wkup_hwmod, AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_l3_main_hwmod, AM43XX_CM_PER_L3_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_gfx_hwmod, AM43XX_CM_GFX_GFX_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_mpu_hwmod , AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_l3_instr_hwmod , AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
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}
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static void omap_hwmod_am43xx_rst(void)
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{
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RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET);
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RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET);
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}
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void omap_hwmod_am43xx_reg(void)
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{
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omap_hwmod_am43xx_clkctrl();
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omap_hwmod_am43xx_rst();
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}
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@ -274,10 +274,8 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l3_main__l4_hs,
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&am33xx_l3_main__l3_s,
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&am33xx_l3_main__l3_instr,
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&am33xx_l3_main__gfx,
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&am33xx_l3_s__l3_main,
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&am33xx_wkup_m3__l4_wkup,
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&am33xx_gfx__l3_main,
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&am33xx_l3_main__debugss,
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&am33xx_l4_wkup__wkup_m3,
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&am33xx_l4_wkup__control,
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@ -143,11 +143,9 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am43xx_l3_main__l4_hs,
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&am33xx_l3_main__l3_s,
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&am33xx_l3_main__l3_instr,
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&am33xx_l3_main__gfx,
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&am33xx_l3_s__l3_main,
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&am43xx_l3_main__emif,
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&am43xx_wkup_m3__l4_wkup,
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&am33xx_gfx__l3_main,
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&am43xx_l4_wkup__wkup_m3,
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&am43xx_l4_wkup__control,
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&am43xx_l4_wkup__smartreflex0,
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@ -124,21 +124,6 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = {
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.name = "l4",
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};
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/* l4_abe */
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static struct omap_hwmod omap44xx_l4_abe_hwmod = {
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.name = "l4_abe",
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.class = &omap44xx_l4_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET,
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.lostcontext_mask = OMAP4430_LOSTMEM_AESSMEM_MASK,
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.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
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},
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},
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};
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/* l4_cfg */
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static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
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.name = "l4_cfg",
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@ -771,22 +756,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l4_abe */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = {
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.master = &omap44xx_l3_main_1_hwmod,
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.slave = &omap44xx_l4_abe_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* mpu -> l4_abe */
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static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {
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.master = &omap44xx_mpu_hwmod,
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.slave = &omap44xx_l4_abe_hwmod,
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.clk = "ocp_abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l4_cfg */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {
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.master = &omap44xx_l3_main_1_hwmod,
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@ -988,8 +957,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l3_main_1__l3_main_3,
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&omap44xx_l3_main_2__l3_main_3,
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&omap44xx_l4_cfg__l3_main_3,
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&omap44xx_l3_main_1__l4_abe,
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&omap44xx_mpu__l4_abe,
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&omap44xx_l3_main_1__l4_cfg,
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&omap44xx_l3_main_2__l4_per,
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&omap44xx_l4_cfg__l4_wkup,
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@ -121,19 +121,6 @@ static struct omap_hwmod_class omap54xx_l4_hwmod_class = {
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.name = "l4",
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};
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/* l4_abe */
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static struct omap_hwmod omap54xx_l4_abe_hwmod = {
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.name = "l4_abe",
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.class = &omap54xx_l4_hwmod_class,
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.clkdm_name = "abe_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_ABE_L4_ABE_CLKCTRL_OFFSET,
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.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
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},
|
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},
|
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};
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/* l4_cfg */
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static struct omap_hwmod omap54xx_l4_cfg_hwmod = {
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.name = "l4_cfg",
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@ -395,22 +382,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_3 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l4_abe */
|
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static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l4_abe = {
|
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.master = &omap54xx_l3_main_1_hwmod,
|
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.slave = &omap54xx_l4_abe_hwmod,
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.clk = "abe_iclk",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
|
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};
|
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|
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/* mpu -> l4_abe */
|
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static struct omap_hwmod_ocp_if omap54xx_mpu__l4_abe = {
|
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.master = &omap54xx_mpu_hwmod,
|
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.slave = &omap54xx_l4_abe_hwmod,
|
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.clk = "abe_iclk",
|
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.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l3_main_1 -> l4_cfg */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l4_cfg = {
|
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.master = &omap54xx_l3_main_1_hwmod,
|
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@ -478,8 +449,6 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
|
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&omap54xx_l3_main_1__l3_main_3,
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&omap54xx_l3_main_2__l3_main_3,
|
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&omap54xx_l4_cfg__l3_main_3,
|
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&omap54xx_l3_main_1__l4_abe,
|
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&omap54xx_mpu__l4_abe,
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&omap54xx_l3_main_1__l4_cfg,
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&omap54xx_l3_main_2__l4_per,
|
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&omap54xx_l3_main_1__l4_wkup,
|
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|
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@ -10,14 +10,39 @@
|
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#include <linux/device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/iopoll.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/reset-controller.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <linux/platform_data/ti-prm.h>
|
||||
|
||||
enum omap_prm_domain_mode {
|
||||
OMAP_PRMD_OFF,
|
||||
OMAP_PRMD_RETENTION,
|
||||
OMAP_PRMD_ON_INACTIVE,
|
||||
OMAP_PRMD_ON_ACTIVE,
|
||||
};
|
||||
|
||||
struct omap_prm_domain_map {
|
||||
unsigned int usable_modes; /* Mask of hardware supported modes */
|
||||
unsigned long statechange:1; /* Optional low-power state change */
|
||||
unsigned long logicretstate:1; /* Optional logic off mode */
|
||||
};
|
||||
|
||||
struct omap_prm_domain {
|
||||
struct device *dev;
|
||||
struct omap_prm *prm;
|
||||
struct generic_pm_domain pd;
|
||||
u16 pwrstctrl;
|
||||
u16 pwrstst;
|
||||
const struct omap_prm_domain_map *cap;
|
||||
u32 pwrstctrl_saved;
|
||||
};
|
||||
|
||||
struct omap_rst_map {
|
||||
s8 rst;
|
||||
s8 st;
|
||||
|
@ -27,6 +52,9 @@ struct omap_prm_data {
|
|||
u32 base;
|
||||
const char *name;
|
||||
const char *clkdm_name;
|
||||
u16 pwrstctrl;
|
||||
u16 pwrstst;
|
||||
const struct omap_prm_domain_map *dmap;
|
||||
u16 rstctrl;
|
||||
u16 rstst;
|
||||
const struct omap_rst_map *rstmap;
|
||||
|
@ -36,6 +64,7 @@ struct omap_prm_data {
|
|||
struct omap_prm {
|
||||
const struct omap_prm_data *data;
|
||||
void __iomem *base;
|
||||
struct omap_prm_domain *prmd;
|
||||
};
|
||||
|
||||
struct omap_reset_data {
|
||||
|
@ -47,6 +76,7 @@ struct omap_reset_data {
|
|||
struct device *dev;
|
||||
};
|
||||
|
||||
#define genpd_to_prm_domain(gpd) container_of(gpd, struct omap_prm_domain, pd)
|
||||
#define to_omap_reset_data(p) container_of((p), struct omap_reset_data, rcdev)
|
||||
|
||||
#define OMAP_MAX_RESETS 8
|
||||
|
@ -58,6 +88,39 @@ struct omap_reset_data {
|
|||
|
||||
#define OMAP_PRM_HAS_RESETS (OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_RSTST)
|
||||
|
||||
#define PRM_STATE_MAX_WAIT 10000
|
||||
#define PRM_LOGICRETSTATE BIT(2)
|
||||
#define PRM_LOWPOWERSTATECHANGE BIT(4)
|
||||
#define PRM_POWERSTATE_MASK OMAP_PRMD_ON_ACTIVE
|
||||
|
||||
#define PRM_ST_INTRANSITION BIT(20)
|
||||
|
||||
static const struct omap_prm_domain_map omap_prm_all = {
|
||||
.usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_ON_INACTIVE) |
|
||||
BIT(OMAP_PRMD_RETENTION) | BIT(OMAP_PRMD_OFF),
|
||||
.statechange = 1,
|
||||
.logicretstate = 1,
|
||||
};
|
||||
|
||||
static const struct omap_prm_domain_map omap_prm_noinact = {
|
||||
.usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_RETENTION) |
|
||||
BIT(OMAP_PRMD_OFF),
|
||||
.statechange = 1,
|
||||
.logicretstate = 1,
|
||||
};
|
||||
|
||||
static const struct omap_prm_domain_map omap_prm_nooff = {
|
||||
.usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_ON_INACTIVE) |
|
||||
BIT(OMAP_PRMD_RETENTION),
|
||||
.statechange = 1,
|
||||
.logicretstate = 1,
|
||||
};
|
||||
|
||||
static const struct omap_prm_domain_map omap_prm_onoff_noauto = {
|
||||
.usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_OFF),
|
||||
.statechange = 1,
|
||||
};
|
||||
|
||||
static const struct omap_rst_map rst_map_0[] = {
|
||||
{ .rst = 0, .st = 0 },
|
||||
{ .rst = -1 },
|
||||
|
@ -78,6 +141,10 @@ static const struct omap_rst_map rst_map_012[] = {
|
|||
|
||||
static const struct omap_prm_data omap4_prm_data[] = {
|
||||
{ .name = "tesla", .base = 0x4a306400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
|
||||
{
|
||||
.name = "abe", .base = 0x4a306500,
|
||||
.pwrstctrl = 0, .pwrstst = 0x4, .dmap = &omap_prm_all,
|
||||
},
|
||||
{ .name = "core", .base = 0x4a306700, .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ducati", .rstmap = rst_map_012 },
|
||||
{ .name = "ivahd", .base = 0x4a306f00, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012 },
|
||||
{ .name = "device", .base = 0x4a307b00, .rstctrl = 0x0, .rstst = 0x4, .rstmap = rst_map_01, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM },
|
||||
|
@ -86,6 +153,10 @@ static const struct omap_prm_data omap4_prm_data[] = {
|
|||
|
||||
static const struct omap_prm_data omap5_prm_data[] = {
|
||||
{ .name = "dsp", .base = 0x4ae06400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
|
||||
{
|
||||
.name = "abe", .base = 0x4ae06500,
|
||||
.pwrstctrl = 0, .pwrstst = 0x4, .dmap = &omap_prm_nooff,
|
||||
},
|
||||
{ .name = "core", .base = 0x4ae06700, .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ipu", .rstmap = rst_map_012 },
|
||||
{ .name = "iva", .base = 0x4ae07200, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012 },
|
||||
{ .name = "device", .base = 0x4ae07c00, .rstctrl = 0x0, .rstst = 0x4, .rstmap = rst_map_01, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM },
|
||||
|
@ -119,7 +190,11 @@ static const struct omap_prm_data am3_prm_data[] = {
|
|||
{ .name = "per", .base = 0x44e00c00, .rstctrl = 0x0, .rstmap = am3_per_rst_map, .flags = OMAP_PRM_HAS_RSTCTRL, .clkdm_name = "pruss_ocp" },
|
||||
{ .name = "wkup", .base = 0x44e00d00, .rstctrl = 0x0, .rstst = 0xc, .rstmap = am3_wkup_rst_map, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM },
|
||||
{ .name = "device", .base = 0x44e00f00, .rstctrl = 0x0, .rstst = 0x8, .rstmap = rst_map_01, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM },
|
||||
{ .name = "gfx", .base = 0x44e01100, .rstctrl = 0x4, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3" },
|
||||
{
|
||||
.name = "gfx", .base = 0x44e01100,
|
||||
.pwrstctrl = 0, .pwrstst = 0x10, .dmap = &omap_prm_noinact,
|
||||
.rstctrl = 0x4, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3",
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
|
@ -135,7 +210,11 @@ static const struct omap_rst_map am4_device_rst_map[] = {
|
|||
};
|
||||
|
||||
static const struct omap_prm_data am4_prm_data[] = {
|
||||
{ .name = "gfx", .base = 0x44df0400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3" },
|
||||
{
|
||||
.name = "gfx", .base = 0x44df0400,
|
||||
.pwrstctrl = 0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
|
||||
.rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3",
|
||||
},
|
||||
{ .name = "per", .base = 0x44df0800, .rstctrl = 0x10, .rstst = 0x14, .rstmap = am4_per_rst_map, .clkdm_name = "pruss_ocp" },
|
||||
{ .name = "wkup", .base = 0x44df2000, .rstctrl = 0x10, .rstst = 0x14, .rstmap = am3_wkup_rst_map, .flags = OMAP_PRM_HAS_NO_CLKDM },
|
||||
{ .name = "device", .base = 0x44df4000, .rstctrl = 0x0, .rstst = 0x4, .rstmap = am4_device_rst_map, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM },
|
||||
|
@ -151,6 +230,180 @@ static const struct of_device_id omap_prm_id_table[] = {
|
|||
{ },
|
||||
};
|
||||
|
||||
#ifdef DEBUG
|
||||
static void omap_prm_domain_show_state(struct omap_prm_domain *prmd,
|
||||
const char *desc)
|
||||
{
|
||||
dev_dbg(prmd->dev, "%s %s: %08x/%08x\n",
|
||||
prmd->pd.name, desc,
|
||||
readl_relaxed(prmd->prm->base + prmd->pwrstctrl),
|
||||
readl_relaxed(prmd->prm->base + prmd->pwrstst));
|
||||
}
|
||||
#else
|
||||
static inline void omap_prm_domain_show_state(struct omap_prm_domain *prmd,
|
||||
const char *desc)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static int omap_prm_domain_power_on(struct generic_pm_domain *domain)
|
||||
{
|
||||
struct omap_prm_domain *prmd;
|
||||
int ret;
|
||||
u32 v;
|
||||
|
||||
prmd = genpd_to_prm_domain(domain);
|
||||
if (!prmd->cap)
|
||||
return 0;
|
||||
|
||||
omap_prm_domain_show_state(prmd, "on: previous state");
|
||||
|
||||
if (prmd->pwrstctrl_saved)
|
||||
v = prmd->pwrstctrl_saved;
|
||||
else
|
||||
v = readl_relaxed(prmd->prm->base + prmd->pwrstctrl);
|
||||
|
||||
writel_relaxed(v | OMAP_PRMD_ON_ACTIVE,
|
||||
prmd->prm->base + prmd->pwrstctrl);
|
||||
|
||||
/* wait for the transition bit to get cleared */
|
||||
ret = readl_relaxed_poll_timeout(prmd->prm->base + prmd->pwrstst,
|
||||
v, !(v & PRM_ST_INTRANSITION), 1,
|
||||
PRM_STATE_MAX_WAIT);
|
||||
if (ret)
|
||||
dev_err(prmd->dev, "%s: %s timed out\n",
|
||||
prmd->pd.name, __func__);
|
||||
|
||||
omap_prm_domain_show_state(prmd, "on: new state");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* No need to check for holes in the mask for the lowest mode */
|
||||
static int omap_prm_domain_find_lowest(struct omap_prm_domain *prmd)
|
||||
{
|
||||
return __ffs(prmd->cap->usable_modes);
|
||||
}
|
||||
|
||||
static int omap_prm_domain_power_off(struct generic_pm_domain *domain)
|
||||
{
|
||||
struct omap_prm_domain *prmd;
|
||||
int ret;
|
||||
u32 v;
|
||||
|
||||
prmd = genpd_to_prm_domain(domain);
|
||||
if (!prmd->cap)
|
||||
return 0;
|
||||
|
||||
omap_prm_domain_show_state(prmd, "off: previous state");
|
||||
|
||||
v = readl_relaxed(prmd->prm->base + prmd->pwrstctrl);
|
||||
prmd->pwrstctrl_saved = v;
|
||||
|
||||
v &= ~PRM_POWERSTATE_MASK;
|
||||
v |= omap_prm_domain_find_lowest(prmd);
|
||||
|
||||
if (prmd->cap->statechange)
|
||||
v |= PRM_LOWPOWERSTATECHANGE;
|
||||
if (prmd->cap->logicretstate)
|
||||
v &= ~PRM_LOGICRETSTATE;
|
||||
else
|
||||
v |= PRM_LOGICRETSTATE;
|
||||
|
||||
writel_relaxed(v, prmd->prm->base + prmd->pwrstctrl);
|
||||
|
||||
/* wait for the transition bit to get cleared */
|
||||
ret = readl_relaxed_poll_timeout(prmd->prm->base + prmd->pwrstst,
|
||||
v, !(v & PRM_ST_INTRANSITION), 1,
|
||||
PRM_STATE_MAX_WAIT);
|
||||
if (ret)
|
||||
dev_warn(prmd->dev, "%s: %s timed out\n",
|
||||
__func__, prmd->pd.name);
|
||||
|
||||
omap_prm_domain_show_state(prmd, "off: new state");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int omap_prm_domain_attach_dev(struct generic_pm_domain *domain,
|
||||
struct device *dev)
|
||||
{
|
||||
struct generic_pm_domain_data *genpd_data;
|
||||
struct of_phandle_args pd_args;
|
||||
struct omap_prm_domain *prmd;
|
||||
struct device_node *np;
|
||||
int ret;
|
||||
|
||||
prmd = genpd_to_prm_domain(domain);
|
||||
np = dev->of_node;
|
||||
|
||||
ret = of_parse_phandle_with_args(np, "power-domains",
|
||||
"#power-domain-cells", 0, &pd_args);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (pd_args.args_count != 0)
|
||||
dev_warn(dev, "%s: unusupported #power-domain-cells: %i\n",
|
||||
prmd->pd.name, pd_args.args_count);
|
||||
|
||||
genpd_data = dev_gpd_data(dev);
|
||||
genpd_data->data = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void omap_prm_domain_detach_dev(struct generic_pm_domain *domain,
|
||||
struct device *dev)
|
||||
{
|
||||
struct generic_pm_domain_data *genpd_data;
|
||||
|
||||
genpd_data = dev_gpd_data(dev);
|
||||
genpd_data->data = NULL;
|
||||
}
|
||||
|
||||
static int omap_prm_domain_init(struct device *dev, struct omap_prm *prm)
|
||||
{
|
||||
struct omap_prm_domain *prmd;
|
||||
struct device_node *np = dev->of_node;
|
||||
const struct omap_prm_data *data;
|
||||
const char *name;
|
||||
int error;
|
||||
|
||||
if (!of_find_property(dev->of_node, "#power-domain-cells", NULL))
|
||||
return 0;
|
||||
|
||||
of_node_put(dev->of_node);
|
||||
|
||||
prmd = devm_kzalloc(dev, sizeof(*prmd), GFP_KERNEL);
|
||||
if (!prmd)
|
||||
return -ENOMEM;
|
||||
|
||||
data = prm->data;
|
||||
name = devm_kasprintf(dev, GFP_KERNEL, "prm_%s",
|
||||
data->name);
|
||||
|
||||
prmd->dev = dev;
|
||||
prmd->prm = prm;
|
||||
prmd->cap = prmd->prm->data->dmap;
|
||||
prmd->pwrstctrl = prmd->prm->data->pwrstctrl;
|
||||
prmd->pwrstst = prmd->prm->data->pwrstst;
|
||||
|
||||
prmd->pd.name = name;
|
||||
prmd->pd.power_on = omap_prm_domain_power_on;
|
||||
prmd->pd.power_off = omap_prm_domain_power_off;
|
||||
prmd->pd.attach_dev = omap_prm_domain_attach_dev;
|
||||
prmd->pd.detach_dev = omap_prm_domain_detach_dev;
|
||||
|
||||
pm_genpd_init(&prmd->pd, NULL, true);
|
||||
error = of_genpd_add_provider_simple(np, &prmd->pd);
|
||||
if (error)
|
||||
pm_genpd_remove(&prmd->pd);
|
||||
else
|
||||
prm->prmd = prmd;
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static bool _is_valid_reset(struct omap_reset_data *reset, unsigned long id)
|
||||
{
|
||||
if (reset->mask & BIT(id))
|
||||
|
@ -351,6 +604,7 @@ static int omap_prm_probe(struct platform_device *pdev)
|
|||
const struct omap_prm_data *data;
|
||||
struct omap_prm *prm;
|
||||
const struct of_device_id *match;
|
||||
int ret;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res)
|
||||
|
@ -378,7 +632,21 @@ static int omap_prm_probe(struct platform_device *pdev)
|
|||
if (IS_ERR(prm->base))
|
||||
return PTR_ERR(prm->base);
|
||||
|
||||
return omap_prm_reset_init(pdev, prm);
|
||||
ret = omap_prm_domain_init(&pdev->dev, prm);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = omap_prm_reset_init(pdev, prm);
|
||||
if (ret)
|
||||
goto err_domain;
|
||||
|
||||
return 0;
|
||||
|
||||
err_domain:
|
||||
of_genpd_del_provider(pdev->dev.of_node);
|
||||
pm_genpd_remove(&prm->prmd->pd);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct platform_driver omap_prm_driver = {
|
||||
|
|
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