[BNX2]: Add support for remote PHY.
In blade servers, the Serdes PHY in 5708S can control the remote copper PHY through autonegotiation on the backplane. This patch adds the logic to interface with the firmware to control the remote PHY autonegotiation and to handle remote PHY link events. When remote PHY is present, the 5708S Serdes device practically becomes a copper device with full control over the 1000Base-T link settings. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Chan
David S. Miller
Родитель
9700e6befe
Коммит
0d8a657105
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@ -550,6 +550,9 @@ bnx2_report_fw_link(struct bnx2 *bp)
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{
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u32 fw_link_status = 0;
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if (bp->phy_flags & REMOTE_PHY_CAP_FLAG)
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return;
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if (bp->link_up) {
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u32 bmsr;
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@ -1100,6 +1103,9 @@ bnx2_set_link(struct bnx2 *bp)
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return 0;
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}
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if (bp->phy_flags & REMOTE_PHY_CAP_FLAG)
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return 0;
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link_up = bp->link_up;
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bnx2_enable_bmsr1(bp);
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@ -1210,12 +1216,74 @@ bnx2_phy_get_pause_adv(struct bnx2 *bp)
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return adv;
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}
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static int bnx2_fw_sync(struct bnx2 *, u32, int);
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static int
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bnx2_setup_serdes_phy(struct bnx2 *bp)
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bnx2_setup_remote_phy(struct bnx2 *bp, u8 port)
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{
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u32 speed_arg = 0, pause_adv;
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pause_adv = bnx2_phy_get_pause_adv(bp);
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if (bp->autoneg & AUTONEG_SPEED) {
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speed_arg |= BNX2_NETLINK_SET_LINK_ENABLE_AUTONEG;
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if (bp->advertising & ADVERTISED_10baseT_Half)
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speed_arg |= BNX2_NETLINK_SET_LINK_SPEED_10HALF;
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if (bp->advertising & ADVERTISED_10baseT_Full)
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speed_arg |= BNX2_NETLINK_SET_LINK_SPEED_10FULL;
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if (bp->advertising & ADVERTISED_100baseT_Half)
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speed_arg |= BNX2_NETLINK_SET_LINK_SPEED_100HALF;
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if (bp->advertising & ADVERTISED_100baseT_Full)
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speed_arg |= BNX2_NETLINK_SET_LINK_SPEED_100FULL;
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if (bp->advertising & ADVERTISED_1000baseT_Full)
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speed_arg |= BNX2_NETLINK_SET_LINK_SPEED_1GFULL;
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if (bp->advertising & ADVERTISED_2500baseX_Full)
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speed_arg |= BNX2_NETLINK_SET_LINK_SPEED_2G5FULL;
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} else {
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if (bp->req_line_speed == SPEED_2500)
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speed_arg = BNX2_NETLINK_SET_LINK_SPEED_2G5FULL;
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else if (bp->req_line_speed == SPEED_1000)
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speed_arg = BNX2_NETLINK_SET_LINK_SPEED_1GFULL;
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else if (bp->req_line_speed == SPEED_100) {
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if (bp->req_duplex == DUPLEX_FULL)
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speed_arg = BNX2_NETLINK_SET_LINK_SPEED_100FULL;
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else
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speed_arg = BNX2_NETLINK_SET_LINK_SPEED_100HALF;
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} else if (bp->req_line_speed == SPEED_10) {
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if (bp->req_duplex == DUPLEX_FULL)
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speed_arg = BNX2_NETLINK_SET_LINK_SPEED_10FULL;
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else
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speed_arg = BNX2_NETLINK_SET_LINK_SPEED_10HALF;
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}
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}
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if (pause_adv & (ADVERTISE_1000XPAUSE | ADVERTISE_PAUSE_CAP))
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speed_arg |= BNX2_NETLINK_SET_LINK_FC_SYM_PAUSE;
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if (pause_adv & (ADVERTISE_1000XPSE_ASYM | ADVERTISE_1000XPSE_ASYM))
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speed_arg |= BNX2_NETLINK_SET_LINK_FC_ASYM_PAUSE;
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if (port == PORT_TP)
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speed_arg |= BNX2_NETLINK_SET_LINK_PHY_APP_REMOTE |
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BNX2_NETLINK_SET_LINK_ETH_AT_WIRESPEED;
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REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_MB_ARG0, speed_arg);
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spin_unlock_bh(&bp->phy_lock);
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bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_CMD_SET_LINK, 0);
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spin_lock_bh(&bp->phy_lock);
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return 0;
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}
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static int
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bnx2_setup_serdes_phy(struct bnx2 *bp, u8 port)
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{
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u32 adv, bmcr;
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u32 new_adv = 0;
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if (bp->phy_flags & REMOTE_PHY_CAP_FLAG)
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return (bnx2_setup_remote_phy(bp, port));
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if (!(bp->autoneg & AUTONEG_SPEED)) {
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u32 new_bmcr;
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int force_link_down = 0;
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@ -1337,9 +1405,59 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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#define PHY_ALL_1000_SPEED (ADVERTISE_1000HALF | ADVERTISE_1000FULL)
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static void
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bnx2_set_default_remote_link(struct bnx2 *bp)
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{
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u32 link;
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if (bp->phy_port == PORT_TP)
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link = REG_RD_IND(bp, bp->shmem_base + BNX2_RPHY_COPPER_LINK);
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else
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link = REG_RD_IND(bp, bp->shmem_base + BNX2_RPHY_SERDES_LINK);
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if (link & BNX2_NETLINK_SET_LINK_ENABLE_AUTONEG) {
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bp->req_line_speed = 0;
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bp->autoneg |= AUTONEG_SPEED;
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bp->advertising = ADVERTISED_Autoneg;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_10HALF)
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bp->advertising |= ADVERTISED_10baseT_Half;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_10FULL)
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bp->advertising |= ADVERTISED_10baseT_Full;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_100HALF)
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bp->advertising |= ADVERTISED_100baseT_Half;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_100FULL)
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bp->advertising |= ADVERTISED_100baseT_Full;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_1GFULL)
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bp->advertising |= ADVERTISED_1000baseT_Full;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_2G5FULL)
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bp->advertising |= ADVERTISED_2500baseX_Full;
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} else {
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bp->autoneg = 0;
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bp->advertising = 0;
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bp->req_duplex = DUPLEX_FULL;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_10) {
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bp->req_line_speed = SPEED_10;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_10HALF)
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bp->req_duplex = DUPLEX_HALF;
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}
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if (link & BNX2_NETLINK_SET_LINK_SPEED_100) {
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bp->req_line_speed = SPEED_100;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_100HALF)
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bp->req_duplex = DUPLEX_HALF;
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}
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if (link & BNX2_NETLINK_SET_LINK_SPEED_1GFULL)
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bp->req_line_speed = SPEED_1000;
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if (link & BNX2_NETLINK_SET_LINK_SPEED_2G5FULL)
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bp->req_line_speed = SPEED_2500;
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}
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}
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static void
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bnx2_set_default_link(struct bnx2 *bp)
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{
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if (bp->phy_flags & REMOTE_PHY_CAP_FLAG)
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return bnx2_set_default_remote_link(bp);
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bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;
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bp->req_line_speed = 0;
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if (bp->phy_flags & PHY_SERDES_FLAG) {
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@ -1358,6 +1476,97 @@ bnx2_set_default_link(struct bnx2 *bp)
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bp->advertising = ETHTOOL_ALL_COPPER_SPEED | ADVERTISED_Autoneg;
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}
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static void
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bnx2_remote_phy_event(struct bnx2 *bp)
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{
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u32 msg;
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u8 link_up = bp->link_up;
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u8 old_port;
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msg = REG_RD_IND(bp, bp->shmem_base + BNX2_LINK_STATUS);
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if ((msg & BNX2_LINK_STATUS_LINK_UP) == BNX2_LINK_STATUS_LINK_DOWN)
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bp->link_up = 0;
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else {
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u32 speed;
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bp->link_up = 1;
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speed = msg & BNX2_LINK_STATUS_SPEED_MASK;
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bp->duplex = DUPLEX_FULL;
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switch (speed) {
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case BNX2_LINK_STATUS_10HALF:
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bp->duplex = DUPLEX_HALF;
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case BNX2_LINK_STATUS_10FULL:
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bp->line_speed = SPEED_10;
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break;
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case BNX2_LINK_STATUS_100HALF:
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bp->duplex = DUPLEX_HALF;
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case BNX2_LINK_STATUS_100BASE_T4:
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case BNX2_LINK_STATUS_100FULL:
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bp->line_speed = SPEED_100;
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break;
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case BNX2_LINK_STATUS_1000HALF:
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bp->duplex = DUPLEX_HALF;
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case BNX2_LINK_STATUS_1000FULL:
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bp->line_speed = SPEED_1000;
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break;
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case BNX2_LINK_STATUS_2500HALF:
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bp->duplex = DUPLEX_HALF;
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case BNX2_LINK_STATUS_2500FULL:
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bp->line_speed = SPEED_2500;
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break;
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default:
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bp->line_speed = 0;
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break;
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}
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spin_lock(&bp->phy_lock);
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bp->flow_ctrl = 0;
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if ((bp->autoneg & (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) !=
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(AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) {
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if (bp->duplex == DUPLEX_FULL)
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bp->flow_ctrl = bp->req_flow_ctrl;
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} else {
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if (msg & BNX2_LINK_STATUS_TX_FC_ENABLED)
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bp->flow_ctrl |= FLOW_CTRL_TX;
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if (msg & BNX2_LINK_STATUS_RX_FC_ENABLED)
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bp->flow_ctrl |= FLOW_CTRL_RX;
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}
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old_port = bp->phy_port;
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if (msg & BNX2_LINK_STATUS_SERDES_LINK)
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bp->phy_port = PORT_FIBRE;
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else
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bp->phy_port = PORT_TP;
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if (old_port != bp->phy_port)
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bnx2_set_default_link(bp);
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spin_unlock(&bp->phy_lock);
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}
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if (bp->link_up != link_up)
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bnx2_report_link(bp);
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bnx2_set_mac_link(bp);
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}
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static int
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bnx2_set_remote_link(struct bnx2 *bp)
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{
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u32 evt_code;
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evt_code = REG_RD_IND(bp, bp->shmem_base + BNX2_FW_EVT_CODE_MB);
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switch (evt_code) {
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case BNX2_FW_EVT_CODE_LINK_EVENT:
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bnx2_remote_phy_event(bp);
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break;
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case BNX2_FW_EVT_CODE_SW_TIMER_EXPIRATION_EVENT:
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default:
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break;
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}
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return 0;
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}
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static int
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bnx2_setup_copper_phy(struct bnx2 *bp)
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{
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@ -1456,13 +1665,13 @@ bnx2_setup_copper_phy(struct bnx2 *bp)
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}
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static int
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bnx2_setup_phy(struct bnx2 *bp)
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bnx2_setup_phy(struct bnx2 *bp, u8 port)
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{
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if (bp->loopback == MAC_LOOPBACK)
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return 0;
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if (bp->phy_flags & PHY_SERDES_FLAG) {
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return (bnx2_setup_serdes_phy(bp));
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return (bnx2_setup_serdes_phy(bp, port));
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}
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else {
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return (bnx2_setup_copper_phy(bp));
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@ -1682,6 +1891,9 @@ bnx2_init_phy(struct bnx2 *bp)
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REG_WR(bp, BNX2_EMAC_ATTENTION_ENA, BNX2_EMAC_ATTENTION_ENA_LINK);
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if (bp->phy_flags & REMOTE_PHY_CAP_FLAG)
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goto setup_phy;
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bnx2_read_phy(bp, MII_PHYSID1, &val);
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bp->phy_id = val << 16;
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bnx2_read_phy(bp, MII_PHYSID2, &val);
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@ -1699,7 +1911,9 @@ bnx2_init_phy(struct bnx2 *bp)
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rc = bnx2_init_copper_phy(bp);
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}
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bnx2_setup_phy(bp);
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setup_phy:
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if (!rc)
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rc = bnx2_setup_phy(bp, bp->phy_port);
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return rc;
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}
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@ -2007,6 +2221,9 @@ bnx2_phy_int(struct bnx2 *bp)
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bnx2_set_link(bp);
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spin_unlock(&bp->phy_lock);
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}
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if (bnx2_phy_event_is_set(bp, STATUS_ATTN_BITS_TIMER_ABORT))
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bnx2_set_remote_link(bp);
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}
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static void
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@ -2345,7 +2562,8 @@ bnx2_interrupt(int irq, void *dev_instance)
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return IRQ_HANDLED;
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}
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#define STATUS_ATTN_EVENTS STATUS_ATTN_BITS_LINK_STATE
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#define STATUS_ATTN_EVENTS (STATUS_ATTN_BITS_LINK_STATE | \
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STATUS_ATTN_BITS_TIMER_ABORT)
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static inline int
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bnx2_has_work(struct bnx2 *bp)
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@ -3585,6 +3803,36 @@ nvram_write_end:
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return rc;
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}
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static void
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bnx2_init_remote_phy(struct bnx2 *bp)
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{
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u32 val;
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bp->phy_flags &= ~REMOTE_PHY_CAP_FLAG;
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if (!(bp->phy_flags & PHY_SERDES_FLAG))
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return;
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val = REG_RD_IND(bp, bp->shmem_base + BNX2_FW_CAP_MB);
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if ((val & BNX2_FW_CAP_SIGNATURE_MASK) != BNX2_FW_CAP_SIGNATURE)
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return;
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if (val & BNX2_FW_CAP_REMOTE_PHY_CAPABLE) {
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if (netif_running(bp->dev)) {
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val = BNX2_DRV_ACK_CAP_SIGNATURE |
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BNX2_FW_CAP_REMOTE_PHY_CAPABLE;
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REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_ACK_CAP_MB,
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val);
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}
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bp->phy_flags |= REMOTE_PHY_CAP_FLAG;
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val = REG_RD_IND(bp, bp->shmem_base + BNX2_LINK_STATUS);
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if (val & BNX2_LINK_STATUS_SERDES_LINK)
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bp->phy_port = PORT_FIBRE;
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else
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bp->phy_port = PORT_TP;
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}
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}
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static int
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bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
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{
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@ -3665,6 +3913,12 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
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if (rc)
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return rc;
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spin_lock_bh(&bp->phy_lock);
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bnx2_init_remote_phy(bp);
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if (bp->phy_flags & REMOTE_PHY_CAP_FLAG)
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bnx2_set_default_remote_link(bp);
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spin_unlock_bh(&bp->phy_lock);
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if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
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/* Adjust the voltage regular to two steps lower. The default
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* of this register is 0x0000000e. */
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@ -4092,8 +4346,8 @@ bnx2_init_nic(struct bnx2 *bp)
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spin_lock_bh(&bp->phy_lock);
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bnx2_init_phy(bp);
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spin_unlock_bh(&bp->phy_lock);
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bnx2_set_link(bp);
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spin_unlock_bh(&bp->phy_lock);
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return 0;
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}
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@ -4623,6 +4877,9 @@ bnx2_5706_serdes_timer(struct bnx2 *bp)
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static void
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bnx2_5708_serdes_timer(struct bnx2 *bp)
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{
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if (bp->phy_flags & REMOTE_PHY_CAP_FLAG)
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return;
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if ((bp->phy_flags & PHY_2_5G_CAPABLE_FLAG) == 0) {
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bp->serdes_an_pending = 0;
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return;
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@ -5222,7 +5479,7 @@ bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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spin_lock_bh(&bp->phy_lock);
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bnx2_setup_phy(bp);
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bnx2_setup_phy(bp, bp->phy_port);
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spin_unlock_bh(&bp->phy_lock);
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@ -5566,7 +5823,7 @@ bnx2_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause)
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spin_lock_bh(&bp->phy_lock);
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bnx2_setup_phy(bp);
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bnx2_setup_phy(bp, bp->phy_port);
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spin_unlock_bh(&bp->phy_lock);
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@ -6338,7 +6595,9 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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else if (CHIP_BOND_ID(bp) & CHIP_BOND_ID_SERDES_BIT)
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bp->phy_flags |= PHY_SERDES_FLAG;
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||||
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bp->phy_port = PORT_TP;
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||||
if (bp->phy_flags & PHY_SERDES_FLAG) {
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bp->phy_port = PORT_FIBRE;
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||||
bp->flags |= NO_WOL_FLAG;
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if (CHIP_NUM(bp) != CHIP_NUM_5706) {
|
||||
bp->phy_addr = 2;
|
||||
|
|
@ -6347,6 +6606,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
|
|||
if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
|
||||
bp->phy_flags |= PHY_2_5G_CAPABLE_FLAG;
|
||||
}
|
||||
bnx2_init_remote_phy(bp);
|
||||
|
||||
} else if (CHIP_NUM(bp) == CHIP_NUM_5706 ||
|
||||
CHIP_NUM(bp) == CHIP_NUM_5708)
|
||||
bp->phy_flags |= PHY_CRC_FIX_FLAG;
|
||||
|
|
|
|||
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