Input: remove at32psif
Since AVR32 arch is gone, at32psif driver is useless. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This commit is contained in:
Corentin Labbe
Dmitry Torokhov
Родитель
698c03b474
Коммит
0de4502725
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@ -96,16 +96,6 @@ config SERIO_RPCKBD
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To compile this driver as a module, choose M here: the
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module will be called rpckbd.
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config SERIO_AT32PSIF
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tristate "AVR32 PSIF PS/2 keyboard and mouse controller"
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depends on AVR32
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help
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Say Y here if you want to use the PSIF peripheral on AVR32 devices
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and connect a PS/2 keyboard and/or mouse to it.
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To compile this driver as a module, choose M here: the module will
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be called at32psif.
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config SERIO_AMBAKMI
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tristate "AMBA KMI keyboard controller"
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depends on ARM_AMBA
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@ -13,7 +13,6 @@ obj-$(CONFIG_SERIO_CT82C710) += ct82c710.o
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obj-$(CONFIG_SERIO_RPCKBD) += rpckbd.o
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obj-$(CONFIG_SERIO_SA1111) += sa1111ps2.o
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obj-$(CONFIG_SERIO_AMBAKMI) += ambakmi.o
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obj-$(CONFIG_SERIO_AT32PSIF) += at32psif.o
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obj-$(CONFIG_SERIO_Q40KBD) += q40kbd.o
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obj-$(CONFIG_SERIO_GSCPS2) += gscps2.o
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obj-$(CONFIG_HP_SDC) += hp_sdc.o
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@ -1,357 +0,0 @@
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/*
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* Copyright (C) 2007 Atmel Corporation
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*
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* Driver for the AT32AP700X PS/2 controller (PSIF).
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/serio.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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/* PSIF register offsets */
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#define PSIF_CR 0x00
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#define PSIF_RHR 0x04
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#define PSIF_THR 0x08
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#define PSIF_SR 0x10
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#define PSIF_IER 0x14
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#define PSIF_IDR 0x18
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#define PSIF_IMR 0x1c
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#define PSIF_PSR 0x24
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/* Bitfields in control register. */
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#define PSIF_CR_RXDIS_OFFSET 1
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#define PSIF_CR_RXDIS_SIZE 1
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#define PSIF_CR_RXEN_OFFSET 0
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#define PSIF_CR_RXEN_SIZE 1
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#define PSIF_CR_SWRST_OFFSET 15
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#define PSIF_CR_SWRST_SIZE 1
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#define PSIF_CR_TXDIS_OFFSET 9
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#define PSIF_CR_TXDIS_SIZE 1
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#define PSIF_CR_TXEN_OFFSET 8
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#define PSIF_CR_TXEN_SIZE 1
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/* Bitfields in interrupt disable, enable, mask and status register. */
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#define PSIF_NACK_OFFSET 8
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#define PSIF_NACK_SIZE 1
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#define PSIF_OVRUN_OFFSET 5
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#define PSIF_OVRUN_SIZE 1
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#define PSIF_PARITY_OFFSET 9
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#define PSIF_PARITY_SIZE 1
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#define PSIF_RXRDY_OFFSET 4
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#define PSIF_RXRDY_SIZE 1
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#define PSIF_TXEMPTY_OFFSET 1
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#define PSIF_TXEMPTY_SIZE 1
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#define PSIF_TXRDY_OFFSET 0
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#define PSIF_TXRDY_SIZE 1
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/* Bitfields in prescale register. */
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#define PSIF_PSR_PRSCV_OFFSET 0
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#define PSIF_PSR_PRSCV_SIZE 12
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/* Bitfields in receive hold register. */
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#define PSIF_RHR_RXDATA_OFFSET 0
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#define PSIF_RHR_RXDATA_SIZE 8
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/* Bitfields in transmit hold register. */
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#define PSIF_THR_TXDATA_OFFSET 0
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#define PSIF_THR_TXDATA_SIZE 8
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/* Bit manipulation macros */
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#define PSIF_BIT(name) \
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(1 << PSIF_##name##_OFFSET)
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#define PSIF_BF(name, value) \
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(((value) & ((1 << PSIF_##name##_SIZE) - 1)) \
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<< PSIF_##name##_OFFSET)
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#define PSIF_BFEXT(name, value) \
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(((value) >> PSIF_##name##_OFFSET) \
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& ((1 << PSIF_##name##_SIZE) - 1))
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#define PSIF_BFINS(name, value, old) \
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(((old) & ~(((1 << PSIF_##name##_SIZE) - 1) \
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<< PSIF_##name##_OFFSET)) \
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| PSIF_BF(name, value))
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/* Register access macros */
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#define psif_readl(port, reg) \
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__raw_readl((port)->regs + PSIF_##reg)
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#define psif_writel(port, reg, value) \
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__raw_writel((value), (port)->regs + PSIF_##reg)
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struct psif {
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struct platform_device *pdev;
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struct clk *pclk;
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struct serio *io;
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void __iomem *regs;
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unsigned int irq;
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/* Prevent concurrent writes to PSIF THR. */
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spinlock_t lock;
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bool open;
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};
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static irqreturn_t psif_interrupt(int irq, void *_ptr)
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{
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struct psif *psif = _ptr;
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int retval = IRQ_NONE;
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unsigned int io_flags = 0;
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unsigned long status;
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status = psif_readl(psif, SR);
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if (status & PSIF_BIT(RXRDY)) {
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unsigned char val = (unsigned char) psif_readl(psif, RHR);
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if (status & PSIF_BIT(PARITY))
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io_flags |= SERIO_PARITY;
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if (status & PSIF_BIT(OVRUN))
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dev_err(&psif->pdev->dev, "overrun read error\n");
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serio_interrupt(psif->io, val, io_flags);
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retval = IRQ_HANDLED;
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}
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return retval;
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}
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static int psif_write(struct serio *io, unsigned char val)
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{
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struct psif *psif = io->port_data;
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unsigned long flags;
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int timeout = 10;
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int retval = 0;
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spin_lock_irqsave(&psif->lock, flags);
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while (!(psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) && timeout--)
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udelay(50);
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if (timeout >= 0) {
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psif_writel(psif, THR, val);
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} else {
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dev_dbg(&psif->pdev->dev, "timeout writing to THR\n");
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retval = -EBUSY;
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}
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spin_unlock_irqrestore(&psif->lock, flags);
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return retval;
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}
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static int psif_open(struct serio *io)
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{
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struct psif *psif = io->port_data;
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int retval;
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retval = clk_enable(psif->pclk);
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if (retval)
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return retval;
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psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN));
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psif_writel(psif, IER, PSIF_BIT(RXRDY));
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psif->open = true;
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return retval;
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}
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static void psif_close(struct serio *io)
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{
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struct psif *psif = io->port_data;
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psif->open = false;
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psif_writel(psif, IDR, ~0UL);
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psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
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clk_disable(psif->pclk);
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}
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static void psif_set_prescaler(struct psif *psif)
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{
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unsigned long prscv;
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unsigned long rate = clk_get_rate(psif->pclk);
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/* PRSCV = Pulse length (100 us) * PSIF module frequency. */
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prscv = 100 * (rate / 1000000UL);
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if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) {
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prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1;
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dev_dbg(&psif->pdev->dev, "pclk too fast, "
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"prescaler set to max\n");
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}
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clk_enable(psif->pclk);
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psif_writel(psif, PSR, prscv);
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clk_disable(psif->pclk);
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}
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static int __init psif_probe(struct platform_device *pdev)
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{
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struct resource *regs;
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struct psif *psif;
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struct serio *io;
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struct clk *pclk;
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int irq;
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int ret;
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psif = kzalloc(sizeof(struct psif), GFP_KERNEL);
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if (!psif)
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return -ENOMEM;
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psif->pdev = pdev;
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io = kzalloc(sizeof(struct serio), GFP_KERNEL);
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if (!io) {
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ret = -ENOMEM;
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goto out_free_psif;
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}
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psif->io = io;
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regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!regs) {
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dev_dbg(&pdev->dev, "no mmio resources defined\n");
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ret = -ENOMEM;
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goto out_free_io;
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}
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psif->regs = ioremap(regs->start, resource_size(regs));
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if (!psif->regs) {
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ret = -ENOMEM;
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dev_dbg(&pdev->dev, "could not map I/O memory\n");
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goto out_free_io;
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}
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pclk = clk_get(&pdev->dev, "pclk");
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if (IS_ERR(pclk)) {
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dev_dbg(&pdev->dev, "could not get peripheral clock\n");
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ret = PTR_ERR(pclk);
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goto out_iounmap;
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}
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psif->pclk = pclk;
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/* Reset the PSIF to enter at a known state. */
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ret = clk_enable(pclk);
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if (ret) {
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dev_dbg(&pdev->dev, "could not enable pclk\n");
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goto out_put_clk;
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}
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psif_writel(psif, CR, PSIF_BIT(CR_SWRST));
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clk_disable(pclk);
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_dbg(&pdev->dev, "could not get irq\n");
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ret = -ENXIO;
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goto out_put_clk;
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}
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ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif);
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if (ret) {
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dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
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goto out_put_clk;
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}
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psif->irq = irq;
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io->id.type = SERIO_8042;
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io->write = psif_write;
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io->open = psif_open;
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io->close = psif_close;
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snprintf(io->name, sizeof(io->name), "AVR32 PS/2 port%d", pdev->id);
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snprintf(io->phys, sizeof(io->phys), "at32psif/serio%d", pdev->id);
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io->port_data = psif;
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io->dev.parent = &pdev->dev;
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psif_set_prescaler(psif);
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spin_lock_init(&psif->lock);
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serio_register_port(psif->io);
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platform_set_drvdata(pdev, psif);
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dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n",
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(int)psif->regs, psif->irq);
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return 0;
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out_put_clk:
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clk_put(psif->pclk);
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out_iounmap:
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iounmap(psif->regs);
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out_free_io:
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kfree(io);
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out_free_psif:
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kfree(psif);
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return ret;
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}
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static int __exit psif_remove(struct platform_device *pdev)
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{
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struct psif *psif = platform_get_drvdata(pdev);
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psif_writel(psif, IDR, ~0UL);
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psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
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serio_unregister_port(psif->io);
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iounmap(psif->regs);
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free_irq(psif->irq, psif);
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clk_put(psif->pclk);
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kfree(psif);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int psif_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct psif *psif = platform_get_drvdata(pdev);
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if (psif->open) {
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psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS));
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clk_disable(psif->pclk);
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}
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return 0;
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}
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static int psif_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct psif *psif = platform_get_drvdata(pdev);
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if (psif->open) {
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clk_enable(psif->pclk);
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psif_set_prescaler(psif);
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psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN));
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}
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(psif_pm_ops, psif_suspend, psif_resume);
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static struct platform_driver psif_driver = {
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.remove = __exit_p(psif_remove),
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.driver = {
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.name = "atmel_psif",
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.pm = &psif_pm_ops,
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},
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};
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module_platform_driver_probe(psif_driver, psif_probe);
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MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
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MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver");
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MODULE_LICENSE("GPL");
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