Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
This commit is contained in:
Коммит
0df283639d
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@ -26,19 +26,13 @@
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static int mmc_set_power(struct device *dev, int slot, int power_on,
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static int mmc_set_power(struct device *dev, int slot, int power_on,
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int vdd)
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int vdd)
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{
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{
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if (power_on)
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gpio_set_value(H2_TPS_GPIO_MMC_PWR_EN, power_on);
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gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 1);
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else
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gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 0);
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return 0;
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return 0;
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}
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}
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static int mmc_late_init(struct device *dev)
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static int mmc_late_init(struct device *dev)
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{
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{
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int ret;
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int ret = gpio_request(H2_TPS_GPIO_MMC_PWR_EN, "MMC power");
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ret = gpio_request(H2_TPS_GPIO_MMC_PWR_EN, "MMC power");
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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@ -47,7 +41,7 @@ static int mmc_late_init(struct device *dev)
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return ret;
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return ret;
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}
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}
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static void mmc_shutdown(struct device *dev)
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static void mmc_cleanup(struct device *dev)
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{
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{
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gpio_free(H2_TPS_GPIO_MMC_PWR_EN);
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gpio_free(H2_TPS_GPIO_MMC_PWR_EN);
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}
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}
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@ -60,7 +54,7 @@ static void mmc_shutdown(struct device *dev)
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static struct omap_mmc_platform_data mmc1_data = {
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static struct omap_mmc_platform_data mmc1_data = {
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.nr_slots = 1,
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.nr_slots = 1,
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.init = mmc_late_init,
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.init = mmc_late_init,
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.shutdown = mmc_shutdown,
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.cleanup = mmc_cleanup,
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.dma_mask = 0xffffffff,
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.dma_mask = 0xffffffff,
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.slots[0] = {
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.slots[0] = {
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.set_power = mmc_set_power,
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.set_power = mmc_set_power,
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@ -26,11 +26,7 @@
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static int mmc_set_power(struct device *dev, int slot, int power_on,
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static int mmc_set_power(struct device *dev, int slot, int power_on,
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int vdd)
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int vdd)
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{
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{
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if (power_on)
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gpio_set_value(H3_TPS_GPIO_MMC_PWR_EN, power_on);
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gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 1);
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else
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gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 0);
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return 0;
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return 0;
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}
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}
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@ -39,12 +39,10 @@
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#include <asm/mach/flash.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/mach/map.h>
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#include <mach/gpioexpander.h>
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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#include <mach/mux.h>
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#include <mach/mux.h>
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#include <mach/tc.h>
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#include <mach/tc.h>
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#include <mach/nand.h>
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#include <mach/nand.h>
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#include <mach/irda.h>
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#include <mach/usb.h>
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#include <mach/usb.h>
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#include <mach/keypad.h>
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#include <mach/keypad.h>
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#include <mach/dma.h>
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#include <mach/dma.h>
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@ -276,104 +274,6 @@ static struct platform_device h3_kp_device = {
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.resource = h3_kp_resources,
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.resource = h3_kp_resources,
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};
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};
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/* Select between the IrDA and aGPS module
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*/
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static int h3_select_irda(struct device *dev, int state)
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{
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unsigned char expa;
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int err = 0;
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if ((err = read_gpio_expa(&expa, 0x26))) {
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printk(KERN_ERR "Error reading from I/O EXPANDER \n");
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return err;
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}
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/* 'P6' enable/disable IRDA_TX and IRDA_RX */
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if (state & IR_SEL) { /* IrDA */
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if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
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printk(KERN_ERR "Error writing to I/O EXPANDER \n");
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return err;
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}
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} else {
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if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
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printk(KERN_ERR "Error writing to I/O EXPANDER \n");
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return err;
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}
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}
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return err;
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}
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static void set_trans_mode(struct work_struct *work)
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{
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struct omap_irda_config *irda_config =
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container_of(work, struct omap_irda_config, gpio_expa.work);
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int mode = irda_config->mode;
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unsigned char expa;
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int err = 0;
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if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
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printk(KERN_ERR "Error reading from I/O expander\n");
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}
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expa &= ~0x03;
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if (mode & IR_SIRMODE) {
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expa |= 0x01;
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} else { /* MIR/FIR */
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expa |= 0x03;
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}
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if ((err = write_gpio_expa(expa, 0x27)) != 0) {
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printk(KERN_ERR "Error writing to I/O expander\n");
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}
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}
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static int h3_transceiver_mode(struct device *dev, int mode)
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{
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struct omap_irda_config *irda_config = dev->platform_data;
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irda_config->mode = mode;
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cancel_delayed_work(&irda_config->gpio_expa);
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PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
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schedule_delayed_work(&irda_config->gpio_expa, 0);
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return 0;
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}
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static struct omap_irda_config h3_irda_data = {
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.transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
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.transceiver_mode = h3_transceiver_mode,
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.select_irda = h3_select_irda,
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.rx_channel = OMAP_DMA_UART3_RX,
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.tx_channel = OMAP_DMA_UART3_TX,
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.dest_start = UART3_THR,
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.src_start = UART3_RHR,
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.tx_trigger = 0,
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.rx_trigger = 0,
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};
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static struct resource h3_irda_resources[] = {
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[0] = {
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.start = INT_UART3,
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.end = INT_UART3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 irda_dmamask = 0xffffffff;
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static struct platform_device h3_irda_device = {
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.name = "omapirda",
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.id = 0,
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.dev = {
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.platform_data = &h3_irda_data,
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.dma_mask = &irda_dmamask,
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},
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.num_resources = ARRAY_SIZE(h3_irda_resources),
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.resource = h3_irda_resources,
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};
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static struct platform_device h3_lcd_device = {
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static struct platform_device h3_lcd_device = {
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.name = "lcd_h3",
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.name = "lcd_h3",
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.id = -1,
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.id = -1,
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@ -395,7 +295,6 @@ static struct platform_device *devices[] __initdata = {
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&nand_device,
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&nand_device,
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&smc91x_device,
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&smc91x_device,
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&intlat_device,
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&intlat_device,
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&h3_irda_device,
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&h3_kp_device,
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&h3_kp_device,
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&h3_lcd_device,
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&h3_lcd_device,
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};
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};
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@ -181,11 +181,7 @@ static struct omap_usb_config nokia770_usb_config __initdata = {
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static int nokia770_mmc_set_power(struct device *dev, int slot, int power_on,
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static int nokia770_mmc_set_power(struct device *dev, int slot, int power_on,
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int vdd)
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int vdd)
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{
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{
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if (power_on)
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gpio_set_value(NOKIA770_GPIO_MMC_POWER, power_on);
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gpio_set_value(NOKIA770_GPIO_MMC_POWER, 1);
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else
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gpio_set_value(NOKIA770_GPIO_MMC_POWER, 0);
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return 0;
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return 0;
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}
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}
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@ -40,8 +40,8 @@ static void omap1_mcbsp_request(unsigned int id)
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*/
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*/
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if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
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if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
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if (dsp_use++ == 0) {
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if (dsp_use++ == 0) {
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api_clk = clk_get(NULL, "api_clk");
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api_clk = clk_get(NULL, "api_ck");
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dsp_clk = clk_get(NULL, "dsp_clk");
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dsp_clk = clk_get(NULL, "dsp_ck");
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if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
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if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
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clk_enable(api_clk);
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clk_enable(api_clk);
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clk_enable(dsp_clk);
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clk_enable(dsp_clk);
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@ -33,10 +33,8 @@
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#include <mach/control.h>
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#include <mach/control.h>
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#include <mach/gpio.h>
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#include <mach/gpio.h>
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#include <mach/gpioexpander.h>
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#include <mach/mux.h>
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#include <mach/mux.h>
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#include <mach/usb.h>
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#include <mach/usb.h>
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#include <mach/irda.h>
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#include <mach/board.h>
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#include <mach/board.h>
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#include <mach/common.h>
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#include <mach/common.h>
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#include <mach/keypad.h>
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#include <mach/keypad.h>
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@ -138,98 +136,6 @@ static struct platform_device h4_flash_device = {
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.resource = &h4_flash_resource,
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.resource = &h4_flash_resource,
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};
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};
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/* Select between the IrDA and aGPS module
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*/
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static int h4_select_irda(struct device *dev, int state)
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{
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unsigned char expa;
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int err = 0;
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if ((err = read_gpio_expa(&expa, 0x21))) {
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printk(KERN_ERR "Error reading from I/O expander\n");
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return err;
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}
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/* 'P6' enable/disable IRDA_TX and IRDA_RX */
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if (state & IR_SEL) { /* IrDa */
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if ((err = write_gpio_expa(expa | 0x01, 0x21))) {
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printk(KERN_ERR "Error writing to I/O expander\n");
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return err;
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}
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} else {
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if ((err = write_gpio_expa(expa & ~0x01, 0x21))) {
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printk(KERN_ERR "Error writing to I/O expander\n");
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return err;
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}
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}
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return err;
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}
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static void set_trans_mode(struct work_struct *work)
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{
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struct omap_irda_config *irda_config =
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container_of(work, struct omap_irda_config, gpio_expa.work);
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int mode = irda_config->mode;
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unsigned char expa;
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int err = 0;
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|
||||||
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|
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if ((err = read_gpio_expa(&expa, 0x20)) != 0) {
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printk(KERN_ERR "Error reading from I/O expander\n");
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}
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expa &= ~0x01;
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if (!(mode & IR_SIRMODE)) { /* MIR/FIR */
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expa |= 0x01;
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}
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if ((err = write_gpio_expa(expa, 0x20)) != 0) {
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printk(KERN_ERR "Error writing to I/O expander\n");
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}
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}
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static int h4_transceiver_mode(struct device *dev, int mode)
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{
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|
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struct omap_irda_config *irda_config = dev->platform_data;
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irda_config->mode = mode;
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cancel_delayed_work(&irda_config->gpio_expa);
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PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
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schedule_delayed_work(&irda_config->gpio_expa, 0);
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|
||||||
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|
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return 0;
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|
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}
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||||||
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|
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static struct omap_irda_config h4_irda_data = {
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|
||||||
.transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
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|
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.transceiver_mode = h4_transceiver_mode,
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||||||
.select_irda = h4_select_irda,
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|
||||||
.rx_channel = OMAP24XX_DMA_UART3_RX,
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|
||||||
.tx_channel = OMAP24XX_DMA_UART3_TX,
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|
||||||
.dest_start = OMAP_UART3_BASE,
|
|
||||||
.src_start = OMAP_UART3_BASE,
|
|
||||||
.tx_trigger = OMAP24XX_DMA_UART3_TX,
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|
||||||
.rx_trigger = OMAP24XX_DMA_UART3_RX,
|
|
||||||
};
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|
||||||
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|
||||||
static struct resource h4_irda_resources[] = {
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|
||||||
[0] = {
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|
||||||
.start = INT_24XX_UART3_IRQ,
|
|
||||||
.end = INT_24XX_UART3_IRQ,
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|
||||||
.flags = IORESOURCE_IRQ,
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|
||||||
},
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|
||||||
};
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|
||||||
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|
||||||
static struct platform_device h4_irda_device = {
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|
||||||
.name = "omapirda",
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|
||||||
.id = -1,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &h4_irda_data,
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|
||||||
},
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|
||||||
.num_resources = 1,
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|
||||||
.resource = h4_irda_resources,
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|
||||||
};
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|
||||||
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|
||||||
static struct omap_kp_platform_data h4_kp_data = {
|
static struct omap_kp_platform_data h4_kp_data = {
|
||||||
.rows = 6,
|
.rows = 6,
|
||||||
.cols = 7,
|
.cols = 7,
|
||||||
|
@ -255,7 +161,6 @@ static struct platform_device h4_lcd_device = {
|
||||||
|
|
||||||
static struct platform_device *h4_devices[] __initdata = {
|
static struct platform_device *h4_devices[] __initdata = {
|
||||||
&h4_flash_device,
|
&h4_flash_device,
|
||||||
&h4_irda_device,
|
|
||||||
&h4_kp_device,
|
&h4_kp_device,
|
||||||
&h4_lcd_device,
|
&h4_lcd_device,
|
||||||
};
|
};
|
||||||
|
|
|
@ -42,6 +42,7 @@
|
||||||
#include <mach/nand.h>
|
#include <mach/nand.h>
|
||||||
#include <mach/mux.h>
|
#include <mach/mux.h>
|
||||||
#include <mach/usb.h>
|
#include <mach/usb.h>
|
||||||
|
#include <mach/timer-gp.h>
|
||||||
|
|
||||||
#include "mmc-twl4030.h"
|
#include "mmc-twl4030.h"
|
||||||
|
|
||||||
|
@ -186,6 +187,9 @@ static void __init omap3_beagle_init_irq(void)
|
||||||
{
|
{
|
||||||
omap2_init_common_hw(NULL);
|
omap2_init_common_hw(NULL);
|
||||||
omap_init_irq();
|
omap_init_irq();
|
||||||
|
#ifdef CONFIG_OMAP_32K_TIMER
|
||||||
|
omap2_gp_clockevent_set_gptimer(12);
|
||||||
|
#endif
|
||||||
omap_gpio_init();
|
omap_gpio_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -15,7 +15,6 @@
|
||||||
#include <linux/err.h>
|
#include <linux/err.h>
|
||||||
#include <linux/clk.h>
|
#include <linux/clk.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/delay.h>
|
|
||||||
#include <linux/gpio.h>
|
#include <linux/gpio.h>
|
||||||
|
|
||||||
#include <mach/hardware.h>
|
#include <mach/hardware.h>
|
||||||
|
|
|
@ -60,12 +60,13 @@ struct omap_clk {
|
||||||
}, \
|
}, \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define CK_243X (1 << 0)
|
#define CK_243X RATE_IN_243X
|
||||||
#define CK_242X (1 << 1)
|
#define CK_242X RATE_IN_242X
|
||||||
|
|
||||||
static struct omap_clk omap24xx_clks[] = {
|
static struct omap_clk omap24xx_clks[] = {
|
||||||
/* external root sources */
|
/* external root sources */
|
||||||
CLK(NULL, "func_32k_ck", &func_32k_ck, CK_243X | CK_242X),
|
CLK(NULL, "func_32k_ck", &func_32k_ck, CK_243X | CK_242X),
|
||||||
|
CLK(NULL, "secure_32k_ck", &secure_32k_ck, CK_243X | CK_242X),
|
||||||
CLK(NULL, "osc_ck", &osc_ck, CK_243X | CK_242X),
|
CLK(NULL, "osc_ck", &osc_ck, CK_243X | CK_242X),
|
||||||
CLK(NULL, "sys_ck", &sys_ck, CK_243X | CK_242X),
|
CLK(NULL, "sys_ck", &sys_ck, CK_243X | CK_242X),
|
||||||
CLK(NULL, "alt_ck", &alt_ck, CK_243X | CK_242X),
|
CLK(NULL, "alt_ck", &alt_ck, CK_243X | CK_242X),
|
||||||
|
@ -711,7 +712,7 @@ int __init omap2_clk_init(void)
|
||||||
{
|
{
|
||||||
struct prcm_config *prcm;
|
struct prcm_config *prcm;
|
||||||
struct omap_clk *c;
|
struct omap_clk *c;
|
||||||
u32 clkrate, cpu_mask;
|
u32 clkrate;
|
||||||
|
|
||||||
if (cpu_is_omap242x())
|
if (cpu_is_omap242x())
|
||||||
cpu_mask = RATE_IN_242X;
|
cpu_mask = RATE_IN_242X;
|
||||||
|
@ -720,20 +721,14 @@ int __init omap2_clk_init(void)
|
||||||
|
|
||||||
clk_init(&omap2_clk_functions);
|
clk_init(&omap2_clk_functions);
|
||||||
|
|
||||||
|
for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
|
||||||
|
clk_init_one(c->lk.clk);
|
||||||
|
|
||||||
osc_ck.rate = omap2_osc_clk_recalc(&osc_ck);
|
osc_ck.rate = omap2_osc_clk_recalc(&osc_ck);
|
||||||
propagate_rate(&osc_ck);
|
propagate_rate(&osc_ck);
|
||||||
sys_ck.rate = omap2_sys_clk_recalc(&sys_ck);
|
sys_ck.rate = omap2_sys_clk_recalc(&sys_ck);
|
||||||
propagate_rate(&sys_ck);
|
propagate_rate(&sys_ck);
|
||||||
|
|
||||||
for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
|
|
||||||
clk_init_one(c->lk.clk);
|
|
||||||
|
|
||||||
cpu_mask = 0;
|
|
||||||
if (cpu_is_omap2420())
|
|
||||||
cpu_mask |= CK_242X;
|
|
||||||
if (cpu_is_omap2430())
|
|
||||||
cpu_mask |= CK_243X;
|
|
||||||
|
|
||||||
for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
|
for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
|
||||||
if (c->cpu & cpu_mask) {
|
if (c->cpu & cpu_mask) {
|
||||||
clkdev_add(&c->lk);
|
clkdev_add(&c->lk);
|
||||||
|
|
|
@ -625,6 +625,14 @@ static struct clk func_32k_ck = {
|
||||||
.clkdm_name = "wkup_clkdm",
|
.clkdm_name = "wkup_clkdm",
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static struct clk secure_32k_ck = {
|
||||||
|
.name = "secure_32k_ck",
|
||||||
|
.ops = &clkops_null,
|
||||||
|
.rate = 32768,
|
||||||
|
.flags = RATE_FIXED,
|
||||||
|
.clkdm_name = "wkup_clkdm",
|
||||||
|
};
|
||||||
|
|
||||||
/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
|
/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
|
||||||
static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */
|
static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */
|
||||||
.name = "osc_ck",
|
.name = "osc_ck",
|
||||||
|
@ -1790,7 +1798,7 @@ static struct clk gpt12_ick = {
|
||||||
static struct clk gpt12_fck = {
|
static struct clk gpt12_fck = {
|
||||||
.name = "gpt12_fck",
|
.name = "gpt12_fck",
|
||||||
.ops = &clkops_omap2_dflt_wait,
|
.ops = &clkops_omap2_dflt_wait,
|
||||||
.parent = &func_32k_ck,
|
.parent = &secure_32k_ck,
|
||||||
.clkdm_name = "core_l4_clkdm",
|
.clkdm_name = "core_l4_clkdm",
|
||||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
|
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
|
||||||
.enable_bit = OMAP24XX_EN_GPT12_SHIFT,
|
.enable_bit = OMAP24XX_EN_GPT12_SHIFT,
|
||||||
|
|
|
@ -2052,7 +2052,7 @@ static struct clk dss_ick = {
|
||||||
|
|
||||||
static struct clk cam_mclk = {
|
static struct clk cam_mclk = {
|
||||||
.name = "cam_mclk",
|
.name = "cam_mclk",
|
||||||
.ops = &clkops_omap2_dflt_wait,
|
.ops = &clkops_omap2_dflt,
|
||||||
.parent = &dpll4_m5x2_ck,
|
.parent = &dpll4_m5x2_ck,
|
||||||
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
|
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
|
||||||
.enable_bit = OMAP3430_EN_CAM_SHIFT,
|
.enable_bit = OMAP3430_EN_CAM_SHIFT,
|
||||||
|
@ -2063,7 +2063,7 @@ static struct clk cam_mclk = {
|
||||||
static struct clk cam_ick = {
|
static struct clk cam_ick = {
|
||||||
/* Handles both L3 and L4 clocks */
|
/* Handles both L3 and L4 clocks */
|
||||||
.name = "cam_ick",
|
.name = "cam_ick",
|
||||||
.ops = &clkops_omap2_dflt_wait,
|
.ops = &clkops_omap2_dflt,
|
||||||
.parent = &l4_ick,
|
.parent = &l4_ick,
|
||||||
.init = &omap2_init_clk_clkdm,
|
.init = &omap2_init_clk_clkdm,
|
||||||
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
|
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
|
||||||
|
@ -2074,7 +2074,7 @@ static struct clk cam_ick = {
|
||||||
|
|
||||||
static struct clk csi2_96m_fck = {
|
static struct clk csi2_96m_fck = {
|
||||||
.name = "csi2_96m_fck",
|
.name = "csi2_96m_fck",
|
||||||
.ops = &clkops_omap2_dflt_wait,
|
.ops = &clkops_omap2_dflt,
|
||||||
.parent = &core_96m_fck,
|
.parent = &core_96m_fck,
|
||||||
.init = &omap2_init_clk_clkdm,
|
.init = &omap2_init_clk_clkdm,
|
||||||
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
|
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
|
||||||
|
@ -2901,7 +2901,6 @@ static struct clk sr_l4_ick = {
|
||||||
|
|
||||||
/* SECURE_32K_FCK clocks */
|
/* SECURE_32K_FCK clocks */
|
||||||
|
|
||||||
/* XXX This clock no longer exists in 3430 TRM rev F */
|
|
||||||
static struct clk gpt12_fck = {
|
static struct clk gpt12_fck = {
|
||||||
.name = "gpt12_fck",
|
.name = "gpt12_fck",
|
||||||
.ops = &clkops_null,
|
.ops = &clkops_null,
|
||||||
|
|
|
@ -25,7 +25,6 @@
|
||||||
#include <mach/board.h>
|
#include <mach/board.h>
|
||||||
#include <mach/mux.h>
|
#include <mach/mux.h>
|
||||||
#include <mach/gpio.h>
|
#include <mach/gpio.h>
|
||||||
#include <mach/eac.h>
|
|
||||||
#include <mach/mmc.h>
|
#include <mach/mmc.h>
|
||||||
|
|
||||||
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
|
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
|
||||||
|
@ -366,38 +365,6 @@ static void omap_init_mcspi(void)
|
||||||
static inline void omap_init_mcspi(void) {}
|
static inline void omap_init_mcspi(void) {}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_SND_OMAP24XX_EAC
|
|
||||||
|
|
||||||
#define OMAP2_EAC_BASE 0x48090000
|
|
||||||
|
|
||||||
static struct resource omap2_eac_resources[] = {
|
|
||||||
{
|
|
||||||
.start = OMAP2_EAC_BASE,
|
|
||||||
.end = OMAP2_EAC_BASE + 0x109,
|
|
||||||
.flags = IORESOURCE_MEM,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device omap2_eac_device = {
|
|
||||||
.name = "omap24xx-eac",
|
|
||||||
.id = -1,
|
|
||||||
.num_resources = ARRAY_SIZE(omap2_eac_resources),
|
|
||||||
.resource = omap2_eac_resources,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = NULL,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
void omap_init_eac(struct eac_platform_data *pdata)
|
|
||||||
{
|
|
||||||
omap2_eac_device.dev.platform_data = pdata;
|
|
||||||
platform_device_register(&omap2_eac_device);
|
|
||||||
}
|
|
||||||
|
|
||||||
#else
|
|
||||||
void omap_init_eac(struct eac_platform_data *pdata) {}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_OMAP_SHA1_MD5
|
#ifdef CONFIG_OMAP_SHA1_MD5
|
||||||
static struct resource sha1_md5_resources[] = {
|
static struct resource sha1_md5_resources[] = {
|
||||||
{
|
{
|
||||||
|
|
|
@ -73,9 +73,9 @@ static int omap_check_spurious(unsigned int irq)
|
||||||
u32 sir, spurious;
|
u32 sir, spurious;
|
||||||
|
|
||||||
sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR);
|
sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR);
|
||||||
spurious = sir >> 6;
|
spurious = sir >> 7;
|
||||||
|
|
||||||
if (spurious > 1) {
|
if (spurious) {
|
||||||
printk(KERN_WARNING "Spurious irq %i: 0x%08x, please flush "
|
printk(KERN_WARNING "Spurious irq %i: 0x%08x, please flush "
|
||||||
"posted write for irq %i\n",
|
"posted write for irq %i\n",
|
||||||
irq, sir, previous_irq);
|
irq, sir, previous_irq);
|
||||||
|
|
|
@ -3,6 +3,8 @@
|
||||||
*
|
*
|
||||||
* OMAP2 GP timer support.
|
* OMAP2 GP timer support.
|
||||||
*
|
*
|
||||||
|
* Copyright (C) 2009 Nokia Corporation
|
||||||
|
*
|
||||||
* Update to use new clocksource/clockevent layers
|
* Update to use new clocksource/clockevent layers
|
||||||
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
||||||
* Copyright (C) 2007 MontaVista Software, Inc.
|
* Copyright (C) 2007 MontaVista Software, Inc.
|
||||||
|
@ -36,8 +38,13 @@
|
||||||
#include <asm/mach/time.h>
|
#include <asm/mach/time.h>
|
||||||
#include <mach/dmtimer.h>
|
#include <mach/dmtimer.h>
|
||||||
|
|
||||||
|
/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
|
||||||
|
#define MAX_GPTIMER_ID 12
|
||||||
|
|
||||||
static struct omap_dm_timer *gptimer;
|
static struct omap_dm_timer *gptimer;
|
||||||
static struct clock_event_device clockevent_gpt;
|
static struct clock_event_device clockevent_gpt;
|
||||||
|
static u8 __initdata gptimer_id = 1;
|
||||||
|
static u8 __initdata inited;
|
||||||
|
|
||||||
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
|
@ -95,20 +102,53 @@ static struct clock_event_device clockevent_gpt = {
|
||||||
.set_mode = omap2_gp_timer_set_mode,
|
.set_mode = omap2_gp_timer_set_mode,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents
|
||||||
|
* @id: GPTIMER to use (1..MAX_GPTIMER_ID)
|
||||||
|
*
|
||||||
|
* Define the GPTIMER that the system should use for the tick timer.
|
||||||
|
* Meant to be called from board-*.c files in the event that GPTIMER1, the
|
||||||
|
* default, is unsuitable. Returns -EINVAL on error or 0 on success.
|
||||||
|
*/
|
||||||
|
int __init omap2_gp_clockevent_set_gptimer(u8 id)
|
||||||
|
{
|
||||||
|
if (id < 1 || id > MAX_GPTIMER_ID)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
BUG_ON(inited);
|
||||||
|
|
||||||
|
gptimer_id = id;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
static void __init omap2_gp_clockevent_init(void)
|
static void __init omap2_gp_clockevent_init(void)
|
||||||
{
|
{
|
||||||
u32 tick_rate;
|
u32 tick_rate;
|
||||||
|
int src;
|
||||||
|
|
||||||
gptimer = omap_dm_timer_request_specific(1);
|
inited = 1;
|
||||||
|
|
||||||
|
gptimer = omap_dm_timer_request_specific(gptimer_id);
|
||||||
BUG_ON(gptimer == NULL);
|
BUG_ON(gptimer == NULL);
|
||||||
|
|
||||||
#if defined(CONFIG_OMAP_32K_TIMER)
|
#if defined(CONFIG_OMAP_32K_TIMER)
|
||||||
omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ);
|
src = OMAP_TIMER_SRC_32_KHZ;
|
||||||
#else
|
#else
|
||||||
omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
|
src = OMAP_TIMER_SRC_SYS_CLK;
|
||||||
|
WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the "
|
||||||
|
"secure 32KiHz clock source\n");
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
if (gptimer_id != 12)
|
||||||
|
WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)),
|
||||||
|
"timer-gp: omap_dm_timer_set_source() failed\n");
|
||||||
|
|
||||||
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
|
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
|
||||||
|
|
||||||
|
pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
|
||||||
|
gptimer_id, tick_rate);
|
||||||
|
|
||||||
omap2_gp_timer_irq.dev_id = (void *)gptimer;
|
omap2_gp_timer_irq.dev_id = (void *)gptimer;
|
||||||
setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
|
setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
|
||||||
omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
|
omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
|
||||||
|
@ -125,6 +165,8 @@ static void __init omap2_gp_clockevent_init(void)
|
||||||
clockevents_register_device(&clockevent_gpt);
|
clockevents_register_device(&clockevent_gpt);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Clocksource code */
|
||||||
|
|
||||||
#ifdef CONFIG_OMAP_32K_TIMER
|
#ifdef CONFIG_OMAP_32K_TIMER
|
||||||
/*
|
/*
|
||||||
* When 32k-timer is enabled, don't use GPTimer for clocksource
|
* When 32k-timer is enabled, don't use GPTimer for clocksource
|
||||||
|
|
|
@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk)
|
||||||
unsigned sysclk_ps;
|
unsigned sysclk_ps;
|
||||||
int status;
|
int status;
|
||||||
|
|
||||||
if (!refclk_psec)
|
if (!refclk_psec || sysclk_ps == 0)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
|
sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
|
||||||
|
|
|
@ -239,6 +239,13 @@ void recalculate_root_clocks(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* clk_init_one - initialize any fields in the struct clk before clk init
|
||||||
|
* @clk: struct clk * to initialize
|
||||||
|
*
|
||||||
|
* Initialize any struct clk fields needed before normal clk initialization
|
||||||
|
* can run. No return value.
|
||||||
|
*/
|
||||||
void clk_init_one(struct clk *clk)
|
void clk_init_one(struct clk *clk)
|
||||||
{
|
{
|
||||||
INIT_LIST_HEAD(&clk->children);
|
INIT_LIST_HEAD(&clk->children);
|
||||||
|
|
|
@ -760,19 +760,12 @@ void omap_free_dma(int lch)
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&dma_chan_lock, flags);
|
|
||||||
if (dma_chan[lch].dev_id == -1) {
|
if (dma_chan[lch].dev_id == -1) {
|
||||||
pr_err("omap_dma: trying to free unallocated DMA channel %d\n",
|
pr_err("omap_dma: trying to free unallocated DMA channel %d\n",
|
||||||
lch);
|
lch);
|
||||||
spin_unlock_irqrestore(&dma_chan_lock, flags);
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
dma_chan[lch].dev_id = -1;
|
|
||||||
dma_chan[lch].next_lch = -1;
|
|
||||||
dma_chan[lch].callback = NULL;
|
|
||||||
spin_unlock_irqrestore(&dma_chan_lock, flags);
|
|
||||||
|
|
||||||
if (cpu_class_is_omap1()) {
|
if (cpu_class_is_omap1()) {
|
||||||
/* Disable all DMA interrupts for the channel. */
|
/* Disable all DMA interrupts for the channel. */
|
||||||
dma_write(0, CICR(lch));
|
dma_write(0, CICR(lch));
|
||||||
|
@ -798,6 +791,12 @@ void omap_free_dma(int lch)
|
||||||
dma_write(0, CCR(lch));
|
dma_write(0, CCR(lch));
|
||||||
omap_clear_dma(lch);
|
omap_clear_dma(lch);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
spin_lock_irqsave(&dma_chan_lock, flags);
|
||||||
|
dma_chan[lch].dev_id = -1;
|
||||||
|
dma_chan[lch].next_lch = -1;
|
||||||
|
dma_chan[lch].callback = NULL;
|
||||||
|
spin_unlock_irqrestore(&dma_chan_lock, flags);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(omap_free_dma);
|
EXPORT_SYMBOL(omap_free_dma);
|
||||||
|
|
||||||
|
|
|
@ -238,7 +238,7 @@ static struct omap_dm_timer omap3_dm_timers[] = {
|
||||||
{ .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 },
|
{ .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 },
|
||||||
{ .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
|
{ .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
|
||||||
{ .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
|
{ .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
|
||||||
{ .phys_base = 0x48304000, .irq = INT_24XX_GPTIMER12 },
|
{ .phys_base = 0x48304000, .irq = INT_34XX_GPT12_IRQ },
|
||||||
};
|
};
|
||||||
|
|
||||||
static const char *omap3_dm_source_names[] __initdata = {
|
static const char *omap3_dm_source_names[] __initdata = {
|
||||||
|
@ -321,11 +321,9 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
|
||||||
l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */
|
l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Enable wake-up only for GPT1 on OMAP2 CPUs.
|
* Enable wake-up on OMAP2 CPUs.
|
||||||
* FIXME: All timers should have wake-up enabled and clear
|
|
||||||
* PRCM status.
|
|
||||||
*/
|
*/
|
||||||
if (cpu_class_is_omap2() && (timer == &dm_timers[0]))
|
if (cpu_class_is_omap2())
|
||||||
l |= 1 << 2;
|
l |= 1 << 2;
|
||||||
omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
|
omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
|
||||||
|
|
||||||
|
@ -511,7 +509,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_OMAP1
|
#ifdef CONFIG_ARCH_OMAP1
|
||||||
|
|
||||||
void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
|
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
|
||||||
{
|
{
|
||||||
int n = (timer - dm_timers) << 1;
|
int n = (timer - dm_timers) << 1;
|
||||||
u32 l;
|
u32 l;
|
||||||
|
@ -519,23 +517,31 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
|
||||||
l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
|
l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
|
||||||
l |= source << n;
|
l |= source << n;
|
||||||
omap_writel(l, MOD_CONF_CTRL_1);
|
omap_writel(l, MOD_CONF_CTRL_1);
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
|
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
|
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
|
||||||
{
|
{
|
||||||
|
int ret = -EINVAL;
|
||||||
|
|
||||||
if (source < 0 || source >= 3)
|
if (source < 0 || source >= 3)
|
||||||
return;
|
return -EINVAL;
|
||||||
|
|
||||||
clk_disable(timer->fclk);
|
clk_disable(timer->fclk);
|
||||||
clk_set_parent(timer->fclk, dm_source_clocks[source]);
|
ret = clk_set_parent(timer->fclk, dm_source_clocks[source]);
|
||||||
clk_enable(timer->fclk);
|
clk_enable(timer->fclk);
|
||||||
|
|
||||||
/* When the functional clock disappears, too quick writes seem to
|
/*
|
||||||
* cause an abort. */
|
* When the functional clock disappears, too quick writes seem
|
||||||
|
* to cause an abort. XXX Is this still necessary?
|
||||||
|
*/
|
||||||
__delay(150000);
|
__delay(150000);
|
||||||
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
|
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
|
||||||
|
|
||||||
|
|
|
@ -758,8 +758,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
|
||||||
|
|
||||||
/* Workaround for clearing DSP GPIO interrupts to allow retention */
|
/* Workaround for clearing DSP GPIO interrupts to allow retention */
|
||||||
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
|
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
|
||||||
|
reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
|
||||||
if (cpu_is_omap24xx() || cpu_is_omap34xx())
|
if (cpu_is_omap24xx() || cpu_is_omap34xx())
|
||||||
__raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2);
|
__raw_writel(gpio_mask, reg);
|
||||||
|
|
||||||
|
/* Flush posted write for the irq status to avoid spurious interrupts */
|
||||||
|
__raw_readl(reg);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -921,13 +925,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
|
||||||
case METHOD_MPUIO:
|
case METHOD_MPUIO:
|
||||||
case METHOD_GPIO_1610:
|
case METHOD_GPIO_1610:
|
||||||
spin_lock_irqsave(&bank->lock, flags);
|
spin_lock_irqsave(&bank->lock, flags);
|
||||||
if (enable) {
|
if (enable)
|
||||||
bank->suspend_wakeup |= (1 << gpio);
|
bank->suspend_wakeup |= (1 << gpio);
|
||||||
enable_irq_wake(bank->irq);
|
else
|
||||||
} else {
|
|
||||||
disable_irq_wake(bank->irq);
|
|
||||||
bank->suspend_wakeup &= ~(1 << gpio);
|
bank->suspend_wakeup &= ~(1 << gpio);
|
||||||
}
|
|
||||||
spin_unlock_irqrestore(&bank->lock, flags);
|
spin_unlock_irqrestore(&bank->lock, flags);
|
||||||
return 0;
|
return 0;
|
||||||
#endif
|
#endif
|
||||||
|
@ -940,13 +941,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
spin_lock_irqsave(&bank->lock, flags);
|
spin_lock_irqsave(&bank->lock, flags);
|
||||||
if (enable) {
|
if (enable)
|
||||||
bank->suspend_wakeup |= (1 << gpio);
|
bank->suspend_wakeup |= (1 << gpio);
|
||||||
enable_irq_wake(bank->irq);
|
else
|
||||||
} else {
|
|
||||||
disable_irq_wake(bank->irq);
|
|
||||||
bank->suspend_wakeup &= ~(1 << gpio);
|
bank->suspend_wakeup &= ~(1 << gpio);
|
||||||
}
|
|
||||||
spin_unlock_irqrestore(&bank->lock, flags);
|
spin_unlock_irqrestore(&bank->lock, flags);
|
||||||
return 0;
|
return 0;
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -64,7 +64,7 @@ void omap_dm_timer_trigger(struct omap_dm_timer *timer);
|
||||||
void omap_dm_timer_start(struct omap_dm_timer *timer);
|
void omap_dm_timer_start(struct omap_dm_timer *timer);
|
||||||
void omap_dm_timer_stop(struct omap_dm_timer *timer);
|
void omap_dm_timer_stop(struct omap_dm_timer *timer);
|
||||||
|
|
||||||
void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
|
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
|
||||||
void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
|
void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
|
||||||
void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
|
void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
|
||||||
void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
|
void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
|
||||||
|
|
|
@ -1,100 +0,0 @@
|
||||||
/*
|
|
||||||
* arch/arm/plat-omap/include/mach2/eac.h
|
|
||||||
*
|
|
||||||
* Defines for Enhanced Audio Controller
|
|
||||||
*
|
|
||||||
* Contact: Jarkko Nikula <jarkko.nikula@nokia.com>
|
|
||||||
*
|
|
||||||
* Copyright (C) 2006 Nokia Corporation
|
|
||||||
* Copyright (C) 2004 Texas Instruments, Inc.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License
|
|
||||||
* version 2 as published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful, but
|
|
||||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
||||||
* General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
|
||||||
* 02110-1301 USA
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __ASM_ARM_ARCH_OMAP2_EAC_H
|
|
||||||
#define __ASM_ARM_ARCH_OMAP2_EAC_H
|
|
||||||
|
|
||||||
#include <mach/io.h>
|
|
||||||
#include <mach/hardware.h>
|
|
||||||
#include <asm/irq.h>
|
|
||||||
|
|
||||||
#include <sound/core.h>
|
|
||||||
|
|
||||||
/* master codec clock source */
|
|
||||||
#define EAC_MCLK_EXT_MASK 0x100
|
|
||||||
enum eac_mclk_src {
|
|
||||||
EAC_MCLK_INT_11290000, /* internal 96 MHz / 8.5 = 11.29 Mhz */
|
|
||||||
EAC_MCLK_EXT_11289600 = EAC_MCLK_EXT_MASK,
|
|
||||||
EAC_MCLK_EXT_12288000,
|
|
||||||
EAC_MCLK_EXT_2x11289600,
|
|
||||||
EAC_MCLK_EXT_2x12288000,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* codec port interface mode */
|
|
||||||
enum eac_codec_mode {
|
|
||||||
EAC_CODEC_PCM,
|
|
||||||
EAC_CODEC_AC97,
|
|
||||||
EAC_CODEC_I2S_MASTER, /* codec port, I.e. EAC is the master */
|
|
||||||
EAC_CODEC_I2S_SLAVE,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* configuration structure for I2S mode */
|
|
||||||
struct eac_i2s_conf {
|
|
||||||
/* if enabled, then first data slot (left channel) is signaled as
|
|
||||||
* positive level of frame sync EAC.AC_FS */
|
|
||||||
unsigned polarity_changed_mode:1;
|
|
||||||
/* if enabled, then serial data starts one clock cycle after the
|
|
||||||
* of EAC.AC_FS for first audio slot */
|
|
||||||
unsigned sync_delay_enable:1;
|
|
||||||
};
|
|
||||||
|
|
||||||
/* configuration structure for EAC codec port */
|
|
||||||
struct eac_codec {
|
|
||||||
enum eac_mclk_src mclk_src;
|
|
||||||
|
|
||||||
enum eac_codec_mode codec_mode;
|
|
||||||
union {
|
|
||||||
struct eac_i2s_conf i2s;
|
|
||||||
} codec_conf;
|
|
||||||
|
|
||||||
int default_rate; /* audio sampling rate */
|
|
||||||
|
|
||||||
int (* set_power)(void *private_data, int dac, int adc);
|
|
||||||
int (* register_controls)(void *private_data,
|
|
||||||
struct snd_card *card);
|
|
||||||
const char *short_name;
|
|
||||||
|
|
||||||
void *private_data;
|
|
||||||
};
|
|
||||||
|
|
||||||
/* structure for passing platform dependent data to the EAC driver */
|
|
||||||
struct eac_platform_data {
|
|
||||||
int (* init)(struct device *eac_dev);
|
|
||||||
void (* cleanup)(struct device *eac_dev);
|
|
||||||
/* these callbacks are used to configure & control external MCLK
|
|
||||||
* source. NULL if not used */
|
|
||||||
int (* enable_ext_clocks)(struct device *eac_dev);
|
|
||||||
void (* disable_ext_clocks)(struct device *eac_dev);
|
|
||||||
};
|
|
||||||
|
|
||||||
extern void omap_init_eac(struct eac_platform_data *pdata);
|
|
||||||
|
|
||||||
extern int eac_register_codec(struct device *eac_dev, struct eac_codec *codec);
|
|
||||||
extern void eac_unregister_codec(struct device *eac_dev);
|
|
||||||
|
|
||||||
extern int eac_set_mode(struct device *eac_dev, int play, int rec);
|
|
||||||
|
|
||||||
#endif /* __ASM_ARM_ARCH_OMAP2_EAC_H */
|
|
|
@ -1,35 +0,0 @@
|
||||||
/*
|
|
||||||
* arch/arm/plat-omap/include/mach/gpioexpander.h
|
|
||||||
*
|
|
||||||
*
|
|
||||||
* Copyright (C) 2004 Texas Instruments, Inc.
|
|
||||||
*
|
|
||||||
* This package is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License version 2 as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
|
|
||||||
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
|
|
||||||
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __ASM_ARCH_OMAP_GPIOEXPANDER_H
|
|
||||||
#define __ASM_ARCH_OMAP_GPIOEXPANDER_H
|
|
||||||
|
|
||||||
/* Function Prototypes for GPIO Expander functions */
|
|
||||||
|
|
||||||
#ifdef CONFIG_GPIOEXPANDER_OMAP
|
|
||||||
int read_gpio_expa(u8 *, int);
|
|
||||||
int write_gpio_expa(u8 , int);
|
|
||||||
#else
|
|
||||||
static inline int read_gpio_expa(u8 *val, int addr)
|
|
||||||
{
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
static inline int write_gpio_expa(u8 val, int addr)
|
|
||||||
{
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* __ASM_ARCH_OMAP_GPIOEXPANDER_H */
|
|
|
@ -21,10 +21,6 @@ struct omap_irda_config {
|
||||||
int transceiver_cap;
|
int transceiver_cap;
|
||||||
int (*transceiver_mode)(struct device *dev, int mode);
|
int (*transceiver_mode)(struct device *dev, int mode);
|
||||||
int (*select_irda)(struct device *dev, int state);
|
int (*select_irda)(struct device *dev, int state);
|
||||||
/* Very specific to the needs of some platforms (h3,h4)
|
|
||||||
* having calls which can sleep in irda_set_speed.
|
|
||||||
*/
|
|
||||||
struct delayed_work gpio_expa;
|
|
||||||
int rx_channel;
|
int rx_channel;
|
||||||
int tx_channel;
|
int tx_channel;
|
||||||
unsigned long dest_start;
|
unsigned long dest_start;
|
||||||
|
|
|
@ -79,7 +79,6 @@ struct omap_mmc_platform_data {
|
||||||
|
|
||||||
/* use the internal clock */
|
/* use the internal clock */
|
||||||
unsigned internal_clock:1;
|
unsigned internal_clock:1;
|
||||||
s16 power_pin;
|
|
||||||
|
|
||||||
int switch_pin; /* gpio (card detect) */
|
int switch_pin; /* gpio (card detect) */
|
||||||
int gpio_wp; /* gpio (write protect) */
|
int gpio_wp; /* gpio (write protect) */
|
||||||
|
|
|
@ -0,0 +1,17 @@
|
||||||
|
/*
|
||||||
|
* OMAP2/3 GPTIMER support.headers
|
||||||
|
*
|
||||||
|
* Copyright (C) 2009 Nokia Corporation
|
||||||
|
*
|
||||||
|
* This file is subject to the terms and conditions of the GNU General Public
|
||||||
|
* License. See the file "COPYING" in the main directory of this archive
|
||||||
|
* for more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
|
||||||
|
#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
|
||||||
|
|
||||||
|
int __init omap2_gp_clockevent_set_gptimer(u8 id);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
|
@ -157,8 +157,6 @@ struct mmc_omap_host {
|
||||||
struct timer_list dma_timer;
|
struct timer_list dma_timer;
|
||||||
unsigned dma_len;
|
unsigned dma_len;
|
||||||
|
|
||||||
short power_pin;
|
|
||||||
|
|
||||||
struct mmc_omap_slot *slots[OMAP_MMC_MAX_SLOTS];
|
struct mmc_omap_slot *slots[OMAP_MMC_MAX_SLOTS];
|
||||||
struct mmc_omap_slot *current_slot;
|
struct mmc_omap_slot *current_slot;
|
||||||
spinlock_t slot_lock;
|
spinlock_t slot_lock;
|
||||||
|
|
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