[SCSI] megaraid_sas: zcr with fix
The patch adds support for a ZCR controller (Device ID : 0x413). It also has a critical bug fix : Disable controller interrupt before firing INIT cmd to FW. Interrupt is enabled after required initialization is over. This is done to ensure that driver is ready to handle interrupts when it is generated by the controller. Signed-off-by: Sumant Patro <Sumant.Patro@lsil.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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0e98936c92
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@ -1,4 +1,20 @@
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1 Release Date : Sun May 14 22:49:52 PDT 2006 - Sumant Patro <Sumant.Patro@lsil.com>
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2 Current Version : 00.00.03.01
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3 Older Version : 00.00.02.04
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i. Added support for ZCR controller.
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New device id 0x413 added.
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ii. Bug fix : Disable controller interrupt before firing INIT cmd to FW.
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Interrupt is enabled after required initialization is over.
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This is done to ensure that driver is ready to handle interrupts when
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it is generated by the controller.
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-Sumant Patro <Sumant.Patro@lsil.com>
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1 Release Date : Wed Feb 03 14:31:44 PST 2006 - Sumant Patro <Sumant.Patro@lsil.com>
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2 Current Version : 00.00.02.04
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3 Older Version : 00.00.02.04
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@ -10,7 +10,7 @@
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* 2 of the License, or (at your option) any later version.
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*
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* FILE : megaraid_sas.c
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* Version : v00.00.02.04
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* Version : v00.00.03.01
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*
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* Authors:
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* Sreenivas Bagalkote <Sreenivas.Bagalkote@lsil.com>
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@ -55,19 +55,25 @@ static struct pci_device_id megasas_pci_table[] = {
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{
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PCI_VENDOR_ID_LSI_LOGIC,
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PCI_DEVICE_ID_LSI_SAS1064R, // xscale IOP
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PCI_DEVICE_ID_LSI_SAS1064R, /* xscale IOP */
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PCI_ANY_ID,
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PCI_ANY_ID,
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},
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{
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PCI_VENDOR_ID_LSI_LOGIC,
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PCI_DEVICE_ID_LSI_SAS1078R, // ppc IOP
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PCI_DEVICE_ID_LSI_SAS1078R, /* ppc IOP */
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PCI_ANY_ID,
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PCI_ANY_ID,
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},
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{
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PCI_VENDOR_ID_LSI_LOGIC,
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PCI_DEVICE_ID_LSI_VERDE_ZCR, /* xscale IOP, vega */
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PCI_ANY_ID,
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PCI_ANY_ID,
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},
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{
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PCI_VENDOR_ID_DELL,
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PCI_DEVICE_ID_DELL_PERC5, // xscale IOP
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PCI_DEVICE_ID_DELL_PERC5, /* xscale IOP */
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PCI_ANY_ID,
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PCI_ANY_ID,
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},
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@ -289,9 +295,14 @@ static struct megasas_instance_template megasas_instance_template_ppc = {
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* @regs: MFI register set
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*/
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static inline void
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megasas_disable_intr(struct megasas_register_set __iomem * regs)
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megasas_disable_intr(struct megasas_instance *instance)
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{
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u32 mask = 0x1f;
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struct megasas_register_set __iomem *regs = instance->reg_set;
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if(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1078R)
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mask = 0xffffffff;
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writel(mask, ®s->outbound_intr_mask);
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/* Dummy readl to force pci flush */
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@ -1260,7 +1271,7 @@ megasas_transition_to_ready(struct megasas_instance* instance)
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/*
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* Bring it to READY state; assuming max wait 2 secs
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*/
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megasas_disable_intr(instance->reg_set);
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megasas_disable_intr(instance);
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writel(MFI_INIT_READY, &instance->reg_set->inbound_doorbell);
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max_wait = 10;
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@ -1756,6 +1767,11 @@ static int megasas_init_mfi(struct megasas_instance *instance)
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init_frame->data_xfer_len = sizeof(struct megasas_init_queue_info);
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/*
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* disable the intr before firing the init frame to FW
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*/
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megasas_disable_intr(instance);
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/*
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* Issue the init frame in polled mode
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*/
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@ -2234,7 +2250,7 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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megasas_mgmt_info.max_index--;
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pci_set_drvdata(pdev, NULL);
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megasas_disable_intr(instance->reg_set);
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megasas_disable_intr(instance);
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free_irq(instance->pdev->irq, instance);
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megasas_release_mfi(instance);
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@ -2364,7 +2380,7 @@ static void megasas_detach_one(struct pci_dev *pdev)
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pci_set_drvdata(instance->pdev, NULL);
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megasas_disable_intr(instance->reg_set);
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megasas_disable_intr(instance);
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free_irq(instance->pdev->irq, instance);
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@ -18,9 +18,16 @@
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/**
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* MegaRAID SAS Driver meta data
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*/
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#define MEGASAS_VERSION "00.00.02.04"
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#define MEGASAS_RELDATE "Feb 03, 2006"
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#define MEGASAS_EXT_VERSION "Fri Feb 03 14:31:44 PST 2006"
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#define MEGASAS_VERSION "00.00.03.01"
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#define MEGASAS_RELDATE "May 14, 2006"
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#define MEGASAS_EXT_VERSION "Sun May 14 22:49:52 PDT 2006"
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/*
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* Device IDs
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*/
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#define PCI_DEVICE_ID_LSI_SAS1078R 0x0060
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#define PCI_DEVICE_ID_LSI_VERDE_ZCR 0x0413
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/*
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* =====================================
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* MegaRAID SAS MFI firmware definitions
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@ -554,7 +561,11 @@ struct megasas_ctrl_info {
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#define MFI_POLL_TIMEOUT_SECS 10
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#define MFI_REPLY_1078_MESSAGE_INTERRUPT 0x80000000
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#define PCI_DEVICE_ID_LSI_SAS1078R 0x00000060
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/*
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* register set for both 1068 and 1078 controllers
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* structure extended for 1078 registers
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*/
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struct megasas_register_set {
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u32 reserved_0[4]; /*0000h*/
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@ -1150,10 +1161,10 @@ struct compat_megasas_iocpacket {
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struct compat_iovec sgl[MAX_IOCTL_SGE];
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} __attribute__ ((packed));
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#define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket)
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#endif
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#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
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#define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket)
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#define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen)
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struct megasas_mgmt_info {
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