gpio: dwapb: Convert driver to using the GPIO-lib-based IRQ-chip
GPIO-lib provides a ready-to-use interface to initialize an IRQ-chip on
top of a GPIO chip. It's better from maintainability and readability
point of view to use one instead of supporting a hand-written Generic
IRQ-chip-based implementation. Moreover the new implementation won't
cause much functional overhead but will provide a cleaner driver code.
All of that makes the DW APB GPIO driver conversion pretty much justified
especially seeing a tendency of the other GPIO drivers getting converted
too.
Here is what we do in the framework of this commit to convert the driver
to using the GPIO-lib-based IRQ-chip interface:
1) IRQ ack, mask and unmask callbacks are locally defined instead of
using the Generic IRQ-chip ones.
2) An irq_chip structure instance is embedded into the dwapb_gpio
private data. Note we can't have a static instance of that structure since
GPIO-lib will add some hooks into it by calling gpiochip_set_irq_hooks().
A warning about that would have been printed by the GPIO-lib code if we
used a single irq_chip structure instance for multiple DW APB GPIO
controllers.
3) Initialize the gpio_irq_chip structure embedded into the gpio_chip
descriptor. By default there is no IRQ enabled so any event raised will be
handled by the handle_bad_irq() IRQ flow handler. If DW APB GPIO IP-core
is synthesized to have non-shared reference IRQ-lines, then as before the
hierarchical and cascaded cases are distinguished by checking how many
parental IRQs are defined. (Note irq_set_chained_handler_and_data() won't
initialize IRQs, which descriptors couldn't be found.) If DW APB GPIO IP
is used on a platform with shared IRQ line, then we simply won't let the
GPIO-lib to initialize the parental IRQs, but will handle them locally in
the driver.
4) Discard linear IRQ-domain and Generic IRQ-chip initialization, since
GPIO-lib IRQ-chip interface will create a new domain and accept a standard
IRQ-chip structure pointer based on the setting we provided in the
gpio_irq_chip structure.
5) Manually select a proper IRQ flow handler directly in the
irq_set_type() callback by calling irq_set_handler_locked() method, since
an ordinary (not Generic) irq_chip descriptor is now utilized. Note this
shalln't give any regression
6) Alter CONFIG_GPIO_DWAPB kernel config to select
CONFIG_GPIOLIB_IRQCHIP instead of CONFIG_GENERIC_IRQ_CHIP.
Note neither 4) nor 5) shall cause a regression of commit 6a2f4b7dad
("gpio: dwapb: use a second irq chip"), since the later isn't properly
used here anyway.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20200730152808.2955-6-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Родитель
f9f890ba2b
Коммит
0ea683931a
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@ -202,7 +202,7 @@ config GPIO_DAVINCI
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config GPIO_DWAPB
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config GPIO_DWAPB
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tristate "Synopsys DesignWare APB GPIO driver"
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tristate "Synopsys DesignWare APB GPIO driver"
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select GPIO_GENERIC
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select GPIO_GENERIC
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select GENERIC_IRQ_CHIP
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select GPIOLIB_IRQCHIP
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help
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help
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Say Y or M here to build support for the Synopsys DesignWare APB
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Say Y or M here to build support for the Synopsys DesignWare APB
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GPIO block.
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GPIO block.
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@ -13,7 +13,6 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_address.h>
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@ -83,8 +82,15 @@ struct dwapb_context {
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};
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};
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#endif
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#endif
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struct dwapb_gpio_port_irqchip {
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struct irq_chip irqchip;
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unsigned int nr_irqs;
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unsigned int irq[DWAPB_MAX_GPIOS];
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};
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struct dwapb_gpio_port {
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struct dwapb_gpio_port {
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struct gpio_chip gc;
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struct gpio_chip gc;
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struct dwapb_gpio_port_irqchip *pirq;
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bool is_registered;
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bool is_registered;
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struct dwapb_gpio *gpio;
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struct dwapb_gpio *gpio;
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#ifdef CONFIG_PM_SLEEP
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#ifdef CONFIG_PM_SLEEP
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@ -92,13 +98,14 @@ struct dwapb_gpio_port {
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#endif
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#endif
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unsigned int idx;
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unsigned int idx;
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};
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};
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#define to_dwapb_gpio(_gc) \
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(container_of(_gc, struct dwapb_gpio_port, gc)->gpio)
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struct dwapb_gpio {
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struct dwapb_gpio {
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struct device *dev;
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struct device *dev;
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void __iomem *regs;
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void __iomem *regs;
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struct dwapb_gpio_port *ports;
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struct dwapb_gpio_port *ports;
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unsigned int nr_ports;
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unsigned int nr_ports;
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struct irq_domain *domain;
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unsigned int flags;
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unsigned int flags;
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struct reset_control *rst;
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struct reset_control *rst;
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struct clk_bulk_data clks[DWAPB_NR_CLOCKS];
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struct clk_bulk_data clks[DWAPB_NR_CLOCKS];
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@ -193,12 +200,13 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
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static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
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static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
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{
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{
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struct gpio_chip *gc = &gpio->ports[0].gc;
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unsigned long irq_status;
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unsigned long irq_status;
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irq_hw_number_t hwirq;
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irq_hw_number_t hwirq;
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irq_status = dwapb_read(gpio, GPIO_INTSTATUS);
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irq_status = dwapb_read(gpio, GPIO_INTSTATUS);
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for_each_set_bit(hwirq, &irq_status, DWAPB_MAX_GPIOS) {
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for_each_set_bit(hwirq, &irq_status, DWAPB_MAX_GPIOS) {
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int gpio_irq = irq_find_mapping(gpio->domain, hwirq);
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int gpio_irq = irq_find_mapping(gc->irq.domain, hwirq);
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u32 irq_type = irq_get_trigger_type(gpio_irq);
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u32 irq_type = irq_get_trigger_type(gpio_irq);
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generic_handle_irq(gpio_irq);
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generic_handle_irq(gpio_irq);
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@ -225,11 +233,48 @@ static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id)
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return IRQ_RETVAL(dwapb_do_irq(dev_id));
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return IRQ_RETVAL(dwapb_do_irq(dev_id));
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}
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}
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static void dwapb_irq_ack(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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u32 val = BIT(irqd_to_hwirq(d));
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unsigned long flags;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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dwapb_write(gpio, GPIO_PORTA_EOI, val);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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}
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static void dwapb_irq_mask(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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unsigned long flags;
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u32 val;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
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dwapb_write(gpio, GPIO_INTMASK, val);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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}
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static void dwapb_irq_unmask(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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unsigned long flags;
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u32 val;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
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dwapb_write(gpio, GPIO_INTMASK, val);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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}
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static void dwapb_irq_enable(struct irq_data *d)
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static void dwapb_irq_enable(struct irq_data *d)
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{
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{
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struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = igc->private;
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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struct gpio_chip *gc = &gpio->ports[0].gc;
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unsigned long flags;
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unsigned long flags;
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u32 val;
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u32 val;
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@ -242,9 +287,8 @@ static void dwapb_irq_enable(struct irq_data *d)
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static void dwapb_irq_disable(struct irq_data *d)
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static void dwapb_irq_disable(struct irq_data *d)
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{
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{
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struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = igc->private;
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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struct gpio_chip *gc = &gpio->ports[0].gc;
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unsigned long flags;
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unsigned long flags;
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u32 val;
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u32 val;
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@ -257,9 +301,8 @@ static void dwapb_irq_disable(struct irq_data *d)
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static int dwapb_irq_set_type(struct irq_data *d, u32 type)
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static int dwapb_irq_set_type(struct irq_data *d, u32 type)
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{
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{
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struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = igc->private;
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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struct gpio_chip *gc = &gpio->ports[0].gc;
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irq_hw_number_t bit = irqd_to_hwirq(d);
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irq_hw_number_t bit = irqd_to_hwirq(d);
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unsigned long level, polarity, flags;
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unsigned long level, polarity, flags;
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@ -293,7 +336,10 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
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break;
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break;
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}
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}
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irq_setup_alt_chip(d, type);
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if (type & IRQ_TYPE_LEVEL_MASK)
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irq_set_handler_locked(d, handle_level_irq);
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else if (type & IRQ_TYPE_EDGE_BOTH)
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irq_set_handler_locked(d, handle_edge_irq);
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dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
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dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
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if (type != IRQ_TYPE_EDGE_BOTH)
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if (type != IRQ_TYPE_EDGE_BOTH)
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@ -354,79 +400,67 @@ static int dwapb_gpio_set_config(struct gpio_chip *gc, unsigned offset,
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return dwapb_gpio_set_debounce(gc, offset, debounce);
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return dwapb_gpio_set_debounce(gc, offset, debounce);
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}
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}
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static int dwapb_convert_irqs(struct dwapb_gpio_port_irqchip *pirq,
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struct dwapb_port_property *pp)
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{
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int i;
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/* Group all available IRQs into an array of parental IRQs. */
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for (i = 0; i < pp->ngpio; ++i) {
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if (!pp->irq[i])
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continue;
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pirq->irq[pirq->nr_irqs++] = pp->irq[i];
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}
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return pirq->nr_irqs ? 0 : -ENOENT;
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}
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static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
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static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
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struct dwapb_gpio_port *port,
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struct dwapb_gpio_port *port,
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struct dwapb_port_property *pp)
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struct dwapb_port_property *pp)
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{
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{
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struct dwapb_gpio_port_irqchip *pirq;
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struct gpio_chip *gc = &port->gc;
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struct gpio_chip *gc = &port->gc;
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struct fwnode_handle *fwnode = pp->fwnode;
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struct gpio_irq_chip *girq;
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struct irq_chip_generic *irq_gc = NULL;
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int err;
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unsigned int ngpio = gc->ngpio;
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struct irq_chip_type *ct;
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irq_hw_number_t hwirq;
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int err, i;
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if (memchr_inv(pp->irq, 0, sizeof(pp->irq)) == NULL) {
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pirq = devm_kzalloc(gpio->dev, sizeof(*pirq), GFP_KERNEL);
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if (!pirq)
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return;
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if (dwapb_convert_irqs(pirq, pp)) {
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dev_warn(gpio->dev, "no IRQ for port%d\n", pp->idx);
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dev_warn(gpio->dev, "no IRQ for port%d\n", pp->idx);
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return;
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goto err_kfree_pirq;
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}
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}
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gpio->domain = irq_domain_create_linear(fwnode, ngpio,
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girq = &gc->irq;
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&irq_generic_chip_ops, gpio);
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girq->handler = handle_bad_irq;
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if (!gpio->domain)
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girq->default_type = IRQ_TYPE_NONE;
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return;
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err = irq_alloc_domain_generic_chips(gpio->domain, ngpio, 2,
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port->pirq = pirq;
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DWAPB_DRIVER_NAME, handle_bad_irq,
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pirq->irqchip.name = DWAPB_DRIVER_NAME;
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IRQ_NOREQUEST, 0,
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pirq->irqchip.irq_ack = dwapb_irq_ack;
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IRQ_GC_INIT_NESTED_LOCK);
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pirq->irqchip.irq_mask = dwapb_irq_mask;
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if (err) {
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pirq->irqchip.irq_unmask = dwapb_irq_unmask;
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dev_info(gpio->dev, "irq_alloc_domain_generic_chips failed\n");
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pirq->irqchip.irq_set_type = dwapb_irq_set_type;
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irq_domain_remove(gpio->domain);
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pirq->irqchip.irq_enable = dwapb_irq_enable;
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gpio->domain = NULL;
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pirq->irqchip.irq_disable = dwapb_irq_disable;
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return;
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}
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irq_gc = irq_get_domain_generic_chip(gpio->domain, 0);
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if (!irq_gc) {
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irq_domain_remove(gpio->domain);
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gpio->domain = NULL;
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return;
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}
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irq_gc->reg_base = gpio->regs;
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irq_gc->private = gpio;
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for (i = 0; i < 2; i++) {
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ct = &irq_gc->chip_types[i];
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ct->chip.irq_ack = irq_gc_ack_set_bit;
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ct->chip.irq_mask = irq_gc_mask_set_bit;
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ct->chip.irq_unmask = irq_gc_mask_clr_bit;
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ct->chip.irq_set_type = dwapb_irq_set_type;
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ct->chip.irq_enable = dwapb_irq_enable;
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ct->chip.irq_disable = dwapb_irq_disable;
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#ifdef CONFIG_PM_SLEEP
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#ifdef CONFIG_PM_SLEEP
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ct->chip.irq_set_wake = dwapb_irq_set_wake;
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pirq->irqchip.irq_set_wake = dwapb_irq_set_wake;
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#endif
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#endif
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ct->regs.ack = gpio_reg_convert(gpio, GPIO_PORTA_EOI);
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ct->regs.mask = gpio_reg_convert(gpio, GPIO_INTMASK);
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ct->type = IRQ_TYPE_LEVEL_MASK;
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}
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|
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|
|
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irq_gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK;
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irq_gc->chip_types[0].handler = handle_level_irq;
|
|
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irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;
|
|
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irq_gc->chip_types[1].handler = handle_edge_irq;
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|
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|
|
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if (!pp->irq_shared) {
|
if (!pp->irq_shared) {
|
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int i;
|
girq->num_parents = pirq->nr_irqs;
|
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|
girq->parents = pirq->irq;
|
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for (i = 0; i < pp->ngpio; i++) {
|
girq->parent_handler_data = gpio;
|
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if (pp->irq[i])
|
girq->parent_handler = dwapb_irq_handler;
|
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irq_set_chained_handler_and_data(pp->irq[i],
|
|
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dwapb_irq_handler, gpio);
|
|
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}
|
|
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} else {
|
} else {
|
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|
/* This will let us handle the parent IRQ in the driver */
|
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|
girq->num_parents = 0;
|
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|
girq->parents = NULL;
|
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|
girq->parent_handler = NULL;
|
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|
|
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/*
|
/*
|
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* Request a shared IRQ since where MFD would have devices
|
* Request a shared IRQ since where MFD would have devices
|
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* using the same irq pin
|
* using the same irq pin
|
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|
@ -436,33 +470,18 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
|
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IRQF_SHARED, DWAPB_DRIVER_NAME, gpio);
|
IRQF_SHARED, DWAPB_DRIVER_NAME, gpio);
|
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if (err) {
|
if (err) {
|
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dev_err(gpio->dev, "error requesting IRQ\n");
|
dev_err(gpio->dev, "error requesting IRQ\n");
|
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irq_domain_remove(gpio->domain);
|
goto err_kfree_pirq;
|
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gpio->domain = NULL;
|
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for (hwirq = 0; hwirq < ngpio; hwirq++)
|
girq->chip = &pirq->irqchip;
|
||||||
irq_create_mapping(gpio->domain, hwirq);
|
|
||||||
|
|
||||||
port->gc.to_irq = dwapb_gpio_to_irq;
|
port->gc.to_irq = dwapb_gpio_to_irq;
|
||||||
}
|
|
||||||
|
|
||||||
static void dwapb_irq_teardown(struct dwapb_gpio *gpio)
|
return;
|
||||||
{
|
|
||||||
struct dwapb_gpio_port *port = &gpio->ports[0];
|
|
||||||
struct gpio_chip *gc = &port->gc;
|
|
||||||
unsigned int ngpio = gc->ngpio;
|
|
||||||
irq_hw_number_t hwirq;
|
|
||||||
|
|
||||||
if (!gpio->domain)
|
err_kfree_pirq:
|
||||||
return;
|
devm_kfree(gpio->dev, pirq);
|
||||||
|
|
||||||
for (hwirq = 0; hwirq < ngpio; hwirq++)
|
|
||||||
irq_dispose_mapping(irq_find_mapping(gpio->domain, hwirq));
|
|
||||||
|
|
||||||
irq_domain_remove(gpio->domain);
|
|
||||||
gpio->domain = NULL;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
|
static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
|
||||||
|
@ -699,7 +718,6 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
out_unregister:
|
out_unregister:
|
||||||
dwapb_gpio_unregister(gpio);
|
dwapb_gpio_unregister(gpio);
|
||||||
dwapb_irq_teardown(gpio);
|
|
||||||
clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks);
|
clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks);
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
@ -710,7 +728,6 @@ static int dwapb_gpio_remove(struct platform_device *pdev)
|
||||||
struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
|
struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
|
||||||
|
|
||||||
dwapb_gpio_unregister(gpio);
|
dwapb_gpio_unregister(gpio);
|
||||||
dwapb_irq_teardown(gpio);
|
|
||||||
reset_control_assert(gpio->rst);
|
reset_control_assert(gpio->rst);
|
||||||
clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks);
|
clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks);
|
||||||
|
|
||||||
|
|
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