spi/spi-sh: add IORESOURCE_MEM_TYPE_MASK decoding for access size
This SPI controller's access size is 32, or 8-bit. The previous driver supported 32-bit only. So, this patch adds IORESOURCE_MEM_TYPE_MASK decoding, an then, the driver can handle the SPI controller of 8-bit. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Родитель
d5a8003135
Коммит
0eb8880fac
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@ -92,17 +92,26 @@ struct spi_sh_data {
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unsigned long cr1;
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wait_queue_head_t wait;
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spinlock_t lock;
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int width;
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};
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static void spi_sh_write(struct spi_sh_data *ss, unsigned long data,
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unsigned long offset)
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{
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writel(data, ss->addr + offset);
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if (ss->width == 8)
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iowrite8(data, ss->addr + (offset >> 2));
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else if (ss->width == 32)
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iowrite32(data, ss->addr + offset);
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}
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static unsigned long spi_sh_read(struct spi_sh_data *ss, unsigned long offset)
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{
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return readl(ss->addr + offset);
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if (ss->width == 8)
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return ioread8(ss->addr + (offset >> 2));
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else if (ss->width == 32)
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return ioread32(ss->addr + offset);
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else
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return 0;
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}
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static void spi_sh_set_bit(struct spi_sh_data *ss, unsigned long val,
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@ -464,6 +473,18 @@ static int __devinit spi_sh_probe(struct platform_device *pdev)
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ss = spi_master_get_devdata(master);
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dev_set_drvdata(&pdev->dev, ss);
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switch (res->flags & IORESOURCE_MEM_TYPE_MASK) {
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case IORESOURCE_MEM_8BIT:
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ss->width = 8;
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break;
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case IORESOURCE_MEM_32BIT:
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ss->width = 32;
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break;
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default:
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dev_err(&pdev->dev, "No support width\n");
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ret = -ENODEV;
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goto error1;
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}
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ss->irq = irq;
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ss->master = master;
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ss->addr = ioremap(res->start, resource_size(res));
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