ARM: mx28: Fix registers range
Fix registers range. Cc: stable@vger.kernel.org Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Fabio Estevam
Shawn Guo
Родитель
640bf0607c
Коммит
0f06cde734
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@ -57,18 +57,18 @@
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};
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hsadc@80002000 {
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reg = <0x80002000 2000>;
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reg = <0x80002000 0x2000>;
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interrupts = <13 87>;
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status = "disabled";
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};
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dma-apbh@80004000 {
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compatible = "fsl,imx28-dma-apbh";
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reg = <0x80004000 2000>;
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reg = <0x80004000 0x2000>;
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};
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perfmon@80006000 {
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reg = <0x80006000 800>;
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reg = <0x80006000 0x800>;
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interrupts = <27>;
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status = "disabled";
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};
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@ -77,7 +77,7 @@
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compatible = "fsl,imx28-gpmi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x8000c000 2000>, <0x8000a000 2000>;
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reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
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reg-names = "gpmi-nand", "bch";
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interrupts = <88>, <41>;
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interrupt-names = "gpmi-dma", "bch";
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@ -86,28 +86,28 @@
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};
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ssp0: ssp@80010000 {
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reg = <0x80010000 2000>;
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reg = <0x80010000 0x2000>;
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interrupts = <96 82>;
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fsl,ssp-dma-channel = <0>;
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status = "disabled";
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};
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ssp1: ssp@80012000 {
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reg = <0x80012000 2000>;
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reg = <0x80012000 0x2000>;
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interrupts = <97 83>;
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fsl,ssp-dma-channel = <1>;
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status = "disabled";
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};
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ssp2: ssp@80014000 {
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reg = <0x80014000 2000>;
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reg = <0x80014000 0x2000>;
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interrupts = <98 84>;
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fsl,ssp-dma-channel = <2>;
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status = "disabled";
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};
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ssp3: ssp@80016000 {
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reg = <0x80016000 2000>;
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reg = <0x80016000 0x2000>;
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interrupts = <99 85>;
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fsl,ssp-dma-channel = <3>;
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status = "disabled";
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@ -117,7 +117,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-pinctrl", "simple-bus";
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reg = <0x80018000 2000>;
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reg = <0x80018000 0x2000>;
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gpio0: gpio@0 {
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compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
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@ -510,96 +510,96 @@
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};
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digctl@8001c000 {
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reg = <0x8001c000 2000>;
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reg = <0x8001c000 0x2000>;
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interrupts = <89>;
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status = "disabled";
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};
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etm@80022000 {
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reg = <0x80022000 2000>;
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reg = <0x80022000 0x2000>;
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status = "disabled";
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};
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dma-apbx@80024000 {
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compatible = "fsl,imx28-dma-apbx";
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reg = <0x80024000 2000>;
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reg = <0x80024000 0x2000>;
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};
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dcp@80028000 {
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reg = <0x80028000 2000>;
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reg = <0x80028000 0x2000>;
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interrupts = <52 53 54>;
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status = "disabled";
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};
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pxp@8002a000 {
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reg = <0x8002a000 2000>;
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reg = <0x8002a000 0x2000>;
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interrupts = <39>;
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status = "disabled";
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};
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ocotp@8002c000 {
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reg = <0x8002c000 2000>;
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reg = <0x8002c000 0x2000>;
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status = "disabled";
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};
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axi-ahb@8002e000 {
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reg = <0x8002e000 2000>;
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reg = <0x8002e000 0x2000>;
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status = "disabled";
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};
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lcdif@80030000 {
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compatible = "fsl,imx28-lcdif";
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reg = <0x80030000 2000>;
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reg = <0x80030000 0x2000>;
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interrupts = <38 86>;
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status = "disabled";
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};
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can0: can@80032000 {
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compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
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reg = <0x80032000 2000>;
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reg = <0x80032000 0x2000>;
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interrupts = <8>;
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status = "disabled";
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};
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can1: can@80034000 {
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compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
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reg = <0x80034000 2000>;
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reg = <0x80034000 0x2000>;
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interrupts = <9>;
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status = "disabled";
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};
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simdbg@8003c000 {
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reg = <0x8003c000 200>;
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reg = <0x8003c000 0x200>;
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status = "disabled";
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};
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simgpmisel@8003c200 {
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reg = <0x8003c200 100>;
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reg = <0x8003c200 0x100>;
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status = "disabled";
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};
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simsspsel@8003c300 {
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reg = <0x8003c300 100>;
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reg = <0x8003c300 0x100>;
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status = "disabled";
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};
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simmemsel@8003c400 {
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reg = <0x8003c400 100>;
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reg = <0x8003c400 0x100>;
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status = "disabled";
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};
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gpiomon@8003c500 {
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reg = <0x8003c500 100>;
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reg = <0x8003c500 0x100>;
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status = "disabled";
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};
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simenet@8003c700 {
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reg = <0x8003c700 100>;
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reg = <0x8003c700 0x100>;
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status = "disabled";
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};
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armjtag@8003c800 {
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reg = <0x8003c800 100>;
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reg = <0x8003c800 0x100>;
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status = "disabled";
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};
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};
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@ -612,45 +612,45 @@
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ranges;
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clkctl@80040000 {
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reg = <0x80040000 2000>;
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reg = <0x80040000 0x2000>;
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status = "disabled";
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};
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saif0: saif@80042000 {
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compatible = "fsl,imx28-saif";
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reg = <0x80042000 2000>;
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reg = <0x80042000 0x2000>;
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interrupts = <59 80>;
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fsl,saif-dma-channel = <4>;
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status = "disabled";
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};
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power@80044000 {
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reg = <0x80044000 2000>;
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reg = <0x80044000 0x2000>;
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status = "disabled";
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};
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saif1: saif@80046000 {
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compatible = "fsl,imx28-saif";
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reg = <0x80046000 2000>;
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reg = <0x80046000 0x2000>;
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interrupts = <58 81>;
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fsl,saif-dma-channel = <5>;
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status = "disabled";
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};
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lradc@80050000 {
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reg = <0x80050000 2000>;
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reg = <0x80050000 0x2000>;
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status = "disabled";
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};
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spdif@80054000 {
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reg = <0x80054000 2000>;
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reg = <0x80054000 0x2000>;
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interrupts = <45 66>;
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status = "disabled";
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};
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rtc@80056000 {
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compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
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reg = <0x80056000 2000>;
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reg = <0x80056000 0x2000>;
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interrupts = <29>;
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};
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@ -658,7 +658,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-i2c";
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reg = <0x80058000 2000>;
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reg = <0x80058000 0x2000>;
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interrupts = <111 68>;
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clock-frequency = <100000>;
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status = "disabled";
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@ -668,7 +668,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-i2c";
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reg = <0x8005a000 2000>;
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reg = <0x8005a000 0x2000>;
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interrupts = <110 69>;
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clock-frequency = <100000>;
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status = "disabled";
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@ -676,14 +676,14 @@
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pwm: pwm@80064000 {
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compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
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reg = <0x80064000 2000>;
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reg = <0x80064000 0x2000>;
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#pwm-cells = <2>;
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fsl,pwm-number = <8>;
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status = "disabled";
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};
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timrot@80068000 {
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reg = <0x80068000 2000>;
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reg = <0x80068000 0x2000>;
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status = "disabled";
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};
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