drm/rockchip: dw-mipi-dsi: pass mode in where needed
This shows that we only use the mode from the enable function and prepares us to remove the "mode" field and the mode_set hook in the next commit. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-3-john@metanate.com
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5e408d7a28
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0f2c3ad54a
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@ -330,11 +330,11 @@ static int max_mbps_to_testdin(unsigned int max_mbps)
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* The controller should generate 2 frames before
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* preparing the peripheral.
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*/
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static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
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static void dw_mipi_dsi_wait_for_two_frames(struct drm_display_mode *mode)
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{
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int refresh, two_frames;
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refresh = drm_mode_vrefresh(dsi->mode);
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refresh = drm_mode_vrefresh(mode);
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two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
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msleep(two_frames);
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}
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@ -459,7 +459,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
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return ret;
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}
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static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
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static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi,
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struct drm_display_mode *mode)
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{
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unsigned int i, pre;
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unsigned long mpclk, pllref, tmp;
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@ -474,7 +475,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
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return bpp;
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}
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mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
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mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);
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if (mpclk) {
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/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
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tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
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@ -742,43 +743,44 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
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/* Get lane byte clock cycles. */
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static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
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struct drm_display_mode *mode,
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u32 hcomponent)
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{
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u32 frac, lbcc;
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lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
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frac = lbcc % dsi->mode->clock;
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lbcc = lbcc / dsi->mode->clock;
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frac = lbcc % mode->clock;
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lbcc = lbcc / mode->clock;
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if (frac)
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lbcc++;
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return lbcc;
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}
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static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
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static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi,
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struct drm_display_mode *mode)
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{
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u32 htotal, hsa, hbp, lbcc;
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struct drm_display_mode *mode = dsi->mode;
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htotal = mode->htotal;
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hsa = mode->hsync_end - mode->hsync_start;
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hbp = mode->htotal - mode->hsync_end;
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lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal);
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lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal);
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dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);
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lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa);
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lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa);
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dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);
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lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp);
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lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp);
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dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);
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}
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static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
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static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi,
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struct drm_display_mode *mode)
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{
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u32 vactive, vsa, vfp, vbp;
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struct drm_display_mode *mode = dsi->mode;
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vactive = mode->vdisplay;
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vsa = mode->vsync_end - mode->vsync_start;
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@ -852,11 +854,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
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static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
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{
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struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
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struct drm_display_mode *mode = dsi->mode;
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int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder);
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u32 val;
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int ret;
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ret = dw_mipi_dsi_get_lane_bps(dsi);
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ret = dw_mipi_dsi_get_lane_bps(dsi, mode);
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if (ret < 0)
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return;
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@ -866,13 +869,13 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
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}
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dw_mipi_dsi_init(dsi);
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dw_mipi_dsi_dpi_config(dsi, dsi->mode);
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dw_mipi_dsi_dpi_config(dsi, mode);
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dw_mipi_dsi_packet_handler_config(dsi);
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dw_mipi_dsi_video_mode_config(dsi);
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dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
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dw_mipi_dsi_video_packet_config(dsi, mode);
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dw_mipi_dsi_command_mode_config(dsi);
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dw_mipi_dsi_line_timer_config(dsi);
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dw_mipi_dsi_vertical_timing_config(dsi);
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dw_mipi_dsi_line_timer_config(dsi, mode);
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dw_mipi_dsi_vertical_timing_config(dsi, mode);
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dw_mipi_dsi_dphy_timing_config(dsi);
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dw_mipi_dsi_dphy_interface_config(dsi);
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dw_mipi_dsi_clear_err(dsi);
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@ -880,7 +883,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
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dev_err(dsi->dev, "failed to prepare panel\n");
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dw_mipi_dsi_phy_init(dsi);
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dw_mipi_dsi_wait_for_two_frames(dsi);
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dw_mipi_dsi_wait_for_two_frames(mode);
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dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
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drm_panel_enable(dsi->panel);
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