drm/i915: Force CPU synchronisation even if userspace requests ASYNC
The goal here was to minimise doing any thing or any check inside the kernel that was not strictly required. For a userspace that assumes complete control over the cache domains, the kernel is usually using outdated information and may trigger clflushes where none were required. However, swapping is a situation where userspace has no knowledge of the domain transfer, and will leave the object in the CPU cache. The kernel must flush this out to the backing storage prior to use with the GPU. As we use an asynchronous task tracked by an implicit fence for this, we also need to cancel the ASYNC flag on the object so that the object will wait for the clflush to complete before being executed. This also absolves userspace of the responsibility imposed by commit77ae995789
("drm/i915: Enable userspace to opt-out of implicit fencing") that its needed to ensure that the object was out of the CPU cache prior to use on the GPU. Fixes:77ae995789
("drm/i915: Enable userspace to opt-out of implicit fencing") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101571 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Link: https://patchwork.freedesktop.org/patch/msgid/20170721145037.25105-5-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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1f727d9e72
Коммит
0f46daa1a2
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@ -114,7 +114,7 @@ i915_clflush_notify(struct i915_sw_fence *fence,
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return NOTIFY_DONE;
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}
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void i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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unsigned int flags)
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{
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struct clflush *clflush;
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@ -128,7 +128,7 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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*/
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if (!i915_gem_object_has_struct_page(obj)) {
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obj->cache_dirty = false;
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return;
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return false;
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}
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/* If the GPU is snooping the contents of the CPU cache,
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@ -140,7 +140,7 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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* tracking.
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*/
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if (!(flags & I915_CLFLUSH_FORCE) && obj->cache_coherent)
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return;
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return false;
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trace_i915_gem_object_clflush(obj);
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@ -179,4 +179,5 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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}
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obj->cache_dirty = false;
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return true;
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}
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@ -28,7 +28,7 @@
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struct drm_i915_private;
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struct drm_i915_gem_object;
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void i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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unsigned int flags);
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#define I915_CLFLUSH_FORCE BIT(0)
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#define I915_CLFLUSH_SYNC BIT(1)
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@ -1826,7 +1826,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
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int err;
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for (i = 0; i < count; i++) {
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const struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
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struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
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struct i915_vma *vma = exec_to_vma(entry);
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struct drm_i915_gem_object *obj = vma->obj;
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@ -1842,12 +1842,14 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
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eb->request->capture_list = capture;
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}
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if (unlikely(obj->cache_dirty && !obj->cache_coherent)) {
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if (i915_gem_clflush_object(obj, 0))
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entry->flags &= ~EXEC_OBJECT_ASYNC;
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}
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if (entry->flags & EXEC_OBJECT_ASYNC)
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goto skip_flushes;
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if (unlikely(obj->cache_dirty && !obj->cache_coherent))
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i915_gem_clflush_object(obj, 0);
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err = i915_gem_request_await_object
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(eb->request, obj, entry->flags & EXEC_OBJECT_WRITE);
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if (err)
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