regulator: max8649 - fix setting extclk_freq
The SYNC bits are BIT6 and BIT7 of MAX8649_SYNC register. pdata->extclk_freq could be [0|1|2]. (MAX8649_EXTCLK_26MHZ|MAX8649_EXTCLK_13MHZ|MAX8649_EXTCLK_19MHZ) It requires to left shift 6 bits to properly set extclk_freq. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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e4a6376b3b
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@ -330,7 +330,7 @@ static int __devinit max8649_regulator_probe(struct i2c_client *client,
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/* set external clock frequency */
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info->extclk_freq = pdata->extclk_freq;
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max8649_set_bits(info->i2c, MAX8649_SYNC, MAX8649_EXT_MASK,
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info->extclk_freq);
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info->extclk_freq << 6);
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}
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if (pdata->ramp_timing) {
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