scsi: qla2xxx: edif: Increase ELS payload
Currently, firmware limits ELS payload to FC frame size/2112. This patch
adjusts memory buffer size to be able to handle max ELS payload.
Link: https://lore.kernel.org/r/20211026115412.27691-11-njavali@marvell.com
Fixes: 84318a9f01
("scsi: qla2xxx: edif: Add send, receive, and accept for auth_els")
Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com>
Signed-off-by: Quinn Tran <qutran@marvell.com>
Signed-off-by: Nilesh Javali <njavali@marvell.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Родитель
91f6f5fbe8
Коммит
0f6d600a26
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@ -2370,7 +2370,7 @@ void qla24xx_auth_els(scsi_qla_host_t *vha, void **pkt, struct rsp_que **rsp)
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return;
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}
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if (totlen > MAX_PAYLOAD) {
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if (totlen > ELS_MAX_PAYLOAD) {
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ql_dbg(ql_dbg_edif, vha, 0x0910d,
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"%s WARNING: verbose ELS frame received (totlen=%x)\n",
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__func__, totlen);
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@ -93,7 +93,6 @@ struct sa_update_28xx {
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};
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#define NUM_ENTRIES 256
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#define MAX_PAYLOAD 1024
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#define PUR_GET 1
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struct dinfo {
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@ -127,6 +126,8 @@ struct enode {
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} u;
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};
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#define RX_ELS_SIZE (roundup(sizeof(struct enode) + ELS_MAX_PAYLOAD, SMP_CACHE_BYTES))
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#define EDIF_SESSION_DOWN(_s) \
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(qla_ini_mode_enabled(_s->vha) && (_s->disc_state == DSC_DELETE_PEND || \
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_s->disc_state == DSC_DELETED || \
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@ -8,7 +8,7 @@
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#define __QLA_EDIF_BSG_H
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/* BSG Vendor specific commands */
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#define ELS_MAX_PAYLOAD 1024
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#define ELS_MAX_PAYLOAD 2112
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#ifndef WWN_SIZE
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#define WWN_SIZE 8
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#endif
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@ -4486,6 +4486,10 @@ qla2x00_init_rings(scsi_qla_host_t *vha)
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(ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
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}
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/* ELS pass through payload is limit by frame size. */
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if (ha->flags.edif_enabled)
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mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
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rval = qla2x00_init_firmware(vha, ha->init_cb_size);
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next_check:
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if (rval) {
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@ -4352,7 +4352,7 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
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/* allocate the purex dma pool */
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ha->purex_dma_pool = dma_pool_create(name, &ha->pdev->dev,
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MAX_PAYLOAD, 8, 0);
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ELS_MAX_PAYLOAD, 8, 0);
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if (!ha->purex_dma_pool) {
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
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