PCI/PM: Split pci_raw_set_power_state()
The transitions from low-power states to D0 and the other way around are unnecessarily tangled in pci_raw_set_power_state() which makes it rather hard to follow. Moreover, the only caller of pci_raw_set_power_state() passing PCI_D0 as its state argument is pci_power_up(), so the code carrying out transitions into D0 can be put directly into that function. Accordingly, move the code handling transitions from low-power states into D0 directly into pci_power_up() and rename the remaining part of pci_raw_set_power_state() to pci_set_low_power_state(), because it only handles transitions into low-power state now. While at it, fix up some white space, update some comments and modify messages printed by pci_power_up() and pci_set_low_power_state() to be less confusing (which is the only expected functional impact of this change). Link: https://lore.kernel.org/r/13038676.uLZWGnKmhe@kreacher Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Rafael J. Wysocki
Bjorn Helgaas
Родитель
9c384ddd6e
Коммит
10aa5377fc
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@ -1068,10 +1068,11 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev)
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}
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/**
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* pci_raw_set_power_state - Use PCI PM registers to set the power state of
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* given PCI device
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* pci_set_low_power_state - Put a PCI device into a low-power state.
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* @dev: PCI device to handle.
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* @state: PCI power state (D0, D1, D2, D3hot) to put the device into.
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* @state: PCI power state (D1, D2, D3hot) to put the device into.
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*
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* Use the device's PCI_PM_CTRL register to put it into a low-power state.
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*
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* RETURN VALUE:
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* -EINVAL if the requested state is invalid.
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@ -1080,10 +1081,9 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev)
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* 0 if device already is in the requested state.
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* 0 if device's power state has been successfully changed.
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*/
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static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
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static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state)
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{
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u16 pmcsr;
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bool need_restore = false;
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/* Check if we're already there */
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if (dev->current_state == state)
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@ -1092,7 +1092,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
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if (!dev->pm_cap)
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return -EIO;
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if (state < PCI_D0 || state > PCI_D3hot)
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if (state < PCI_D1 || state > PCI_D3hot)
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return -EINVAL;
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/*
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@ -1101,8 +1101,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
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* we can go from D1 to D3, but we can't go directly from D3 to D1;
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* we'd have to go from D3 to D0, then to D1.
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*/
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if (state != PCI_D0 && dev->current_state <= PCI_D3cold
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&& dev->current_state > state) {
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if (dev->current_state <= PCI_D3cold && dev->current_state > state) {
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pci_err(dev, "invalid power transition (from %s to %s)\n",
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pci_power_name(dev->current_state),
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pci_power_name(state));
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@ -1116,70 +1115,30 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
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pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
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if (PCI_POSSIBLE_ERROR(pmcsr)) {
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pci_err(dev, "can't change power state from %s to %s (config space inaccessible)\n",
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pci_err(dev, "Unable to change power state from %s to %s, device inaccessible\n",
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pci_power_name(dev->current_state),
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pci_power_name(state));
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return -EIO;
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}
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/*
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* If we're (effectively) in D3, force entire word to 0.
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* This doesn't affect PME_Status, disables PME_En, and
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* sets PowerState to 0.
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*/
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switch (dev->current_state) {
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case PCI_D0:
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case PCI_D1:
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case PCI_D2:
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pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
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pmcsr |= state;
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break;
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case PCI_D3hot:
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case PCI_D3cold:
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case PCI_UNKNOWN: /* Boot-up */
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if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot
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&& !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
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need_restore = true;
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fallthrough; /* force to D0 */
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default:
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pmcsr = 0;
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break;
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}
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pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
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pmcsr |= state;
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/* Enter specified state */
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pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
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/*
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* Mandatory power management transition delays; see PCI PM 1.1
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* 5.6.1 table 18
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*/
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if (state == PCI_D3hot || dev->current_state == PCI_D3hot)
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/* Mandatory power management transition delays; see PCI PM 1.2. */
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if (state == PCI_D3hot)
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pci_dev_d3_sleep(dev);
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else if (state == PCI_D2 || dev->current_state == PCI_D2)
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else if (state == PCI_D2)
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udelay(PCI_PM_D2_DELAY);
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pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
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dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
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dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK;
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if (dev->current_state != state)
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pci_info_ratelimited(dev, "refused to change power state from %s to %s\n",
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pci_power_name(dev->current_state),
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pci_power_name(state));
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/*
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* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT
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* INTERFACE SPECIFICATION, REV. 1.2", a device transitioning
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* from D3hot to D0 _may_ perform an internal reset, thereby
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* going to "D0 Uninitialized" rather than "D0 Initialized".
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* For example, at least some versions of the 3c905B and the
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* 3c556B exhibit this behaviour.
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*
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* At least some laptop BIOSen (e.g. the Thinkpad T21) leave
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* devices in a D3hot state at boot. Consequently, we need to
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* restore at least the BARs so that the device will be
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* accessible to its driver.
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*/
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if (need_restore)
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pci_restore_bars(dev);
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pci_info_ratelimited(dev, "Refused to change power state from %s to %s\n",
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pci_power_name(dev->current_state),
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pci_power_name(state));
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if (dev->bus->self)
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pcie_aspm_pm_state_change(dev->bus->self);
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@ -1312,8 +1271,72 @@ static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout)
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*/
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int pci_power_up(struct pci_dev *dev)
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{
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bool need_restore = false;
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u16 pmcsr;
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pci_platform_power_transition(dev, PCI_D0);
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return pci_raw_set_power_state(dev, PCI_D0);
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if (dev->current_state == PCI_D0)
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return 0;
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if (!dev->pm_cap)
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return -EIO;
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pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
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if (PCI_POSSIBLE_ERROR(pmcsr)) {
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pci_err(dev, "Unable to change power state from %s to D0, device inaccessible\n",
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pci_power_name(dev->current_state));
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return -EIO;
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}
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/*
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* If we're (effectively) in D3, force entire word to 0. This doesn't
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* affect PME_Status, disables PME_En, and sets PowerState to 0.
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*/
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if (dev->current_state >= PCI_D3hot) {
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if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot &&
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!(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
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need_restore = true;
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pmcsr = 0;
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} else {
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pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
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}
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pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
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/* Mandatory transition delays; see PCI PM 1.2. */
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if (dev->current_state == PCI_D3hot)
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pci_dev_d3_sleep(dev);
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else if (dev->current_state == PCI_D2)
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udelay(PCI_PM_D2_DELAY);
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pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
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dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK;
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if (dev->current_state != PCI_D0)
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pci_info_ratelimited(dev, "Refused to change power state from %s to D0\n",
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pci_power_name(dev->current_state));
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/*
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* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT
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* INTERFACE SPECIFICATION, REV. 1.2", a device transitioning
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* from D3hot to D0 _may_ perform an internal reset, thereby
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* going to "D0 Uninitialized" rather than "D0 Initialized".
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* For example, at least some versions of the 3c905B and the
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* 3c556B exhibit this behaviour.
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*
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* At least some laptop BIOSen (e.g. the Thinkpad T21) leave
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* devices in a D3hot state at boot. Consequently, we need to
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* restore at least the BARs so that the device will be
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* accessible to its driver.
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*/
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if (need_restore)
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pci_restore_bars(dev);
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if (dev->bus->self)
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pcie_aspm_pm_state_change(dev->bus->self);
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return 0;
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}
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/**
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@ -1394,7 +1417,7 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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* To put device in D3cold, we put device into D3hot in native
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* way, then put device into D3cold with platform ops
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*/
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error = pci_raw_set_power_state(dev, state > PCI_D3hot ?
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error = pci_set_low_power_state(dev, state > PCI_D3hot ?
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PCI_D3hot : state);
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if (pci_platform_power_transition(dev, state))
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