drm/amd/display: Fix wrong latency assignment for VEGA clock levels
Also drop wrong 10kHz comment Fixes: drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -256,9 +256,8 @@ static void pp_to_dc_clock_levels_with_latency(
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for (i = 0; i < clk_level_info->num_levels; i++) {
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DRM_DEBUG("DM_PPLIB:\t %d\n", pp_clks->data[i].clocks_in_khz);
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/* translate 10kHz to kHz */
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clk_level_info->data[i].clocks_in_khz = pp_clks->data[i].clocks_in_khz;
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clk_level_info->data[i].latency_in_us = pp_clks->data[i].clocks_in_khz;
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clk_level_info->data[i].latency_in_us = pp_clks->data[i].latency_in_us;
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}
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}
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