drm/amd: make a type-safe cgs_device struct. (v2)
This is just a type-safety things to avoid everyone taking void *, it doesn't change anything. v2: agd5f: split out the dal changes into a separate patch. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dave Airlie
Alex Deucher
Родитель
c036554170
Коммит
110e6f26af
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@ -34,7 +34,7 @@
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#define mmACP_AZALIA_I2S_SELECT 0x51d4
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int amd_acp_hw_init(void *cgs_device,
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int amd_acp_hw_init(struct cgs_device *cgs_device,
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unsigned acp_version_major, unsigned acp_version_minor)
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{
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unsigned int acp_mode = ACP_MODE_I2S;
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@ -28,7 +28,7 @@
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#include "cgs_linux.h"
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#include "cgs_common.h"
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int amd_acp_hw_init(void *cgs_device,
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int amd_acp_hw_init(struct cgs_device *cgs_device,
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unsigned acp_version_major, unsigned acp_version_minor);
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#endif /* _ACP_GFX_IF_H */
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@ -1868,15 +1868,8 @@ struct amdgpu_atcs {
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/*
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* CGS
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*/
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void *amdgpu_cgs_create_device(struct amdgpu_device *adev);
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void amdgpu_cgs_destroy_device(void *cgs_device);
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/*
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* CGS
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*/
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void *amdgpu_cgs_create_device(struct amdgpu_device *adev);
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void amdgpu_cgs_destroy_device(void *cgs_device);
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struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
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void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
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/* GPU virtualization */
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@ -30,7 +30,7 @@
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struct amdgpu_acp {
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struct device *parent;
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void *cgs_device;
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struct cgs_device *cgs_device;
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struct amd_acp_private *private;
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struct mfd_cell *acp_cell;
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struct resource *acp_res;
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@ -42,7 +42,7 @@ struct amdgpu_cgs_device {
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struct amdgpu_device *adev = \
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((struct amdgpu_cgs_device *)cgs_device)->adev
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static int amdgpu_cgs_gpu_mem_info(void *cgs_device, enum cgs_gpu_mem_type type,
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static int amdgpu_cgs_gpu_mem_info(struct cgs_device *cgs_device, enum cgs_gpu_mem_type type,
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uint64_t *mc_start, uint64_t *mc_size,
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uint64_t *mem_size)
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{
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@ -73,7 +73,7 @@ static int amdgpu_cgs_gpu_mem_info(void *cgs_device, enum cgs_gpu_mem_type type,
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return 0;
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}
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static int amdgpu_cgs_gmap_kmem(void *cgs_device, void *kmem,
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static int amdgpu_cgs_gmap_kmem(struct cgs_device *cgs_device, void *kmem,
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uint64_t size,
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uint64_t min_offset, uint64_t max_offset,
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cgs_handle_t *kmem_handle, uint64_t *mcaddr)
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@ -102,7 +102,7 @@ static int amdgpu_cgs_gmap_kmem(void *cgs_device, void *kmem,
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return ret;
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}
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static int amdgpu_cgs_gunmap_kmem(void *cgs_device, cgs_handle_t kmem_handle)
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static int amdgpu_cgs_gunmap_kmem(struct cgs_device *cgs_device, cgs_handle_t kmem_handle)
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{
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struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle;
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@ -118,7 +118,7 @@ static int amdgpu_cgs_gunmap_kmem(void *cgs_device, cgs_handle_t kmem_handle)
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return 0;
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}
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static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device,
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static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
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enum cgs_gpu_mem_type type,
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uint64_t size, uint64_t align,
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uint64_t min_offset, uint64_t max_offset,
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@ -208,7 +208,7 @@ static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device,
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return ret;
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}
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static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle)
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static int amdgpu_cgs_free_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
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{
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struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
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@ -225,7 +225,7 @@ static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle)
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return 0;
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}
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static int amdgpu_cgs_gmap_gpu_mem(void *cgs_device, cgs_handle_t handle,
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static int amdgpu_cgs_gmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,
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uint64_t *mcaddr)
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{
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int r;
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@ -246,7 +246,7 @@ static int amdgpu_cgs_gmap_gpu_mem(void *cgs_device, cgs_handle_t handle,
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return r;
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}
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static int amdgpu_cgs_gunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)
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static int amdgpu_cgs_gunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
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{
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int r;
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struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
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@ -258,7 +258,7 @@ static int amdgpu_cgs_gunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)
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return r;
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}
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static int amdgpu_cgs_kmap_gpu_mem(void *cgs_device, cgs_handle_t handle,
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static int amdgpu_cgs_kmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,
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void **map)
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{
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int r;
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@ -271,7 +271,7 @@ static int amdgpu_cgs_kmap_gpu_mem(void *cgs_device, cgs_handle_t handle,
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return r;
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}
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static int amdgpu_cgs_kunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)
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static int amdgpu_cgs_kunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)
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{
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int r;
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struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
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@ -283,20 +283,20 @@ static int amdgpu_cgs_kunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)
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return r;
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}
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static uint32_t amdgpu_cgs_read_register(void *cgs_device, unsigned offset)
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static uint32_t amdgpu_cgs_read_register(struct cgs_device *cgs_device, unsigned offset)
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{
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CGS_FUNC_ADEV;
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return RREG32(offset);
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}
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static void amdgpu_cgs_write_register(void *cgs_device, unsigned offset,
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static void amdgpu_cgs_write_register(struct cgs_device *cgs_device, unsigned offset,
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uint32_t value)
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{
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CGS_FUNC_ADEV;
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WREG32(offset, value);
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}
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static uint32_t amdgpu_cgs_read_ind_register(void *cgs_device,
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static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device,
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enum cgs_ind_reg space,
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unsigned index)
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{
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@ -320,7 +320,7 @@ static uint32_t amdgpu_cgs_read_ind_register(void *cgs_device,
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return 0;
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}
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static void amdgpu_cgs_write_ind_register(void *cgs_device,
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static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device,
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enum cgs_ind_reg space,
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unsigned index, uint32_t value)
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{
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@ -343,7 +343,7 @@ static void amdgpu_cgs_write_ind_register(void *cgs_device,
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WARN(1, "Invalid indirect register space");
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}
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static uint8_t amdgpu_cgs_read_pci_config_byte(void *cgs_device, unsigned addr)
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static uint8_t amdgpu_cgs_read_pci_config_byte(struct cgs_device *cgs_device, unsigned addr)
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{
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CGS_FUNC_ADEV;
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uint8_t val;
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@ -353,7 +353,7 @@ static uint8_t amdgpu_cgs_read_pci_config_byte(void *cgs_device, unsigned addr)
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return val;
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}
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static uint16_t amdgpu_cgs_read_pci_config_word(void *cgs_device, unsigned addr)
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static uint16_t amdgpu_cgs_read_pci_config_word(struct cgs_device *cgs_device, unsigned addr)
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{
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CGS_FUNC_ADEV;
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uint16_t val;
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@ -363,7 +363,7 @@ static uint16_t amdgpu_cgs_read_pci_config_word(void *cgs_device, unsigned addr)
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return val;
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}
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static uint32_t amdgpu_cgs_read_pci_config_dword(void *cgs_device,
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static uint32_t amdgpu_cgs_read_pci_config_dword(struct cgs_device *cgs_device,
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unsigned addr)
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{
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CGS_FUNC_ADEV;
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@ -374,7 +374,7 @@ static uint32_t amdgpu_cgs_read_pci_config_dword(void *cgs_device,
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return val;
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}
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static void amdgpu_cgs_write_pci_config_byte(void *cgs_device, unsigned addr,
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static void amdgpu_cgs_write_pci_config_byte(struct cgs_device *cgs_device, unsigned addr,
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uint8_t value)
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{
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CGS_FUNC_ADEV;
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@ -382,7 +382,7 @@ static void amdgpu_cgs_write_pci_config_byte(void *cgs_device, unsigned addr,
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WARN(ret, "pci_write_config_byte error");
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}
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static void amdgpu_cgs_write_pci_config_word(void *cgs_device, unsigned addr,
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static void amdgpu_cgs_write_pci_config_word(struct cgs_device *cgs_device, unsigned addr,
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uint16_t value)
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{
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CGS_FUNC_ADEV;
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@ -390,7 +390,7 @@ static void amdgpu_cgs_write_pci_config_word(void *cgs_device, unsigned addr,
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WARN(ret, "pci_write_config_word error");
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}
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static void amdgpu_cgs_write_pci_config_dword(void *cgs_device, unsigned addr,
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static void amdgpu_cgs_write_pci_config_dword(struct cgs_device *cgs_device, unsigned addr,
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uint32_t value)
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{
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CGS_FUNC_ADEV;
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@ -399,7 +399,7 @@ static void amdgpu_cgs_write_pci_config_dword(void *cgs_device, unsigned addr,
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}
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static int amdgpu_cgs_get_pci_resource(void *cgs_device,
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static int amdgpu_cgs_get_pci_resource(struct cgs_device *cgs_device,
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enum cgs_resource_type resource_type,
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uint64_t size,
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uint64_t offset,
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@ -433,7 +433,7 @@ static int amdgpu_cgs_get_pci_resource(void *cgs_device,
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}
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}
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static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device,
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static const void *amdgpu_cgs_atom_get_data_table(struct cgs_device *cgs_device,
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unsigned table, uint16_t *size,
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uint8_t *frev, uint8_t *crev)
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{
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@ -449,7 +449,7 @@ static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device,
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return NULL;
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}
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static int amdgpu_cgs_atom_get_cmd_table_revs(void *cgs_device, unsigned table,
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static int amdgpu_cgs_atom_get_cmd_table_revs(struct cgs_device *cgs_device, unsigned table,
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uint8_t *frev, uint8_t *crev)
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{
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CGS_FUNC_ADEV;
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@ -462,7 +462,7 @@ static int amdgpu_cgs_atom_get_cmd_table_revs(void *cgs_device, unsigned table,
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return -EINVAL;
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}
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static int amdgpu_cgs_atom_exec_cmd_table(void *cgs_device, unsigned table,
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static int amdgpu_cgs_atom_exec_cmd_table(struct cgs_device *cgs_device, unsigned table,
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void *args)
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{
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CGS_FUNC_ADEV;
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@ -471,33 +471,33 @@ static int amdgpu_cgs_atom_exec_cmd_table(void *cgs_device, unsigned table,
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adev->mode_info.atom_context, table, args);
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}
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static int amdgpu_cgs_create_pm_request(void *cgs_device, cgs_handle_t *request)
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static int amdgpu_cgs_create_pm_request(struct cgs_device *cgs_device, cgs_handle_t *request)
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{
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/* TODO */
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return 0;
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}
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static int amdgpu_cgs_destroy_pm_request(void *cgs_device, cgs_handle_t request)
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static int amdgpu_cgs_destroy_pm_request(struct cgs_device *cgs_device, cgs_handle_t request)
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{
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/* TODO */
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return 0;
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}
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static int amdgpu_cgs_set_pm_request(void *cgs_device, cgs_handle_t request,
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static int amdgpu_cgs_set_pm_request(struct cgs_device *cgs_device, cgs_handle_t request,
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int active)
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{
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/* TODO */
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return 0;
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}
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static int amdgpu_cgs_pm_request_clock(void *cgs_device, cgs_handle_t request,
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static int amdgpu_cgs_pm_request_clock(struct cgs_device *cgs_device, cgs_handle_t request,
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enum cgs_clock clock, unsigned freq)
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{
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/* TODO */
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return 0;
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}
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static int amdgpu_cgs_pm_request_engine(void *cgs_device, cgs_handle_t request,
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static int amdgpu_cgs_pm_request_engine(struct cgs_device *cgs_device, cgs_handle_t request,
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enum cgs_engine engine, int powered)
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{
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/* TODO */
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@ -506,7 +506,7 @@ static int amdgpu_cgs_pm_request_engine(void *cgs_device, cgs_handle_t request,
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static int amdgpu_cgs_pm_query_clock_limits(void *cgs_device,
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static int amdgpu_cgs_pm_query_clock_limits(struct cgs_device *cgs_device,
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enum cgs_clock clock,
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struct cgs_clock_limits *limits)
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{
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@ -514,7 +514,7 @@ static int amdgpu_cgs_pm_query_clock_limits(void *cgs_device,
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return 0;
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}
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static int amdgpu_cgs_set_camera_voltages(void *cgs_device, uint32_t mask,
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static int amdgpu_cgs_set_camera_voltages(struct cgs_device *cgs_device, uint32_t mask,
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const uint32_t *voltages)
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{
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DRM_ERROR("not implemented");
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@ -565,7 +565,7 @@ static const struct amdgpu_irq_src_funcs cgs_irq_funcs = {
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.process = cgs_process_irq,
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};
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static int amdgpu_cgs_add_irq_source(void *cgs_device, unsigned src_id,
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static int amdgpu_cgs_add_irq_source(struct cgs_device *cgs_device, unsigned src_id,
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unsigned num_types,
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cgs_irq_source_set_func_t set,
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cgs_irq_handler_func_t handler,
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@ -600,19 +600,19 @@ static int amdgpu_cgs_add_irq_source(void *cgs_device, unsigned src_id,
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return ret;
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}
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static int amdgpu_cgs_irq_get(void *cgs_device, unsigned src_id, unsigned type)
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static int amdgpu_cgs_irq_get(struct cgs_device *cgs_device, unsigned src_id, unsigned type)
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{
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CGS_FUNC_ADEV;
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return amdgpu_irq_get(adev, adev->irq.sources[src_id], type);
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}
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static int amdgpu_cgs_irq_put(void *cgs_device, unsigned src_id, unsigned type)
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static int amdgpu_cgs_irq_put(struct cgs_device *cgs_device, unsigned src_id, unsigned type)
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{
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CGS_FUNC_ADEV;
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return amdgpu_irq_put(adev, adev->irq.sources[src_id], type);
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}
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int amdgpu_cgs_set_clockgating_state(void *cgs_device,
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int amdgpu_cgs_set_clockgating_state(struct cgs_device *cgs_device,
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enum amd_ip_block_type block_type,
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enum amd_clockgating_state state)
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{
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@ -633,7 +633,7 @@ int amdgpu_cgs_set_clockgating_state(void *cgs_device,
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return r;
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}
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int amdgpu_cgs_set_powergating_state(void *cgs_device,
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int amdgpu_cgs_set_powergating_state(struct cgs_device *cgs_device,
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enum amd_ip_block_type block_type,
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enum amd_powergating_state state)
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{
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@ -655,7 +655,7 @@ int amdgpu_cgs_set_powergating_state(void *cgs_device,
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}
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static uint32_t fw_type_convert(void *cgs_device, uint32_t fw_type)
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static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)
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{
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CGS_FUNC_ADEV;
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enum AMDGPU_UCODE_ID result = AMDGPU_UCODE_ID_MAXIMUM;
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@ -695,7 +695,7 @@ static uint32_t fw_type_convert(void *cgs_device, uint32_t fw_type)
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return result;
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}
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static int amdgpu_cgs_get_firmware_info(void *cgs_device,
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static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
|
||||
enum cgs_ucode_id type,
|
||||
struct cgs_firmware_info *info)
|
||||
{
|
||||
|
|
@ -774,7 +774,7 @@ static int amdgpu_cgs_get_firmware_info(void *cgs_device,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int amdgpu_cgs_query_system_info(void *cgs_device,
|
||||
static int amdgpu_cgs_query_system_info(struct cgs_device *cgs_device,
|
||||
struct cgs_system_info *sys_info)
|
||||
{
|
||||
CGS_FUNC_ADEV;
|
||||
|
|
@ -808,7 +808,7 @@ static int amdgpu_cgs_query_system_info(void *cgs_device,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int amdgpu_cgs_get_active_displays_info(void *cgs_device,
|
||||
static int amdgpu_cgs_get_active_displays_info(struct cgs_device *cgs_device,
|
||||
struct cgs_display_info *info)
|
||||
{
|
||||
CGS_FUNC_ADEV;
|
||||
|
|
@ -851,7 +851,7 @@ static int amdgpu_cgs_get_active_displays_info(void *cgs_device,
|
|||
}
|
||||
|
||||
|
||||
static int amdgpu_cgs_notify_dpm_enabled(void *cgs_device, bool enabled)
|
||||
static int amdgpu_cgs_notify_dpm_enabled(struct cgs_device *cgs_device, bool enabled)
|
||||
{
|
||||
CGS_FUNC_ADEV;
|
||||
|
||||
|
|
@ -867,7 +867,7 @@ static int amdgpu_cgs_notify_dpm_enabled(void *cgs_device, bool enabled)
|
|||
*/
|
||||
|
||||
#if defined(CONFIG_ACPI)
|
||||
static int amdgpu_cgs_acpi_eval_object(void *cgs_device,
|
||||
static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,
|
||||
struct cgs_acpi_method_info *info)
|
||||
{
|
||||
CGS_FUNC_ADEV;
|
||||
|
|
@ -1030,14 +1030,14 @@ error:
|
|||
return result;
|
||||
}
|
||||
#else
|
||||
static int amdgpu_cgs_acpi_eval_object(void *cgs_device,
|
||||
static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,
|
||||
struct cgs_acpi_method_info *info)
|
||||
{
|
||||
return -EIO;
|
||||
}
|
||||
#endif
|
||||
|
||||
int amdgpu_cgs_call_acpi_method(void *cgs_device,
|
||||
int amdgpu_cgs_call_acpi_method(struct cgs_device *cgs_device,
|
||||
uint32_t acpi_method,
|
||||
uint32_t acpi_function,
|
||||
void *pinput, void *poutput,
|
||||
|
|
@ -1121,7 +1121,7 @@ static const struct cgs_os_ops amdgpu_cgs_os_ops = {
|
|||
amdgpu_cgs_irq_put
|
||||
};
|
||||
|
||||
void *amdgpu_cgs_create_device(struct amdgpu_device *adev)
|
||||
struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev)
|
||||
{
|
||||
struct amdgpu_cgs_device *cgs_device =
|
||||
kmalloc(sizeof(*cgs_device), GFP_KERNEL);
|
||||
|
|
@ -1135,10 +1135,10 @@ void *amdgpu_cgs_create_device(struct amdgpu_device *adev)
|
|||
cgs_device->base.os_ops = &amdgpu_cgs_os_ops;
|
||||
cgs_device->adev = adev;
|
||||
|
||||
return cgs_device;
|
||||
return (struct cgs_device *)cgs_device;
|
||||
}
|
||||
|
||||
void amdgpu_cgs_destroy_device(void *cgs_device)
|
||||
void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device)
|
||||
{
|
||||
kfree(cgs_device);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -26,6 +26,8 @@
|
|||
|
||||
#include "amd_shared.h"
|
||||
|
||||
struct cgs_device;
|
||||
|
||||
/**
|
||||
* enum cgs_gpu_mem_type - GPU memory types
|
||||
*/
|
||||
|
|
@ -223,7 +225,7 @@ struct cgs_acpi_method_info {
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_gpu_mem_info_t)(void *cgs_device, enum cgs_gpu_mem_type type,
|
||||
typedef int (*cgs_gpu_mem_info_t)(struct cgs_device *cgs_device, enum cgs_gpu_mem_type type,
|
||||
uint64_t *mc_start, uint64_t *mc_size,
|
||||
uint64_t *mem_size);
|
||||
|
||||
|
|
@ -239,7 +241,7 @@ typedef int (*cgs_gpu_mem_info_t)(void *cgs_device, enum cgs_gpu_mem_type type,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_gmap_kmem_t)(void *cgs_device, void *kmem, uint64_t size,
|
||||
typedef int (*cgs_gmap_kmem_t)(struct cgs_device *cgs_device, void *kmem, uint64_t size,
|
||||
uint64_t min_offset, uint64_t max_offset,
|
||||
cgs_handle_t *kmem_handle, uint64_t *mcaddr);
|
||||
|
||||
|
|
@ -250,7 +252,7 @@ typedef int (*cgs_gmap_kmem_t)(void *cgs_device, void *kmem, uint64_t size,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_gunmap_kmem_t)(void *cgs_device, cgs_handle_t kmem_handle);
|
||||
typedef int (*cgs_gunmap_kmem_t)(struct cgs_device *cgs_device, cgs_handle_t kmem_handle);
|
||||
|
||||
/**
|
||||
* cgs_alloc_gpu_mem() - Allocate GPU memory
|
||||
|
|
@ -279,7 +281,7 @@ typedef int (*cgs_gunmap_kmem_t)(void *cgs_device, cgs_handle_t kmem_handle);
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_alloc_gpu_mem_t)(void *cgs_device, enum cgs_gpu_mem_type type,
|
||||
typedef int (*cgs_alloc_gpu_mem_t)(struct cgs_device *cgs_device, enum cgs_gpu_mem_type type,
|
||||
uint64_t size, uint64_t align,
|
||||
uint64_t min_offset, uint64_t max_offset,
|
||||
cgs_handle_t *handle);
|
||||
|
|
@ -291,7 +293,7 @@ typedef int (*cgs_alloc_gpu_mem_t)(void *cgs_device, enum cgs_gpu_mem_type type,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_free_gpu_mem_t)(void *cgs_device, cgs_handle_t handle);
|
||||
typedef int (*cgs_free_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle);
|
||||
|
||||
/**
|
||||
* cgs_gmap_gpu_mem() - GPU-map GPU memory
|
||||
|
|
@ -303,7 +305,7 @@ typedef int (*cgs_free_gpu_mem_t)(void *cgs_device, cgs_handle_t handle);
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_gmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle,
|
||||
typedef int (*cgs_gmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle,
|
||||
uint64_t *mcaddr);
|
||||
|
||||
/**
|
||||
|
|
@ -315,7 +317,7 @@ typedef int (*cgs_gmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_gunmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle);
|
||||
typedef int (*cgs_gunmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle);
|
||||
|
||||
/**
|
||||
* cgs_kmap_gpu_mem() - Kernel-map GPU memory
|
||||
|
|
@ -326,7 +328,7 @@ typedef int (*cgs_gunmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle);
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_kmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle,
|
||||
typedef int (*cgs_kmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle,
|
||||
void **map);
|
||||
|
||||
/**
|
||||
|
|
@ -336,7 +338,7 @@ typedef int (*cgs_kmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_kunmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle);
|
||||
typedef int (*cgs_kunmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle);
|
||||
|
||||
/**
|
||||
* cgs_read_register() - Read an MMIO register
|
||||
|
|
@ -345,7 +347,7 @@ typedef int (*cgs_kunmap_gpu_mem_t)(void *cgs_device, cgs_handle_t handle);
|
|||
*
|
||||
* Return: register value
|
||||
*/
|
||||
typedef uint32_t (*cgs_read_register_t)(void *cgs_device, unsigned offset);
|
||||
typedef uint32_t (*cgs_read_register_t)(struct cgs_device *cgs_device, unsigned offset);
|
||||
|
||||
/**
|
||||
* cgs_write_register() - Write an MMIO register
|
||||
|
|
@ -353,7 +355,7 @@ typedef uint32_t (*cgs_read_register_t)(void *cgs_device, unsigned offset);
|
|||
* @offset: register offset
|
||||
* @value: register value
|
||||
*/
|
||||
typedef void (*cgs_write_register_t)(void *cgs_device, unsigned offset,
|
||||
typedef void (*cgs_write_register_t)(struct cgs_device *cgs_device, unsigned offset,
|
||||
uint32_t value);
|
||||
|
||||
/**
|
||||
|
|
@ -363,7 +365,7 @@ typedef void (*cgs_write_register_t)(void *cgs_device, unsigned offset,
|
|||
*
|
||||
* Return: register value
|
||||
*/
|
||||
typedef uint32_t (*cgs_read_ind_register_t)(void *cgs_device, enum cgs_ind_reg space,
|
||||
typedef uint32_t (*cgs_read_ind_register_t)(struct cgs_device *cgs_device, enum cgs_ind_reg space,
|
||||
unsigned index);
|
||||
|
||||
/**
|
||||
|
|
@ -372,7 +374,7 @@ typedef uint32_t (*cgs_read_ind_register_t)(void *cgs_device, enum cgs_ind_reg s
|
|||
* @offset: register offset
|
||||
* @value: register value
|
||||
*/
|
||||
typedef void (*cgs_write_ind_register_t)(void *cgs_device, enum cgs_ind_reg space,
|
||||
typedef void (*cgs_write_ind_register_t)(struct cgs_device *cgs_device, enum cgs_ind_reg space,
|
||||
unsigned index, uint32_t value);
|
||||
|
||||
/**
|
||||
|
|
@ -382,7 +384,7 @@ typedef void (*cgs_write_ind_register_t)(void *cgs_device, enum cgs_ind_reg spac
|
|||
*
|
||||
* Return: Value read
|
||||
*/
|
||||
typedef uint8_t (*cgs_read_pci_config_byte_t)(void *cgs_device, unsigned addr);
|
||||
typedef uint8_t (*cgs_read_pci_config_byte_t)(struct cgs_device *cgs_device, unsigned addr);
|
||||
|
||||
/**
|
||||
* cgs_read_pci_config_word() - Read word from PCI configuration space
|
||||
|
|
@ -391,7 +393,7 @@ typedef uint8_t (*cgs_read_pci_config_byte_t)(void *cgs_device, unsigned addr);
|
|||
*
|
||||
* Return: Value read
|
||||
*/
|
||||
typedef uint16_t (*cgs_read_pci_config_word_t)(void *cgs_device, unsigned addr);
|
||||
typedef uint16_t (*cgs_read_pci_config_word_t)(struct cgs_device *cgs_device, unsigned addr);
|
||||
|
||||
/**
|
||||
* cgs_read_pci_config_dword() - Read dword from PCI configuration space
|
||||
|
|
@ -400,7 +402,7 @@ typedef uint16_t (*cgs_read_pci_config_word_t)(void *cgs_device, unsigned addr);
|
|||
*
|
||||
* Return: Value read
|
||||
*/
|
||||
typedef uint32_t (*cgs_read_pci_config_dword_t)(void *cgs_device,
|
||||
typedef uint32_t (*cgs_read_pci_config_dword_t)(struct cgs_device *cgs_device,
|
||||
unsigned addr);
|
||||
|
||||
/**
|
||||
|
|
@ -409,7 +411,7 @@ typedef uint32_t (*cgs_read_pci_config_dword_t)(void *cgs_device,
|
|||
* @addr: address
|
||||
* @value: value to write
|
||||
*/
|
||||
typedef void (*cgs_write_pci_config_byte_t)(void *cgs_device, unsigned addr,
|
||||
typedef void (*cgs_write_pci_config_byte_t)(struct cgs_device *cgs_device, unsigned addr,
|
||||
uint8_t value);
|
||||
|
||||
/**
|
||||
|
|
@ -418,7 +420,7 @@ typedef void (*cgs_write_pci_config_byte_t)(void *cgs_device, unsigned addr,
|
|||
* @addr: address, must be word-aligned
|
||||
* @value: value to write
|
||||
*/
|
||||
typedef void (*cgs_write_pci_config_word_t)(void *cgs_device, unsigned addr,
|
||||
typedef void (*cgs_write_pci_config_word_t)(struct cgs_device *cgs_device, unsigned addr,
|
||||
uint16_t value);
|
||||
|
||||
/**
|
||||
|
|
@ -427,7 +429,7 @@ typedef void (*cgs_write_pci_config_word_t)(void *cgs_device, unsigned addr,
|
|||
* @addr: address, must be dword-aligned
|
||||
* @value: value to write
|
||||
*/
|
||||
typedef void (*cgs_write_pci_config_dword_t)(void *cgs_device, unsigned addr,
|
||||
typedef void (*cgs_write_pci_config_dword_t)(struct cgs_device *cgs_device, unsigned addr,
|
||||
uint32_t value);
|
||||
|
||||
|
||||
|
|
@ -441,7 +443,7 @@ typedef void (*cgs_write_pci_config_dword_t)(void *cgs_device, unsigned addr,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_get_pci_resource_t)(void *cgs_device,
|
||||
typedef int (*cgs_get_pci_resource_t)(struct cgs_device *cgs_device,
|
||||
enum cgs_resource_type resource_type,
|
||||
uint64_t size,
|
||||
uint64_t offset,
|
||||
|
|
@ -458,7 +460,7 @@ typedef int (*cgs_get_pci_resource_t)(void *cgs_device,
|
|||
* Return: Pointer to start of the table, or NULL on failure
|
||||
*/
|
||||
typedef const void *(*cgs_atom_get_data_table_t)(
|
||||
void *cgs_device, unsigned table,
|
||||
struct cgs_device *cgs_device, unsigned table,
|
||||
uint16_t *size, uint8_t *frev, uint8_t *crev);
|
||||
|
||||
/**
|
||||
|
|
@ -470,7 +472,7 @@ typedef const void *(*cgs_atom_get_data_table_t)(
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_atom_get_cmd_table_revs_t)(void *cgs_device, unsigned table,
|
||||
typedef int (*cgs_atom_get_cmd_table_revs_t)(struct cgs_device *cgs_device, unsigned table,
|
||||
uint8_t *frev, uint8_t *crev);
|
||||
|
||||
/**
|
||||
|
|
@ -481,7 +483,7 @@ typedef int (*cgs_atom_get_cmd_table_revs_t)(void *cgs_device, unsigned table,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_atom_exec_cmd_table_t)(void *cgs_device,
|
||||
typedef int (*cgs_atom_exec_cmd_table_t)(struct cgs_device *cgs_device,
|
||||
unsigned table, void *args);
|
||||
|
||||
/**
|
||||
|
|
@ -491,7 +493,7 @@ typedef int (*cgs_atom_exec_cmd_table_t)(void *cgs_device,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_create_pm_request_t)(void *cgs_device, cgs_handle_t *request);
|
||||
typedef int (*cgs_create_pm_request_t)(struct cgs_device *cgs_device, cgs_handle_t *request);
|
||||
|
||||
/**
|
||||
* cgs_destroy_pm_request() - Destroy a power management request
|
||||
|
|
@ -500,7 +502,7 @@ typedef int (*cgs_create_pm_request_t)(void *cgs_device, cgs_handle_t *request);
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_destroy_pm_request_t)(void *cgs_device, cgs_handle_t request);
|
||||
typedef int (*cgs_destroy_pm_request_t)(struct cgs_device *cgs_device, cgs_handle_t request);
|
||||
|
||||
/**
|
||||
* cgs_set_pm_request() - Activate or deactiveate a PM request
|
||||
|
|
@ -516,7 +518,7 @@ typedef int (*cgs_destroy_pm_request_t)(void *cgs_device, cgs_handle_t request);
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_set_pm_request_t)(void *cgs_device, cgs_handle_t request,
|
||||
typedef int (*cgs_set_pm_request_t)(struct cgs_device *cgs_device, cgs_handle_t request,
|
||||
int active);
|
||||
|
||||
/**
|
||||
|
|
@ -528,7 +530,7 @@ typedef int (*cgs_set_pm_request_t)(void *cgs_device, cgs_handle_t request,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_pm_request_clock_t)(void *cgs_device, cgs_handle_t request,
|
||||
typedef int (*cgs_pm_request_clock_t)(struct cgs_device *cgs_device, cgs_handle_t request,
|
||||
enum cgs_clock clock, unsigned freq);
|
||||
|
||||
/**
|
||||
|
|
@ -540,7 +542,7 @@ typedef int (*cgs_pm_request_clock_t)(void *cgs_device, cgs_handle_t request,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_pm_request_engine_t)(void *cgs_device, cgs_handle_t request,
|
||||
typedef int (*cgs_pm_request_engine_t)(struct cgs_device *cgs_device, cgs_handle_t request,
|
||||
enum cgs_engine engine, int powered);
|
||||
|
||||
/**
|
||||
|
|
@ -551,7 +553,7 @@ typedef int (*cgs_pm_request_engine_t)(void *cgs_device, cgs_handle_t request,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_pm_query_clock_limits_t)(void *cgs_device,
|
||||
typedef int (*cgs_pm_query_clock_limits_t)(struct cgs_device *cgs_device,
|
||||
enum cgs_clock clock,
|
||||
struct cgs_clock_limits *limits);
|
||||
|
||||
|
|
@ -563,7 +565,7 @@ typedef int (*cgs_pm_query_clock_limits_t)(void *cgs_device,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_set_camera_voltages_t)(void *cgs_device, uint32_t mask,
|
||||
typedef int (*cgs_set_camera_voltages_t)(struct cgs_device *cgs_device, uint32_t mask,
|
||||
const uint32_t *voltages);
|
||||
/**
|
||||
* cgs_get_firmware_info - Get the firmware information from core driver
|
||||
|
|
@ -573,25 +575,25 @@ typedef int (*cgs_set_camera_voltages_t)(void *cgs_device, uint32_t mask,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_get_firmware_info)(void *cgs_device,
|
||||
typedef int (*cgs_get_firmware_info)(struct cgs_device *cgs_device,
|
||||
enum cgs_ucode_id type,
|
||||
struct cgs_firmware_info *info);
|
||||
|
||||
typedef int(*cgs_set_powergating_state)(void *cgs_device,
|
||||
typedef int(*cgs_set_powergating_state)(struct cgs_device *cgs_device,
|
||||
enum amd_ip_block_type block_type,
|
||||
enum amd_powergating_state state);
|
||||
|
||||
typedef int(*cgs_set_clockgating_state)(void *cgs_device,
|
||||
typedef int(*cgs_set_clockgating_state)(struct cgs_device *cgs_device,
|
||||
enum amd_ip_block_type block_type,
|
||||
enum amd_clockgating_state state);
|
||||
|
||||
typedef int(*cgs_get_active_displays_info)(
|
||||
void *cgs_device,
|
||||
struct cgs_device *cgs_device,
|
||||
struct cgs_display_info *info);
|
||||
|
||||
typedef int (*cgs_notify_dpm_enabled)(void *cgs_device, bool enabled);
|
||||
typedef int (*cgs_notify_dpm_enabled)(struct cgs_device *cgs_device, bool enabled);
|
||||
|
||||
typedef int (*cgs_call_acpi_method)(void *cgs_device,
|
||||
typedef int (*cgs_call_acpi_method)(struct cgs_device *cgs_device,
|
||||
uint32_t acpi_method,
|
||||
uint32_t acpi_function,
|
||||
void *pinput, void *poutput,
|
||||
|
|
@ -599,7 +601,7 @@ typedef int (*cgs_call_acpi_method)(void *cgs_device,
|
|||
uint32_t input_size,
|
||||
uint32_t output_size);
|
||||
|
||||
typedef int (*cgs_query_system_info)(void *cgs_device,
|
||||
typedef int (*cgs_query_system_info)(struct cgs_device *cgs_device,
|
||||
struct cgs_system_info *sys_info);
|
||||
|
||||
struct cgs_ops {
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@ typedef int (*cgs_irq_handler_func_t)(void *private_data,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_add_irq_source_t)(void *cgs_device, unsigned src_id,
|
||||
typedef int (*cgs_add_irq_source_t)(struct cgs_device *cgs_device, unsigned src_id,
|
||||
unsigned num_types,
|
||||
cgs_irq_source_set_func_t set,
|
||||
cgs_irq_handler_func_t handler,
|
||||
|
|
@ -83,7 +83,7 @@ typedef int (*cgs_add_irq_source_t)(void *cgs_device, unsigned src_id,
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_irq_get_t)(void *cgs_device, unsigned src_id, unsigned type);
|
||||
typedef int (*cgs_irq_get_t)(struct cgs_device *cgs_device, unsigned src_id, unsigned type);
|
||||
|
||||
/**
|
||||
* cgs_irq_put() - Indicate IRQ source is no longer needed
|
||||
|
|
@ -98,7 +98,7 @@ typedef int (*cgs_irq_get_t)(void *cgs_device, unsigned src_id, unsigned type);
|
|||
*
|
||||
* Return: 0 on success, -errno otherwise
|
||||
*/
|
||||
typedef int (*cgs_irq_put_t)(void *cgs_device, unsigned src_id, unsigned type);
|
||||
typedef int (*cgs_irq_put_t)(struct cgs_device *cgs_device, unsigned src_id, unsigned type);
|
||||
|
||||
struct cgs_os_ops {
|
||||
/* IRQ handling */
|
||||
|
|
|
|||
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