KVM: ARM: User space API for getting/setting co-proc registers
The following three ioctls are implemented: - KVM_GET_REG_LIST - KVM_GET_ONE_REG - KVM_SET_ONE_REG Now we have a table for all the cp15 registers, we can drive a generic API. The register IDs carry the following encoding: ARM registers are mapped using the lower 32 bits. The upper 16 of that is the register group type, or coprocessor number: ARM 32-bit CP15 registers have the following id bit patterns: 0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3> ARM 64-bit CP15 registers have the following id bit patterns: 0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> For futureproofing, we need to tell QEMU about the CP15 registers the host lets the guest access. It will need this information to restore a current guest on a future CPU or perhaps a future KVM which allow some of these to be changed. We use a separate table for these, as they're only for the userspace API. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
This commit is contained in:
Christoffer Dall
Родитель
5b3e5e5bf2
Коммит
1138245ccf
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@ -1799,6 +1799,11 @@ is the register group type, or coprocessor number:
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ARM core registers have the following id bit patterns:
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0x4002 0000 0010 <index into the kvm_regs struct:16>
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ARM 32-bit CP15 registers have the following id bit patterns:
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0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>
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ARM 64-bit CP15 registers have the following id bit patterns:
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0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>
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4.69 KVM_GET_ONE_REG
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@ -34,5 +34,14 @@ int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp14_access(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run);
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unsigned long kvm_arm_num_guest_msrs(struct kvm_vcpu *vcpu);
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int kvm_arm_copy_msrindices(struct kvm_vcpu *vcpu, u64 __user *uindices);
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void kvm_coproc_table_init(void);
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struct kvm_one_reg;
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int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
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int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
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int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
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unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
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#endif /* __ARM_KVM_COPROC_H__ */
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@ -27,6 +27,7 @@
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#define KVM_MEMORY_SLOTS 32
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#define KVM_PRIVATE_MEM_SLOTS 4
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
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#define KVM_HAVE_ONE_REG
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#define KVM_VCPU_MAX_FEATURES 0
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@ -137,6 +138,9 @@ int kvm_unmap_hva_range(struct kvm *kvm,
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unsigned long start, unsigned long end);
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void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
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unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
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int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
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/* We do not have shadow page tables, hence the empty hooks */
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static inline int kvm_age_hva(struct kvm *kvm, unsigned long hva)
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{
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@ -18,6 +18,7 @@
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*/
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#include <linux/mm.h>
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#include <linux/kvm_host.h>
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#include <linux/uaccess.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_host.h>
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#include <asm/kvm_emulate.h>
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@ -347,6 +348,328 @@ int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
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return emulate_cp15(vcpu, ¶ms);
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}
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/******************************************************************************
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* Userspace API
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*****************************************************************************/
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static bool index_to_params(u64 id, struct coproc_params *params)
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{
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switch (id & KVM_REG_SIZE_MASK) {
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case KVM_REG_SIZE_U32:
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/* Any unused index bits means it's not valid. */
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if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK
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| KVM_REG_ARM_COPROC_MASK
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| KVM_REG_ARM_32_CRN_MASK
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| KVM_REG_ARM_CRM_MASK
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| KVM_REG_ARM_OPC1_MASK
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| KVM_REG_ARM_32_OPC2_MASK))
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return false;
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params->is_64bit = false;
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params->CRn = ((id & KVM_REG_ARM_32_CRN_MASK)
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>> KVM_REG_ARM_32_CRN_SHIFT);
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params->CRm = ((id & KVM_REG_ARM_CRM_MASK)
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>> KVM_REG_ARM_CRM_SHIFT);
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params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK)
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>> KVM_REG_ARM_OPC1_SHIFT);
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params->Op2 = ((id & KVM_REG_ARM_32_OPC2_MASK)
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>> KVM_REG_ARM_32_OPC2_SHIFT);
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return true;
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case KVM_REG_SIZE_U64:
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/* Any unused index bits means it's not valid. */
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if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK
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| KVM_REG_ARM_COPROC_MASK
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| KVM_REG_ARM_CRM_MASK
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| KVM_REG_ARM_OPC1_MASK))
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return false;
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params->is_64bit = true;
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params->CRm = ((id & KVM_REG_ARM_CRM_MASK)
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>> KVM_REG_ARM_CRM_SHIFT);
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params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK)
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>> KVM_REG_ARM_OPC1_SHIFT);
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params->Op2 = 0;
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params->CRn = 0;
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return true;
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default:
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return false;
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}
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}
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/* Decode an index value, and find the cp15 coproc_reg entry. */
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static const struct coproc_reg *index_to_coproc_reg(struct kvm_vcpu *vcpu,
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u64 id)
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{
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size_t num;
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const struct coproc_reg *table, *r;
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struct coproc_params params;
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/* We only do cp15 for now. */
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if ((id & KVM_REG_ARM_COPROC_MASK) >> KVM_REG_ARM_COPROC_SHIFT != 15)
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return NULL;
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if (!index_to_params(id, ¶ms))
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return NULL;
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table = get_target_table(vcpu->arch.target, &num);
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r = find_reg(¶ms, table, num);
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if (!r)
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r = find_reg(¶ms, cp15_regs, ARRAY_SIZE(cp15_regs));
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/* Not saved in the cp15 array? */
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if (r && !r->reg)
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r = NULL;
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return r;
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}
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/*
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* These are the invariant cp15 registers: we let the guest see the host
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* versions of these, so they're part of the guest state.
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*
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* A future CPU may provide a mechanism to present different values to
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* the guest, or a future kvm may trap them.
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*/
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/* Unfortunately, there's no register-argument for mrc, so generate. */
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#define FUNCTION_FOR32(crn, crm, op1, op2, name) \
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static void get_##name(struct kvm_vcpu *v, \
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const struct coproc_reg *r) \
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{ \
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u32 val; \
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\
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asm volatile("mrc p15, " __stringify(op1) \
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", %0, c" __stringify(crn) \
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", c" __stringify(crm) \
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", " __stringify(op2) "\n" : "=r" (val)); \
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((struct coproc_reg *)r)->val = val; \
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}
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FUNCTION_FOR32(0, 0, 0, 0, MIDR)
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FUNCTION_FOR32(0, 0, 0, 1, CTR)
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FUNCTION_FOR32(0, 0, 0, 2, TCMTR)
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FUNCTION_FOR32(0, 0, 0, 3, TLBTR)
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FUNCTION_FOR32(0, 0, 0, 6, REVIDR)
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FUNCTION_FOR32(0, 1, 0, 0, ID_PFR0)
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FUNCTION_FOR32(0, 1, 0, 1, ID_PFR1)
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FUNCTION_FOR32(0, 1, 0, 2, ID_DFR0)
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FUNCTION_FOR32(0, 1, 0, 3, ID_AFR0)
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FUNCTION_FOR32(0, 1, 0, 4, ID_MMFR0)
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FUNCTION_FOR32(0, 1, 0, 5, ID_MMFR1)
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FUNCTION_FOR32(0, 1, 0, 6, ID_MMFR2)
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FUNCTION_FOR32(0, 1, 0, 7, ID_MMFR3)
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FUNCTION_FOR32(0, 2, 0, 0, ID_ISAR0)
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FUNCTION_FOR32(0, 2, 0, 1, ID_ISAR1)
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FUNCTION_FOR32(0, 2, 0, 2, ID_ISAR2)
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FUNCTION_FOR32(0, 2, 0, 3, ID_ISAR3)
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FUNCTION_FOR32(0, 2, 0, 4, ID_ISAR4)
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FUNCTION_FOR32(0, 2, 0, 5, ID_ISAR5)
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FUNCTION_FOR32(0, 0, 1, 1, CLIDR)
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FUNCTION_FOR32(0, 0, 1, 7, AIDR)
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/* ->val is filled in by kvm_invariant_coproc_table_init() */
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static struct coproc_reg invariant_cp15[] = {
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{ CRn( 0), CRm( 0), Op1( 0), Op2( 0), is32, NULL, get_MIDR },
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{ CRn( 0), CRm( 0), Op1( 0), Op2( 1), is32, NULL, get_CTR },
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{ CRn( 0), CRm( 0), Op1( 0), Op2( 2), is32, NULL, get_TCMTR },
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{ CRn( 0), CRm( 0), Op1( 0), Op2( 3), is32, NULL, get_TLBTR },
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{ CRn( 0), CRm( 0), Op1( 0), Op2( 6), is32, NULL, get_REVIDR },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 0), is32, NULL, get_ID_PFR0 },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 1), is32, NULL, get_ID_PFR1 },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 2), is32, NULL, get_ID_DFR0 },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 3), is32, NULL, get_ID_AFR0 },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 4), is32, NULL, get_ID_MMFR0 },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 5), is32, NULL, get_ID_MMFR1 },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 6), is32, NULL, get_ID_MMFR2 },
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{ CRn( 0), CRm( 1), Op1( 0), Op2( 7), is32, NULL, get_ID_MMFR3 },
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{ CRn( 0), CRm( 2), Op1( 0), Op2( 0), is32, NULL, get_ID_ISAR0 },
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{ CRn( 0), CRm( 2), Op1( 0), Op2( 1), is32, NULL, get_ID_ISAR1 },
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{ CRn( 0), CRm( 2), Op1( 0), Op2( 2), is32, NULL, get_ID_ISAR2 },
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{ CRn( 0), CRm( 2), Op1( 0), Op2( 3), is32, NULL, get_ID_ISAR3 },
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{ CRn( 0), CRm( 2), Op1( 0), Op2( 4), is32, NULL, get_ID_ISAR4 },
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{ CRn( 0), CRm( 2), Op1( 0), Op2( 5), is32, NULL, get_ID_ISAR5 },
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{ CRn( 0), CRm( 0), Op1( 1), Op2( 1), is32, NULL, get_CLIDR },
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{ CRn( 0), CRm( 0), Op1( 1), Op2( 7), is32, NULL, get_AIDR },
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};
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static int reg_from_user(void *val, const void __user *uaddr, u64 id)
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{
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/* This Just Works because we are little endian. */
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if (copy_from_user(val, uaddr, KVM_REG_SIZE(id)) != 0)
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return -EFAULT;
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return 0;
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}
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static int reg_to_user(void __user *uaddr, const void *val, u64 id)
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{
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/* This Just Works because we are little endian. */
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if (copy_to_user(uaddr, val, KVM_REG_SIZE(id)) != 0)
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return -EFAULT;
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return 0;
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}
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static int get_invariant_cp15(u64 id, void __user *uaddr)
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{
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struct coproc_params params;
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const struct coproc_reg *r;
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if (!index_to_params(id, ¶ms))
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return -ENOENT;
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r = find_reg(¶ms, invariant_cp15, ARRAY_SIZE(invariant_cp15));
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if (!r)
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return -ENOENT;
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return reg_to_user(uaddr, &r->val, id);
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}
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static int set_invariant_cp15(u64 id, void __user *uaddr)
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{
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struct coproc_params params;
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const struct coproc_reg *r;
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int err;
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u64 val = 0; /* Make sure high bits are 0 for 32-bit regs */
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if (!index_to_params(id, ¶ms))
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return -ENOENT;
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r = find_reg(¶ms, invariant_cp15, ARRAY_SIZE(invariant_cp15));
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if (!r)
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return -ENOENT;
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err = reg_from_user(&val, uaddr, id);
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if (err)
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return err;
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/* This is what we mean by invariant: you can't change it. */
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if (r->val != val)
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return -EINVAL;
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return 0;
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}
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int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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const struct coproc_reg *r;
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void __user *uaddr = (void __user *)(long)reg->addr;
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r = index_to_coproc_reg(vcpu, reg->id);
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if (!r)
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return get_invariant_cp15(reg->id, uaddr);
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/* Note: copies two regs if size is 64 bit. */
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return reg_to_user(uaddr, &vcpu->arch.cp15[r->reg], reg->id);
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}
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int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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const struct coproc_reg *r;
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void __user *uaddr = (void __user *)(long)reg->addr;
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r = index_to_coproc_reg(vcpu, reg->id);
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if (!r)
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return set_invariant_cp15(reg->id, uaddr);
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/* Note: copies two regs if size is 64 bit */
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return reg_from_user(&vcpu->arch.cp15[r->reg], uaddr, reg->id);
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}
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static u64 cp15_to_index(const struct coproc_reg *reg)
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{
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u64 val = KVM_REG_ARM | (15 << KVM_REG_ARM_COPROC_SHIFT);
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if (reg->is_64) {
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val |= KVM_REG_SIZE_U64;
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val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
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val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT);
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} else {
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val |= KVM_REG_SIZE_U32;
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val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
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val |= (reg->Op2 << KVM_REG_ARM_32_OPC2_SHIFT);
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val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT);
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val |= (reg->CRn << KVM_REG_ARM_32_CRN_SHIFT);
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}
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return val;
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}
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static bool copy_reg_to_user(const struct coproc_reg *reg, u64 __user **uind)
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{
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if (!*uind)
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return true;
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if (put_user(cp15_to_index(reg), *uind))
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return false;
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(*uind)++;
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return true;
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}
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/* Assumed ordered tables, see kvm_coproc_table_init. */
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static int walk_cp15(struct kvm_vcpu *vcpu, u64 __user *uind)
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{
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const struct coproc_reg *i1, *i2, *end1, *end2;
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unsigned int total = 0;
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size_t num;
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/* We check for duplicates here, to allow arch-specific overrides. */
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i1 = get_target_table(vcpu->arch.target, &num);
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end1 = i1 + num;
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i2 = cp15_regs;
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end2 = cp15_regs + ARRAY_SIZE(cp15_regs);
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BUG_ON(i1 == end1 || i2 == end2);
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/* Walk carefully, as both tables may refer to the same register. */
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while (i1 || i2) {
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int cmp = cmp_reg(i1, i2);
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/* target-specific overrides generic entry. */
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if (cmp <= 0) {
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/* Ignore registers we trap but don't save. */
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if (i1->reg) {
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if (!copy_reg_to_user(i1, &uind))
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return -EFAULT;
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total++;
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}
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} else {
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/* Ignore registers we trap but don't save. */
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if (i2->reg) {
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if (!copy_reg_to_user(i2, &uind))
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return -EFAULT;
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total++;
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}
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}
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if (cmp <= 0 && ++i1 == end1)
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i1 = NULL;
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if (cmp >= 0 && ++i2 == end2)
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i2 = NULL;
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}
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return total;
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}
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unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu)
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{
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return ARRAY_SIZE(invariant_cp15)
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+ walk_cp15(vcpu, (u64 __user *)NULL);
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}
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int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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unsigned int i;
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int err;
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/* Then give them all the invariant registers' indices. */
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for (i = 0; i < ARRAY_SIZE(invariant_cp15); i++) {
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if (put_user(cp15_to_index(&invariant_cp15[i]), uindices))
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return -EFAULT;
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uindices++;
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}
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err = walk_cp15(vcpu, uindices);
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if (err > 0)
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err = 0;
|
||||
return err;
|
||||
}
|
||||
|
||||
void kvm_coproc_table_init(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
|
@ -354,6 +677,10 @@ void kvm_coproc_table_init(void)
|
|||
/* Make sure tables are unique and in order. */
|
||||
for (i = 1; i < ARRAY_SIZE(cp15_regs); i++)
|
||||
BUG_ON(cmp_reg(&cp15_regs[i-1], &cp15_regs[i]) >= 0);
|
||||
|
||||
/* We abuse the reset function to overwrite the table itself. */
|
||||
for (i = 0; i < ARRAY_SIZE(invariant_cp15); i++)
|
||||
invariant_cp15[i].reset(NULL, &invariant_cp15[i]);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
#include <asm/kvm.h>
|
||||
#include <asm/kvm_asm.h>
|
||||
#include <asm/kvm_emulate.h>
|
||||
#include <asm/kvm_coproc.h>
|
||||
|
||||
#define VM_STAT(x) { #x, offsetof(struct kvm, stat.x), KVM_STAT_VM }
|
||||
#define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU }
|
||||
|
|
@ -119,7 +120,7 @@ static unsigned long num_core_regs(void)
|
|||
*/
|
||||
unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return num_core_regs();
|
||||
return num_core_regs() + kvm_arm_num_coproc_regs(vcpu);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -138,7 +139,7 @@ int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
|
|||
uindices++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return kvm_arm_copy_coproc_indices(vcpu, uindices);
|
||||
}
|
||||
|
||||
int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
|
||||
|
|
@ -151,7 +152,7 @@ int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
|
|||
if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
|
||||
return get_core_reg(vcpu, reg);
|
||||
|
||||
return -EINVAL;
|
||||
return kvm_arm_coproc_get_reg(vcpu, reg);
|
||||
}
|
||||
|
||||
int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
|
||||
|
|
@ -164,7 +165,7 @@ int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
|
|||
if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
|
||||
return set_core_reg(vcpu, reg);
|
||||
|
||||
return -EINVAL;
|
||||
return kvm_arm_coproc_set_reg(vcpu, reg);
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
|
||||
|
|
|
|||
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