sh: Trivial build fixes for SH-2 support.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -479,7 +479,7 @@ config SH_CLK_MD
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int "CPU Mode Pin Setting"
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depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
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help
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MD2 - MD0 Setting.
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MD2 - MD0 pin setting.
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menu "CPU Frequency scaling"
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@ -580,18 +580,6 @@ config NR_CPUS
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source "kernel/Kconfig.preempt"
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config CPU_HAS_SR_RB
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bool "CPU has SR.RB"
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depends on CPU_SH3 || CPU_SH4
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default y
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help
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This will enable the use of SR.RB register bank usage. Processors
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that are lacking this bit must have another method in place for
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accomplishing what is taken care of by the banked registers.
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See <file:Documentation/sh/register-banks.txt> for further
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information on SR.RB and register banking in the kernel in general.
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config NODES_SHIFT
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int
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default "1"
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@ -31,7 +31,8 @@ config EARLY_SCIF_CONSOLE_PORT
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hex "SCIF port for early console"
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depends on EARLY_SCIF_CONSOLE
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default "0xffe00000" if CPU_SUBTYPE_SH7780
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default "0xfffe9800" if CPU_SUBTYPE_SH72060
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default "0xfffe9800" if CPU_SUBTYPE_SH7206
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default "0xf8420000" if CPU_SUBTYPE_SH7619
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default "0xffe80000" if CPU_SH4
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config EARLY_PRINTK
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@ -101,7 +101,7 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
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*/
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#define MOVW(n) (0x9300|((n)-2)) /* Move mem word at PC+n to R3 */
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#if defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH2A)
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#if defined(CONFIG_CPU_SH2)
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#define TRAP_NOARG 0xc320 /* Syscall w/no args (NR in R3) */
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#else
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#define TRAP_NOARG 0xc310 /* Syscall w/no args (NR in R3) */
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@ -324,7 +324,7 @@ int kernel_execve(const char *filename, char *const argv[], char *const envp[])
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register long __sc4 __asm__ ("r4") = (long) filename;
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register long __sc5 __asm__ ("r5") = (long) argv;
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register long __sc6 __asm__ ("r6") = (long) envp;
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__asm__ __volatile__ ("trapa #0x13" : "=z" (__sc0)
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__asm__ __volatile__ (SYSCALL_ARG3 : "=z" (__sc0)
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: "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6)
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: "memory");
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return __sc0;
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@ -77,6 +77,7 @@ void show_mem(void)
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printk("%d pages swap cached\n",cached);
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}
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#ifdef CONFIG_MMU
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static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
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{
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pgd_t *pgd;
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@ -139,6 +140,7 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
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set_pte_phys(address, phys, prot);
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}
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#endif /* CONFIG_MMU */
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/* References to section boundaries */
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