[media] omap3isp: CCP2/CSI2 receivers
The OMAP3 ISP CCP2 and CSI2 receivers provide an interface to connect serial MIPI sensors to the device. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi> Signed-off-by: David Cohen <dacohen@gmail.com> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Vimarsh Zutshi <vimarsh.zutshi@gmail.com> Signed-off-by: Tuukka Toivonen <tuukkat76@gmail.com> Signed-off-by: Sergio Aguirre <saaguirre@ti.com> Signed-off-by: Antti Koskipaa <akoskipa@gmail.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: RaniSuneela <r-m@ti.com> Signed-off-by: Atanas Filipov <afilipov@mm-sol.com> Signed-off-by: Gjorgji Rosikopulos <grosikopulos@mm-sol.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Nayden Kanchev <nkanchev@mm-sol.com> Signed-off-by: Phil Carmody <ext-phil.2.carmody@nokia.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: Dominic Curran <dcurran@ti.com> Signed-off-by: Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi> Signed-off-by: Pallavi Kulkarni <p-kulkarni@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Laurent Pinchart
Mauro Carvalho Chehab
Родитель
ad614acb7e
Коммит
121e9f1c4c
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/*
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* ispccp2.h
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*
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* TI OMAP3 ISP - CCP2 module
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*
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* Copyright (C) 2010 Nokia Corporation
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* Copyright (C) 2010 Texas Instruments, Inc.
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*
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* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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* Sakari Ailus <sakari.ailus@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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||||
*
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||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*/
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#ifndef OMAP3_ISP_CCP2_H
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#define OMAP3_ISP_CCP2_H
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#include <linux/videodev2.h>
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struct isp_device;
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struct isp_csiphy;
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/* Sink and source ccp2 pads */
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#define CCP2_PAD_SINK 0
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#define CCP2_PAD_SOURCE 1
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#define CCP2_PADS_NUM 2
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/* CCP2 input media entity */
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enum ccp2_input_entity {
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CCP2_INPUT_NONE,
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CCP2_INPUT_SENSOR,
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CCP2_INPUT_MEMORY,
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};
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/* CCP2 output media entity */
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enum ccp2_output_entity {
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CCP2_OUTPUT_NONE,
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CCP2_OUTPUT_CCDC,
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CCP2_OUTPUT_MEMORY,
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};
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/* Logical channel configuration */
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struct isp_interface_lcx_config {
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int crc;
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u32 data_start;
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u32 data_size;
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u32 format;
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};
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/* Memory channel configuration */
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struct isp_interface_mem_config {
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u32 dst_port;
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u32 vsize_count;
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u32 hsize_count;
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u32 src_ofst;
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u32 dst_ofst;
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};
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/* CCP2 device */
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struct isp_ccp2_device {
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struct v4l2_subdev subdev;
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struct v4l2_mbus_framefmt formats[CCP2_PADS_NUM];
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struct media_pad pads[CCP2_PADS_NUM];
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enum ccp2_input_entity input;
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enum ccp2_output_entity output;
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struct isp_interface_lcx_config if_cfg;
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struct isp_interface_mem_config mem_cfg;
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struct isp_video video_in;
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struct isp_csiphy *phy;
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unsigned int error;
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enum isp_pipeline_stream_state state;
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wait_queue_head_t wait;
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atomic_t stopping;
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};
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/* Function declarations */
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int omap3isp_ccp2_init(struct isp_device *isp);
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void omap3isp_ccp2_cleanup(struct isp_device *isp);
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int omap3isp_ccp2_register_entities(struct isp_ccp2_device *ccp2,
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struct v4l2_device *vdev);
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void omap3isp_ccp2_unregister_entities(struct isp_ccp2_device *ccp2);
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int omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2);
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#endif /* OMAP3_ISP_CCP2_H */
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/*
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* ispcsi2.h
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*
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* TI OMAP3 ISP - CSI2 module
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*
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* Copyright (C) 2010 Nokia Corporation
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* Copyright (C) 2009 Texas Instruments, Inc.
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*
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* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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* Sakari Ailus <sakari.ailus@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
|
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* published by the Free Software Foundation.
|
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*
|
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* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*/
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#ifndef OMAP3_ISP_CSI2_H
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#define OMAP3_ISP_CSI2_H
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#include <linux/types.h>
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#include <linux/videodev2.h>
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struct isp_csiphy;
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/* This is not an exhaustive list */
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enum isp_csi2_pix_formats {
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CSI2_PIX_FMT_OTHERS = 0,
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CSI2_PIX_FMT_YUV422_8BIT = 0x1e,
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CSI2_PIX_FMT_YUV422_8BIT_VP = 0x9e,
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CSI2_PIX_FMT_RAW10_EXP16 = 0xab,
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CSI2_PIX_FMT_RAW10_EXP16_VP = 0x12f,
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CSI2_PIX_FMT_RAW8 = 0x2a,
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CSI2_PIX_FMT_RAW8_DPCM10_EXP16 = 0x2aa,
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CSI2_PIX_FMT_RAW8_DPCM10_VP = 0x32a,
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CSI2_PIX_FMT_RAW8_VP = 0x12a,
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CSI2_USERDEF_8BIT_DATA1_DPCM10_VP = 0x340,
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CSI2_USERDEF_8BIT_DATA1_DPCM10 = 0x2c0,
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CSI2_USERDEF_8BIT_DATA1 = 0x40,
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};
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enum isp_csi2_irqevents {
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OCP_ERR_IRQ = 0x4000,
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SHORT_PACKET_IRQ = 0x2000,
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ECC_CORRECTION_IRQ = 0x1000,
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ECC_NO_CORRECTION_IRQ = 0x800,
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COMPLEXIO2_ERR_IRQ = 0x400,
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COMPLEXIO1_ERR_IRQ = 0x200,
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FIFO_OVF_IRQ = 0x100,
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CONTEXT7 = 0x80,
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CONTEXT6 = 0x40,
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CONTEXT5 = 0x20,
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CONTEXT4 = 0x10,
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CONTEXT3 = 0x8,
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CONTEXT2 = 0x4,
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CONTEXT1 = 0x2,
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CONTEXT0 = 0x1,
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};
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enum isp_csi2_ctx_irqevents {
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CTX_ECC_CORRECTION = 0x100,
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CTX_LINE_NUMBER = 0x80,
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CTX_FRAME_NUMBER = 0x40,
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CTX_CS = 0x20,
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CTX_LE = 0x8,
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CTX_LS = 0x4,
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CTX_FE = 0x2,
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CTX_FS = 0x1,
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};
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enum isp_csi2_frame_mode {
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ISP_CSI2_FRAME_IMMEDIATE,
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ISP_CSI2_FRAME_AFTERFEC,
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};
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#define ISP_CSI2_MAX_CTX_NUM 7
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struct isp_csi2_ctx_cfg {
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u8 ctxnum; /* context number 0 - 7 */
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u8 dpcm_decompress;
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/* Fields in CSI2_CTx_CTRL2 - locked by CSI2_CTx_CTRL1.CTX_EN */
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u8 virtual_id;
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u16 format_id; /* as in CSI2_CTx_CTRL2[9:0] */
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u8 dpcm_predictor; /* 1: simple, 0: advanced */
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/* Fields in CSI2_CTx_CTRL1/3 - Shadowed */
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u16 alpha;
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u16 data_offset;
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u32 ping_addr;
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u32 pong_addr;
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u8 eof_enabled;
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u8 eol_enabled;
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u8 checksum_enabled;
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u8 enabled;
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};
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struct isp_csi2_timing_cfg {
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u8 ionum; /* IO1 or IO2 as in CSI2_TIMING */
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unsigned force_rx_mode:1;
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unsigned stop_state_16x:1;
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unsigned stop_state_4x:1;
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u16 stop_state_counter;
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};
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struct isp_csi2_ctrl_cfg {
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bool vp_clk_enable;
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bool vp_only_enable;
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u8 vp_out_ctrl;
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enum isp_csi2_frame_mode frame_mode;
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bool ecc_enable;
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bool if_enable;
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};
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#define CSI2_PAD_SINK 0
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#define CSI2_PAD_SOURCE 1
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#define CSI2_PADS_NUM 2
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#define CSI2_OUTPUT_CCDC (1 << 0)
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#define CSI2_OUTPUT_MEMORY (1 << 1)
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struct isp_csi2_device {
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struct v4l2_subdev subdev;
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struct media_pad pads[CSI2_PADS_NUM];
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struct v4l2_mbus_framefmt formats[CSI2_PADS_NUM];
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struct isp_video video_out;
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struct isp_device *isp;
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u8 available; /* Is the IP present on the silicon? */
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/* mem resources - enums as defined in enum isp_mem_resources */
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u8 regs1;
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u8 regs2;
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u32 output; /* output to CCDC, memory or both? */
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bool dpcm_decompress;
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unsigned int frame_skip;
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bool use_fs_irq;
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struct isp_csiphy *phy;
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struct isp_csi2_ctx_cfg contexts[ISP_CSI2_MAX_CTX_NUM + 1];
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struct isp_csi2_timing_cfg timing[2];
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struct isp_csi2_ctrl_cfg ctrl;
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enum isp_pipeline_stream_state state;
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wait_queue_head_t wait;
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atomic_t stopping;
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};
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int omap3isp_csi2_isr(struct isp_csi2_device *csi2);
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int omap3isp_csi2_reset(struct isp_csi2_device *csi2);
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int omap3isp_csi2_init(struct isp_device *isp);
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void omap3isp_csi2_cleanup(struct isp_device *isp);
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void omap3isp_csi2_unregister_entities(struct isp_csi2_device *csi2);
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int omap3isp_csi2_register_entities(struct isp_csi2_device *csi2,
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struct v4l2_device *vdev);
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#endif /* OMAP3_ISP_CSI2_H */
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/*
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* ispcsiphy.c
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*
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* TI OMAP3 ISP - CSI PHY module
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*
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* Copyright (C) 2010 Nokia Corporation
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* Copyright (C) 2009 Texas Instruments, Inc.
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*
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* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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* Sakari Ailus <sakari.ailus@iki.fi>
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*
|
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
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* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
||||
* 02110-1301 USA
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/regulator/consumer.h>
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#include "isp.h"
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#include "ispreg.h"
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#include "ispcsiphy.h"
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/*
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* csiphy_lanes_config - Configuration of CSIPHY lanes.
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*
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* Updates HW configuration.
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* Called with phy->mutex taken.
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*/
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static void csiphy_lanes_config(struct isp_csiphy *phy)
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{
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unsigned int i;
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u32 reg;
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reg = isp_reg_readl(phy->isp, phy->cfg_regs, ISPCSI2_PHY_CFG);
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for (i = 0; i < phy->num_data_lanes; i++) {
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reg &= ~(ISPCSI2_PHY_CFG_DATA_POL_MASK(i + 1) |
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ISPCSI2_PHY_CFG_DATA_POSITION_MASK(i + 1));
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reg |= (phy->lanes.data[i].pol <<
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ISPCSI2_PHY_CFG_DATA_POL_SHIFT(i + 1));
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reg |= (phy->lanes.data[i].pos <<
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ISPCSI2_PHY_CFG_DATA_POSITION_SHIFT(i + 1));
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}
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reg &= ~(ISPCSI2_PHY_CFG_CLOCK_POL_MASK |
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ISPCSI2_PHY_CFG_CLOCK_POSITION_MASK);
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reg |= phy->lanes.clk.pol << ISPCSI2_PHY_CFG_CLOCK_POL_SHIFT;
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reg |= phy->lanes.clk.pos << ISPCSI2_PHY_CFG_CLOCK_POSITION_SHIFT;
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isp_reg_writel(phy->isp, reg, phy->cfg_regs, ISPCSI2_PHY_CFG);
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}
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/*
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* csiphy_power_autoswitch_enable
|
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* @enable: Sets or clears the autoswitch function enable flag.
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*/
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static void csiphy_power_autoswitch_enable(struct isp_csiphy *phy, bool enable)
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{
|
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isp_reg_clr_set(phy->isp, phy->cfg_regs, ISPCSI2_PHY_CFG,
|
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ISPCSI2_PHY_CFG_PWR_AUTO,
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enable ? ISPCSI2_PHY_CFG_PWR_AUTO : 0);
|
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}
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|
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/*
|
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* csiphy_set_power
|
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* @power: Power state to be set.
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*
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* Returns 0 if successful, or -EBUSY if the retry count is exceeded.
|
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*/
|
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static int csiphy_set_power(struct isp_csiphy *phy, u32 power)
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{
|
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u32 reg;
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u8 retry_count;
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|
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isp_reg_clr_set(phy->isp, phy->cfg_regs, ISPCSI2_PHY_CFG,
|
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ISPCSI2_PHY_CFG_PWR_CMD_MASK, power);
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|
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retry_count = 0;
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do {
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udelay(50);
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reg = isp_reg_readl(phy->isp, phy->cfg_regs, ISPCSI2_PHY_CFG) &
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ISPCSI2_PHY_CFG_PWR_STATUS_MASK;
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if (reg != power >> 2)
|
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retry_count++;
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} while ((reg != power >> 2) && (retry_count < 100));
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|
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if (retry_count == 100) {
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printk(KERN_ERR "CSI2 CIO set power failed!\n");
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return -EBUSY;
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||||
}
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|
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return 0;
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||||
}
|
||||
|
||||
/*
|
||||
* csiphy_dphy_config - Configure CSI2 D-PHY parameters.
|
||||
*
|
||||
* Called with phy->mutex taken.
|
||||
*/
|
||||
static void csiphy_dphy_config(struct isp_csiphy *phy)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
/* Set up ISPCSIPHY_REG0 */
|
||||
reg = isp_reg_readl(phy->isp, phy->phy_regs, ISPCSIPHY_REG0);
|
||||
|
||||
reg &= ~(ISPCSIPHY_REG0_THS_TERM_MASK |
|
||||
ISPCSIPHY_REG0_THS_SETTLE_MASK);
|
||||
reg |= phy->dphy.ths_term << ISPCSIPHY_REG0_THS_TERM_SHIFT;
|
||||
reg |= phy->dphy.ths_settle << ISPCSIPHY_REG0_THS_SETTLE_SHIFT;
|
||||
|
||||
isp_reg_writel(phy->isp, reg, phy->phy_regs, ISPCSIPHY_REG0);
|
||||
|
||||
/* Set up ISPCSIPHY_REG1 */
|
||||
reg = isp_reg_readl(phy->isp, phy->phy_regs, ISPCSIPHY_REG1);
|
||||
|
||||
reg &= ~(ISPCSIPHY_REG1_TCLK_TERM_MASK |
|
||||
ISPCSIPHY_REG1_TCLK_MISS_MASK |
|
||||
ISPCSIPHY_REG1_TCLK_SETTLE_MASK);
|
||||
reg |= phy->dphy.tclk_term << ISPCSIPHY_REG1_TCLK_TERM_SHIFT;
|
||||
reg |= phy->dphy.tclk_miss << ISPCSIPHY_REG1_TCLK_MISS_SHIFT;
|
||||
reg |= phy->dphy.tclk_settle << ISPCSIPHY_REG1_TCLK_SETTLE_SHIFT;
|
||||
|
||||
isp_reg_writel(phy->isp, reg, phy->phy_regs, ISPCSIPHY_REG1);
|
||||
}
|
||||
|
||||
static int csiphy_config(struct isp_csiphy *phy,
|
||||
struct isp_csiphy_dphy_cfg *dphy,
|
||||
struct isp_csiphy_lanes_cfg *lanes)
|
||||
{
|
||||
unsigned int used_lanes = 0;
|
||||
unsigned int i;
|
||||
|
||||
/* Clock and data lanes verification */
|
||||
for (i = 0; i < phy->num_data_lanes; i++) {
|
||||
if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3)
|
||||
return -EINVAL;
|
||||
|
||||
if (used_lanes & (1 << lanes->data[i].pos))
|
||||
return -EINVAL;
|
||||
|
||||
used_lanes |= 1 << lanes->data[i].pos;
|
||||
}
|
||||
|
||||
if (lanes->clk.pol > 1 || lanes->clk.pos > 3)
|
||||
return -EINVAL;
|
||||
|
||||
if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos))
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&phy->mutex);
|
||||
phy->dphy = *dphy;
|
||||
phy->lanes = *lanes;
|
||||
mutex_unlock(&phy->mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int omap3isp_csiphy_acquire(struct isp_csiphy *phy)
|
||||
{
|
||||
int rval;
|
||||
|
||||
if (phy->vdd == NULL) {
|
||||
dev_err(phy->isp->dev, "Power regulator for CSI PHY not "
|
||||
"available\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
mutex_lock(&phy->mutex);
|
||||
|
||||
rval = regulator_enable(phy->vdd);
|
||||
if (rval < 0)
|
||||
goto done;
|
||||
|
||||
omap3isp_csi2_reset(phy->csi2);
|
||||
|
||||
csiphy_dphy_config(phy);
|
||||
csiphy_lanes_config(phy);
|
||||
|
||||
rval = csiphy_set_power(phy, ISPCSI2_PHY_CFG_PWR_CMD_ON);
|
||||
if (rval) {
|
||||
regulator_disable(phy->vdd);
|
||||
goto done;
|
||||
}
|
||||
|
||||
csiphy_power_autoswitch_enable(phy, true);
|
||||
phy->phy_in_use = 1;
|
||||
|
||||
done:
|
||||
mutex_unlock(&phy->mutex);
|
||||
return rval;
|
||||
}
|
||||
|
||||
void omap3isp_csiphy_release(struct isp_csiphy *phy)
|
||||
{
|
||||
mutex_lock(&phy->mutex);
|
||||
if (phy->phy_in_use) {
|
||||
csiphy_power_autoswitch_enable(phy, false);
|
||||
csiphy_set_power(phy, ISPCSI2_PHY_CFG_PWR_CMD_OFF);
|
||||
regulator_disable(phy->vdd);
|
||||
phy->phy_in_use = 0;
|
||||
}
|
||||
mutex_unlock(&phy->mutex);
|
||||
}
|
||||
|
||||
/*
|
||||
* omap3isp_csiphy_init - Initialize the CSI PHY frontends
|
||||
*/
|
||||
int omap3isp_csiphy_init(struct isp_device *isp)
|
||||
{
|
||||
struct isp_csiphy *phy1 = &isp->isp_csiphy1;
|
||||
struct isp_csiphy *phy2 = &isp->isp_csiphy2;
|
||||
|
||||
isp->platform_cb.csiphy_config = csiphy_config;
|
||||
|
||||
phy2->isp = isp;
|
||||
phy2->csi2 = &isp->isp_csi2a;
|
||||
phy2->num_data_lanes = ISP_CSIPHY2_NUM_DATA_LANES;
|
||||
phy2->cfg_regs = OMAP3_ISP_IOMEM_CSI2A_REGS1;
|
||||
phy2->phy_regs = OMAP3_ISP_IOMEM_CSIPHY2;
|
||||
mutex_init(&phy2->mutex);
|
||||
|
||||
if (isp->revision == ISP_REVISION_15_0) {
|
||||
phy1->isp = isp;
|
||||
phy1->csi2 = &isp->isp_csi2c;
|
||||
phy1->num_data_lanes = ISP_CSIPHY1_NUM_DATA_LANES;
|
||||
phy1->cfg_regs = OMAP3_ISP_IOMEM_CSI2C_REGS1;
|
||||
phy1->phy_regs = OMAP3_ISP_IOMEM_CSIPHY1;
|
||||
mutex_init(&phy1->mutex);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,74 @@
|
|||
/*
|
||||
* ispcsiphy.h
|
||||
*
|
||||
* TI OMAP3 ISP - CSI PHY module
|
||||
*
|
||||
* Copyright (C) 2010 Nokia Corporation
|
||||
* Copyright (C) 2009 Texas Instruments, Inc.
|
||||
*
|
||||
* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
* Sakari Ailus <sakari.ailus@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
||||
* 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef OMAP3_ISP_CSI_PHY_H
|
||||
#define OMAP3_ISP_CSI_PHY_H
|
||||
|
||||
struct isp_csi2_device;
|
||||
struct regulator;
|
||||
|
||||
struct csiphy_lane {
|
||||
u8 pos;
|
||||
u8 pol;
|
||||
};
|
||||
|
||||
#define ISP_CSIPHY2_NUM_DATA_LANES 2
|
||||
#define ISP_CSIPHY1_NUM_DATA_LANES 1
|
||||
|
||||
struct isp_csiphy_lanes_cfg {
|
||||
struct csiphy_lane data[ISP_CSIPHY2_NUM_DATA_LANES];
|
||||
struct csiphy_lane clk;
|
||||
};
|
||||
|
||||
struct isp_csiphy_dphy_cfg {
|
||||
u8 ths_term;
|
||||
u8 ths_settle;
|
||||
u8 tclk_term;
|
||||
unsigned tclk_miss:1;
|
||||
u8 tclk_settle;
|
||||
};
|
||||
|
||||
struct isp_csiphy {
|
||||
struct isp_device *isp;
|
||||
struct mutex mutex; /* serialize csiphy configuration */
|
||||
u8 phy_in_use;
|
||||
struct isp_csi2_device *csi2;
|
||||
struct regulator *vdd;
|
||||
|
||||
/* mem resources - enums as defined in enum isp_mem_resources */
|
||||
unsigned int cfg_regs;
|
||||
unsigned int phy_regs;
|
||||
|
||||
u8 num_data_lanes; /* number of CSI2 Data Lanes supported */
|
||||
struct isp_csiphy_lanes_cfg lanes;
|
||||
struct isp_csiphy_dphy_cfg dphy;
|
||||
};
|
||||
|
||||
int omap3isp_csiphy_acquire(struct isp_csiphy *phy);
|
||||
void omap3isp_csiphy_release(struct isp_csiphy *phy);
|
||||
int omap3isp_csiphy_init(struct isp_device *isp);
|
||||
|
||||
#endif /* OMAP3_ISP_CSI_PHY_H */
|
||||
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