clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case
This was a hack which would allow multiple HW gates to be controlled by a single bit. The only user of this is the imx_dev_clk_hw_gate_shared which is not used anywhere as of now. Basically, complicates the logic of the driver for no reason. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Родитель
220175cd39
Коммит
12309428c2
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@ -49,14 +49,10 @@ static int clk_gate2_enable(struct clk_hw *hw)
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if (gate->share_count && (*gate->share_count)++ > 0)
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goto out;
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if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
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ret = clk_gate_ops.enable(hw);
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} else {
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reg = readl(gate->reg);
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reg &= ~(3 << gate->bit_idx);
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reg |= gate->cgr_val << gate->bit_idx;
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writel(reg, gate->reg);
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}
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out:
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spin_unlock_irqrestore(gate->lock, flags);
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@ -79,13 +75,9 @@ static void clk_gate2_disable(struct clk_hw *hw)
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goto out;
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}
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if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
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clk_gate_ops.disable(hw);
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} else {
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reg = readl(gate->reg);
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reg &= ~(3 << gate->bit_idx);
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writel(reg, gate->reg);
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}
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out:
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spin_unlock_irqrestore(gate->lock, flags);
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@ -105,9 +97,6 @@ static int clk_gate2_is_enabled(struct clk_hw *hw)
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{
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struct clk_gate2 *gate = to_clk_gate2(hw);
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if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
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return clk_gate_ops.is_enabled(hw);
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return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
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}
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@ -117,9 +106,6 @@ static void clk_gate2_disable_unused(struct clk_hw *hw)
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unsigned long flags;
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u32 reg;
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if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
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return;
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spin_lock_irqsave(gate->lock, flags);
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if (!gate->share_count || *gate->share_count == 0) {
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@ -6,8 +6,6 @@
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#include <linux/spinlock.h>
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#include <linux/clk-provider.h>
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#define IMX_CLK_GATE2_SINGLE_BIT 1
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extern spinlock_t imx_ccm_lock;
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void imx_check_clocks(struct clk *clks[], unsigned int count);
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@ -384,8 +382,7 @@ static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev,
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unsigned int *share_count)
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{
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return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT |
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CLK_OPS_PARENT_ENABLE, reg, shift, 0x3,
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IMX_CLK_GATE2_SINGLE_BIT,
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CLK_OPS_PARENT_ENABLE, reg, shift, 0x1, 0,
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&imx_ccm_lock, share_count);
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}
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