x86: gart: Clean up the code a bit
Clean up various small stylistic details in the GART code. No functionality changed. Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: muli@il.ibm.com Cc: joerg.roedel@amd.com LKML-Reference: <1258287594-8777-2-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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1f7564ca83
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123bf0e2ed
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@ -95,7 +95,7 @@ static unsigned long alloc_iommu(struct device *dev, int size,
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base_index = ALIGN(iommu_bus_base & dma_get_seg_boundary(dev),
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PAGE_SIZE) >> PAGE_SHIFT;
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boundary_size = ALIGN((unsigned long long)dma_get_seg_boundary(dev) + 1,
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boundary_size = ALIGN((u64)dma_get_seg_boundary(dev) + 1,
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PAGE_SIZE) >> PAGE_SHIFT;
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spin_lock_irqsave(&iommu_bitmap_lock, flags);
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@ -297,7 +297,7 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
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int i;
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#ifdef CONFIG_IOMMU_DEBUG
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printk(KERN_DEBUG "dma_map_sg overflow\n");
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pr_debug("dma_map_sg overflow\n");
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#endif
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for_each_sg(sg, s, nents, i) {
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@ -392,12 +392,14 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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if (!dev)
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dev = &x86_dma_fallback_dev;
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out = 0;
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start = 0;
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start_sg = sgmap = sg;
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seg_size = 0;
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max_seg_size = dma_get_max_seg_size(dev);
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ps = NULL; /* shut up gcc */
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out = 0;
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start = 0;
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start_sg = sg;
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sgmap = sg;
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seg_size = 0;
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max_seg_size = dma_get_max_seg_size(dev);
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ps = NULL; /* shut up gcc */
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for_each_sg(sg, s, nents, i) {
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dma_addr_t addr = sg_phys(s);
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@ -420,11 +422,12 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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sgmap, pages, need) < 0)
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goto error;
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out++;
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seg_size = 0;
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sgmap = sg_next(sgmap);
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pages = 0;
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start = i;
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start_sg = s;
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seg_size = 0;
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sgmap = sg_next(sgmap);
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pages = 0;
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start = i;
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start_sg = s;
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}
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}
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@ -523,7 +526,7 @@ static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
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iommu_size -= round_up(a, PMD_PAGE_SIZE) - a;
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if (iommu_size < 64*1024*1024) {
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printk(KERN_WARNING
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pr_warning(
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"PCI-DMA: Warning: Small IOMMU %luMB."
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" Consider increasing the AGP aperture in BIOS\n",
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iommu_size >> 20);
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@ -578,28 +581,32 @@ void set_up_gart_resume(u32 aper_order, u32 aper_alloc)
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aperture_alloc = aper_alloc;
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}
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static void gart_fixup_northbridges(struct sys_device *dev)
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{
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int i;
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if (!fix_up_north_bridges)
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return;
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pr_info("PCI-DMA: Restoring GART aperture settings\n");
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for (i = 0; i < num_k8_northbridges; i++) {
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struct pci_dev *dev = k8_northbridges[i];
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/*
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* Don't enable translations just yet. That is the next
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* step. Restore the pre-suspend aperture settings.
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*/
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pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, aperture_order << 1);
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pci_write_config_dword(dev, AMD64_GARTAPERTUREBASE, aperture_alloc >> 25);
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}
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}
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static int gart_resume(struct sys_device *dev)
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{
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printk(KERN_INFO "PCI-DMA: Resuming GART IOMMU\n");
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pr_info("PCI-DMA: Resuming GART IOMMU\n");
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if (fix_up_north_bridges) {
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int i;
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printk(KERN_INFO "PCI-DMA: Restoring GART aperture settings\n");
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for (i = 0; i < num_k8_northbridges; i++) {
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struct pci_dev *dev = k8_northbridges[i];
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/*
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* Don't enable translations just yet. That is the next
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* step. Restore the pre-suspend aperture settings.
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*/
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pci_write_config_dword(dev, AMD64_GARTAPERTURECTL,
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aperture_order << 1);
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pci_write_config_dword(dev, AMD64_GARTAPERTUREBASE,
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aperture_alloc >> 25);
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}
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}
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gart_fixup_northbridges(dev);
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enable_gart_translations();
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@ -612,15 +619,14 @@ static int gart_suspend(struct sys_device *dev, pm_message_t state)
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}
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static struct sysdev_class gart_sysdev_class = {
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.name = "gart",
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.suspend = gart_suspend,
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.resume = gart_resume,
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.name = "gart",
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.suspend = gart_suspend,
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.resume = gart_resume,
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};
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static struct sys_device device_gart = {
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.id = 0,
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.cls = &gart_sysdev_class,
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.cls = &gart_sysdev_class,
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};
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/*
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@ -635,7 +641,8 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
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void *gatt;
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int i, error;
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printk(KERN_INFO "PCI-DMA: Disabling AGP.\n");
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pr_info("PCI-DMA: Disabling AGP.\n");
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aper_size = aper_base = info->aper_size = 0;
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dev = NULL;
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for (i = 0; i < num_k8_northbridges; i++) {
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@ -653,6 +660,7 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
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}
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if (!aper_base)
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goto nommu;
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info->aper_base = aper_base;
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info->aper_size = aper_size >> 20;
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@ -675,14 +683,14 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
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flush_gart();
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printk(KERN_INFO "PCI-DMA: aperture base @ %x size %u KB\n",
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pr_info("PCI-DMA: aperture base @ %x size %u KB\n",
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aper_base, aper_size>>10);
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return 0;
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nommu:
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/* Should not happen anymore */
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printk(KERN_WARNING "PCI-DMA: More than 4GB of RAM and no IOMMU\n"
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pr_warning("PCI-DMA: More than 4GB of RAM and no IOMMU\n"
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"falling back to iommu=soft.\n");
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return -1;
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}
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@ -744,23 +752,23 @@ int __init gart_iommu_init(void)
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!gart_iommu_aperture ||
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(no_agp && init_k8_gatt(&info) < 0)) {
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if (max_pfn > MAX_DMA32_PFN) {
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printk(KERN_WARNING "More than 4GB of memory "
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"but GART IOMMU not available.\n");
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printk(KERN_WARNING "falling back to iommu=soft.\n");
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pr_warning("More than 4GB of memory but GART IOMMU not available.\n");
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pr_warning("falling back to iommu=soft.\n");
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}
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return 0;
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}
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/* need to map that range */
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aper_size = info.aper_size << 20;
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aper_base = info.aper_base;
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end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT);
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aper_size = info.aper_size << 20;
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aper_base = info.aper_base;
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end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT);
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if (end_pfn > max_low_pfn_mapped) {
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start_pfn = (aper_base>>PAGE_SHIFT);
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init_memory_mapping(start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT);
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}
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printk(KERN_INFO "PCI-DMA: using GART IOMMU.\n");
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pr_info("PCI-DMA: using GART IOMMU.\n");
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iommu_size = check_iommu_size(info.aper_base, aper_size);
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iommu_pages = iommu_size >> PAGE_SHIFT;
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@ -775,8 +783,7 @@ int __init gart_iommu_init(void)
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ret = dma_debug_resize_entries(iommu_pages);
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if (ret)
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printk(KERN_DEBUG
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"PCI-DMA: Cannot trace all the entries\n");
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pr_debug("PCI-DMA: Cannot trace all the entries\n");
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}
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#endif
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@ -786,15 +793,14 @@ int __init gart_iommu_init(void)
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*/
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iommu_area_reserve(iommu_gart_bitmap, 0, EMERGENCY_PAGES);
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agp_memory_reserved = iommu_size;
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printk(KERN_INFO
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"PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n",
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pr_info("PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n",
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iommu_size >> 20);
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iommu_start = aper_size - iommu_size;
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iommu_bus_base = info.aper_base + iommu_start;
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bad_dma_addr = iommu_bus_base;
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iommu_gatt_base = agp_gatt_table + (iommu_start>>PAGE_SHIFT);
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agp_memory_reserved = iommu_size;
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iommu_start = aper_size - iommu_size;
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iommu_bus_base = info.aper_base + iommu_start;
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bad_dma_addr = iommu_bus_base;
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iommu_gatt_base = agp_gatt_table + (iommu_start>>PAGE_SHIFT);
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/*
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* Unmap the IOMMU part of the GART. The alias of the page is
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@ -816,7 +822,7 @@ int __init gart_iommu_init(void)
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* the pages as Not-Present:
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*/
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wbinvd();
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/*
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* Now all caches are flushed and we can safely enable
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* GART hardware. Doing it early leaves the possibility
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