drm/radeon: fix mclk vddc configuration for cards for hawaii
Need to use vddc0 for vdcc1 for certain hawaii configurations. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2924,6 +2924,14 @@ static int ci_populate_all_memory_levels(struct radeon_device *rdev)
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pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
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if ((dpm_table->mclk_table.count >= 2) &&
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((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 0x67B1))) {
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pi->smc_state_table.MemoryLevel[1].MinVddc =
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pi->smc_state_table.MemoryLevel[0].MinVddc;
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pi->smc_state_table.MemoryLevel[1].MinVddcPhases =
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pi->smc_state_table.MemoryLevel[0].MinVddcPhases;
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}
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pi->smc_state_table.MemoryLevel[0].ActivityLevel = cpu_to_be16(0x1F);
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pi->smc_state_table.MemoryDpmLevelCount = (u8)dpm_table->mclk_table.count;
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