Staging: IIO: DDS: AD9833 / AD9834 driver
Changes since RFC/v1: IIO: Apply list review feedback Apply list review feedback: Rename attributes to fit IIO convention used in other drivers. Fix typos. Provide ddsX_out_enable as opposed to ddsX_out_disable. Use proper __devexit marking. Use strict_strtoul() to avoid negatives. Changes since v2: IIO: ad9834.c: Apply more list review feedback Update use of dds convenience macros. Fix tabbing. Remove superfluous brackets. Keep output disabled after probe. Remove unnecessary code. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Reviewed-by: Datta Shubhrajyoti <shubhrajyoti@ti.com> Acked-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -17,6 +17,16 @@ config AD9832
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Say yes here to build support for Analog Devices DDS chip
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ad9832 and ad9835, provides direct access via sysfs.
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config AD9834
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tristate "Analog Devices ad9833/4/ driver"
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depends on SPI
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help
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Say yes here to build support for Analog Devices DDS chip
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AD9833 and AD9834, provides direct access via sysfs.
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To compile this driver as a module, choose M here: the
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module will be called ad9834.
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config AD9850
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tristate "Analog Devices ad9850/1 driver"
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depends on SPI
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@ -4,6 +4,7 @@
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obj-$(CONFIG_AD5930) += ad5930.o
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obj-$(CONFIG_AD9832) += ad9832.o
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obj-$(CONFIG_AD9834) += ad9834.o
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obj-$(CONFIG_AD9850) += ad9850.o
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obj-$(CONFIG_AD9852) += ad9852.o
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obj-$(CONFIG_AD9910) += ad9910.o
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@ -0,0 +1,477 @@
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/*
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* AD9834 SPI DAC driver
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*
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* Copyright 2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/list.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <asm/div64.h>
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#include "../iio.h"
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#include "../sysfs.h"
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#include "dds.h"
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#include "ad9834.h"
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static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout)
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{
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unsigned long long freqreg = (u64) fout * (u64) (1 << AD9834_FREQ_BITS);
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do_div(freqreg, mclk);
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return freqreg;
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}
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static int ad9834_write_frequency(struct ad9834_state *st,
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unsigned long addr, unsigned long fout)
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{
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unsigned long regval;
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if (fout > (st->mclk / 2))
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return -EINVAL;
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regval = ad9834_calc_freqreg(st->mclk, fout);
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st->freq_data[0] = cpu_to_be16(addr | (regval &
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RES_MASK(AD9834_FREQ_BITS / 2)));
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st->freq_data[1] = cpu_to_be16(addr | ((regval >>
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(AD9834_FREQ_BITS / 2)) &
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RES_MASK(AD9834_FREQ_BITS / 2)));
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return spi_sync(st->spi, &st->freq_msg);;
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}
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static int ad9834_write_phase(struct ad9834_state *st,
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unsigned long addr, unsigned long phase)
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{
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if (phase > (1 << AD9834_PHASE_BITS))
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return -EINVAL;
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st->data = cpu_to_be16(addr | phase);
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return spi_sync(st->spi, &st->msg);
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}
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static ssize_t ad9834_write(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad9834_state *st = dev_info->dev_data;
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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int ret;
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long val;
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ret = strict_strtoul(buf, 10, &val);
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if (ret)
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goto error_ret;
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mutex_lock(&dev_info->mlock);
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switch (this_attr->address) {
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case AD9834_REG_FREQ0:
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case AD9834_REG_FREQ1:
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ret = ad9834_write_frequency(st, this_attr->address, val);
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break;
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case AD9834_REG_PHASE0:
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case AD9834_REG_PHASE1:
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ret = ad9834_write_phase(st, this_attr->address, val);
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break;
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case AD9834_OPBITEN:
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if (st->control & AD9834_MODE) {
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ret = -EINVAL; /* AD9843 reserved mode */
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break;
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}
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if (val)
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st->control |= AD9834_OPBITEN;
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else
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st->control &= ~AD9834_OPBITEN;
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st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
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ret = spi_sync(st->spi, &st->msg);
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break;
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case AD9834_PIN_SW:
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if (val)
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st->control |= AD9834_PIN_SW;
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else
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st->control &= ~AD9834_PIN_SW;
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st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
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ret = spi_sync(st->spi, &st->msg);
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break;
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case AD9834_FSEL:
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case AD9834_PSEL:
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if (val == 0)
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st->control &= ~(this_attr->address | AD9834_PIN_SW);
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else if (val == 1) {
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st->control |= this_attr->address;
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st->control &= ~AD9834_PIN_SW;
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} else {
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ret = -EINVAL;
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break;
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}
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st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
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ret = spi_sync(st->spi, &st->msg);
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break;
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case AD9834_RESET:
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if (val)
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st->control &= ~AD9834_RESET;
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else
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st->control |= AD9834_RESET;
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st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
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ret = spi_sync(st->spi, &st->msg);
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break;
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default:
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ret = -ENODEV;
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}
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mutex_unlock(&dev_info->mlock);
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error_ret:
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return ret ? ret : len;
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}
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static ssize_t ad9834_store_wavetype(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad9834_state *st = dev_info->dev_data;
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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int ret = 0;
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bool is_ad9833 = st->devid == ID_AD9833;
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mutex_lock(&dev_info->mlock);
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switch (this_attr->address) {
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case 0:
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if (sysfs_streq(buf, "sine")) {
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st->control &= ~AD9834_MODE;
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if (is_ad9833)
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st->control &= ~AD9834_OPBITEN;
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} else if (sysfs_streq(buf, "triangle")) {
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if (is_ad9833) {
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st->control &= ~AD9834_OPBITEN;
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st->control |= AD9834_MODE;
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} else if (st->control & AD9834_OPBITEN) {
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ret = -EINVAL; /* AD9843 reserved mode */
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} else {
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st->control |= AD9834_MODE;
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}
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} else if (is_ad9833 && sysfs_streq(buf, "square")) {
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st->control &= ~AD9834_MODE;
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st->control |= AD9834_OPBITEN;
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} else {
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ret = -EINVAL;
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}
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break;
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case 1:
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if (sysfs_streq(buf, "square") &&
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!(st->control & AD9834_MODE)) {
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st->control &= ~AD9834_MODE;
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st->control |= AD9834_OPBITEN;
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} else {
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ret = -EINVAL;
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}
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break;
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default:
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ret = -EINVAL;
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break;
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}
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if (!ret) {
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st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
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ret = spi_sync(st->spi, &st->msg);
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}
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mutex_unlock(&dev_info->mlock);
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return ret ? ret : len;
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}
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static ssize_t ad9834_show_name(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad9834_state *st = iio_dev_get_devdata(dev_info);
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return sprintf(buf, "%s\n", spi_get_device_id(st->spi)->name);
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}
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static IIO_DEVICE_ATTR(name, S_IRUGO, ad9834_show_name, NULL, 0);
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static ssize_t ad9834_show_out0_wavetype_available(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad9834_state *st = iio_dev_get_devdata(dev_info);
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char *str;
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if (st->devid == ID_AD9833)
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str = "sine triangle square";
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else if (st->control & AD9834_OPBITEN)
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str = "sine";
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else
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str = "sine triangle";
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return sprintf(buf, "%s\n", str);
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}
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static IIO_DEVICE_ATTR(dds0_out0_wavetype_available, S_IRUGO,
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ad9834_show_out0_wavetype_available, NULL, 0);
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static ssize_t ad9834_show_out1_wavetype_available(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad9834_state *st = iio_dev_get_devdata(dev_info);
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char *str;
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if (st->control & AD9834_MODE)
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str = "";
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else
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str = "square";
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return sprintf(buf, "%s\n", str);
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}
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static IIO_DEVICE_ATTR(dds0_out1_wavetype_available, S_IRUGO,
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ad9834_show_out1_wavetype_available, NULL, 0);
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/**
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* see dds.h for further information
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*/
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static IIO_DEV_ATTR_FREQ(0, 0, S_IWUSR, NULL, ad9834_write, AD9834_REG_FREQ0);
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static IIO_DEV_ATTR_FREQ(0, 1, S_IWUSR, NULL, ad9834_write, AD9834_REG_FREQ1);
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static IIO_DEV_ATTR_FREQSYMBOL(0, S_IWUSR, NULL, ad9834_write, AD9834_FSEL);
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static IIO_CONST_ATTR_FREQ_SCALE(0, "1"); /* 1Hz */
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static IIO_DEV_ATTR_PHASE(0, 0, S_IWUSR, NULL, ad9834_write, AD9834_REG_PHASE0);
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static IIO_DEV_ATTR_PHASE(0, 1, S_IWUSR, NULL, ad9834_write, AD9834_REG_PHASE1);
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static IIO_DEV_ATTR_PHASESYMBOL(0, S_IWUSR, NULL, ad9834_write, AD9834_PSEL);
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static IIO_CONST_ATTR_PHASE_SCALE(0, "0.0015339808"); /* 2PI/2^12 rad*/
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static IIO_DEV_ATTR_PINCONTROL_EN(0, S_IWUSR, NULL,
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ad9834_write, AD9834_PIN_SW);
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static IIO_DEV_ATTR_OUT_ENABLE(0, S_IWUSR, NULL, ad9834_write, AD9834_RESET);
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static IIO_DEV_ATTR_OUTY_ENABLE(0, 1, S_IWUSR, NULL,
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ad9834_write, AD9834_OPBITEN);
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static IIO_DEV_ATTR_OUT_WAVETYPE(0, 0, ad9834_store_wavetype, 0);
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static IIO_DEV_ATTR_OUT_WAVETYPE(0, 1, ad9834_store_wavetype, 1);
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static struct attribute *ad9834_attributes[] = {
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&iio_dev_attr_dds0_freq0.dev_attr.attr,
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&iio_dev_attr_dds0_freq1.dev_attr.attr,
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&iio_const_attr_dds0_freq_scale.dev_attr.attr,
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&iio_dev_attr_dds0_phase0.dev_attr.attr,
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&iio_dev_attr_dds0_phase1.dev_attr.attr,
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&iio_const_attr_dds0_phase_scale.dev_attr.attr,
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&iio_dev_attr_dds0_pincontrol_en.dev_attr.attr,
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&iio_dev_attr_dds0_freqsymbol.dev_attr.attr,
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&iio_dev_attr_dds0_phasesymbol.dev_attr.attr,
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&iio_dev_attr_dds0_out_enable.dev_attr.attr,
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&iio_dev_attr_dds0_out1_enable.dev_attr.attr,
|
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&iio_dev_attr_dds0_out0_wavetype.dev_attr.attr,
|
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&iio_dev_attr_dds0_out1_wavetype.dev_attr.attr,
|
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&iio_dev_attr_dds0_out0_wavetype_available.dev_attr.attr,
|
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&iio_dev_attr_dds0_out1_wavetype_available.dev_attr.attr,
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&iio_dev_attr_name.dev_attr.attr,
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NULL,
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};
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static mode_t ad9834_attr_is_visible(struct kobject *kobj,
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struct attribute *attr, int n)
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{
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struct device *dev = container_of(kobj, struct device, kobj);
|
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struct iio_dev *dev_info = dev_get_drvdata(dev);
|
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struct ad9834_state *st = iio_dev_get_devdata(dev_info);
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mode_t mode = attr->mode;
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if (st->devid == ID_AD9834)
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return mode;
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|
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if ((attr == &iio_dev_attr_dds0_out1_enable.dev_attr.attr) ||
|
||||
(attr == &iio_dev_attr_dds0_out1_wavetype.dev_attr.attr) ||
|
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(attr ==
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&iio_dev_attr_dds0_out1_wavetype_available.dev_attr.attr))
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mode = 0;
|
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|
||||
return mode;
|
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}
|
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|
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static const struct attribute_group ad9834_attribute_group = {
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.attrs = ad9834_attributes,
|
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.is_visible = ad9834_attr_is_visible,
|
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};
|
||||
|
||||
static int __devinit ad9834_probe(struct spi_device *spi)
|
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{
|
||||
struct ad9834_platform_data *pdata = spi->dev.platform_data;
|
||||
struct ad9834_state *st;
|
||||
int ret;
|
||||
|
||||
if (!pdata) {
|
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dev_dbg(&spi->dev, "no platform data?\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
st = kzalloc(sizeof(*st), GFP_KERNEL);
|
||||
if (st == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto error_ret;
|
||||
}
|
||||
|
||||
st->reg = regulator_get(&spi->dev, "vcc");
|
||||
if (!IS_ERR(st->reg)) {
|
||||
ret = regulator_enable(st->reg);
|
||||
if (ret)
|
||||
goto error_put_reg;
|
||||
}
|
||||
|
||||
st->mclk = pdata->mclk;
|
||||
|
||||
spi_set_drvdata(spi, st);
|
||||
|
||||
st->spi = spi;
|
||||
st->devid = spi_get_device_id(spi)->driver_data;
|
||||
|
||||
st->indio_dev = iio_allocate_device();
|
||||
if (st->indio_dev == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto error_disable_reg;
|
||||
}
|
||||
|
||||
st->indio_dev->dev.parent = &spi->dev;
|
||||
st->indio_dev->attrs = &ad9834_attribute_group;
|
||||
st->indio_dev->dev_data = (void *) st;
|
||||
st->indio_dev->driver_module = THIS_MODULE;
|
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st->indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
|
||||
/* Setup default messages */
|
||||
|
||||
st->xfer.tx_buf = &st->data;
|
||||
st->xfer.len = 2;
|
||||
|
||||
spi_message_init(&st->msg);
|
||||
spi_message_add_tail(&st->xfer, &st->msg);
|
||||
|
||||
st->freq_xfer[0].tx_buf = &st->freq_data[0];
|
||||
st->freq_xfer[0].len = 2;
|
||||
st->freq_xfer[0].cs_change = 1;
|
||||
st->freq_xfer[1].tx_buf = &st->freq_data[1];
|
||||
st->freq_xfer[1].len = 2;
|
||||
|
||||
spi_message_init(&st->freq_msg);
|
||||
spi_message_add_tail(&st->freq_xfer[0], &st->freq_msg);
|
||||
spi_message_add_tail(&st->freq_xfer[1], &st->freq_msg);
|
||||
|
||||
st->control = AD9834_B28 | AD9834_RESET;
|
||||
|
||||
if (!pdata->en_div2)
|
||||
st->control |= AD9834_DIV2;
|
||||
|
||||
if (!pdata->en_signbit_msb_out && (st->devid == ID_AD9834))
|
||||
st->control |= AD9834_SIGN_PIB;
|
||||
|
||||
st->data = cpu_to_be16(AD9834_REG_CMD | st->control);
|
||||
ret = spi_sync(st->spi, &st->msg);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "device init failed\n");
|
||||
goto error_free_device;
|
||||
}
|
||||
|
||||
ret = ad9834_write_frequency(st, AD9834_REG_FREQ0, pdata->freq0);
|
||||
if (ret)
|
||||
goto error_free_device;
|
||||
|
||||
ret = ad9834_write_frequency(st, AD9834_REG_FREQ1, pdata->freq1);
|
||||
if (ret)
|
||||
goto error_free_device;
|
||||
|
||||
ret = ad9834_write_phase(st, AD9834_REG_PHASE0, pdata->phase0);
|
||||
if (ret)
|
||||
goto error_free_device;
|
||||
|
||||
ret = ad9834_write_phase(st, AD9834_REG_PHASE1, pdata->phase1);
|
||||
if (ret)
|
||||
goto error_free_device;
|
||||
|
||||
ret = iio_device_register(st->indio_dev);
|
||||
if (ret)
|
||||
goto error_free_device;
|
||||
|
||||
return 0;
|
||||
|
||||
error_free_device:
|
||||
iio_free_device(st->indio_dev);
|
||||
error_disable_reg:
|
||||
if (!IS_ERR(st->reg))
|
||||
regulator_disable(st->reg);
|
||||
error_put_reg:
|
||||
if (!IS_ERR(st->reg))
|
||||
regulator_put(st->reg);
|
||||
kfree(st);
|
||||
error_ret:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit ad9834_remove(struct spi_device *spi)
|
||||
{
|
||||
struct ad9834_state *st = spi_get_drvdata(spi);
|
||||
|
||||
iio_device_unregister(st->indio_dev);
|
||||
if (!IS_ERR(st->reg)) {
|
||||
regulator_disable(st->reg);
|
||||
regulator_put(st->reg);
|
||||
}
|
||||
kfree(st);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct spi_device_id ad9834_id[] = {
|
||||
{"ad9833", ID_AD9833},
|
||||
{"ad9834", ID_AD9834},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct spi_driver ad9834_driver = {
|
||||
.driver = {
|
||||
.name = "ad9834",
|
||||
.bus = &spi_bus_type,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = ad9834_probe,
|
||||
.remove = __devexit_p(ad9834_remove),
|
||||
.id_table = ad9834_id,
|
||||
};
|
||||
|
||||
static int __init ad9834_init(void)
|
||||
{
|
||||
return spi_register_driver(&ad9834_driver);
|
||||
}
|
||||
module_init(ad9834_init);
|
||||
|
||||
static void __exit ad9834_exit(void)
|
||||
{
|
||||
spi_unregister_driver(&ad9834_driver);
|
||||
}
|
||||
module_exit(ad9834_exit);
|
||||
|
||||
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
|
||||
MODULE_DESCRIPTION("Analog Devices AD9833/AD9834 DDS");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("spi:ad9834");
|
|
@ -0,0 +1,112 @@
|
|||
/*
|
||||
* AD9834 SPI DDS driver
|
||||
*
|
||||
* Copyright 2010 Analog Devices Inc.
|
||||
*
|
||||
* Licensed under the GPL-2 or later.
|
||||
*/
|
||||
#ifndef IIO_DDS_AD9834_H_
|
||||
#define IIO_DDS_AD9834_H_
|
||||
|
||||
/* Registers */
|
||||
|
||||
#define AD9834_REG_CMD (0 << 14)
|
||||
#define AD9834_REG_FREQ0 (1 << 14)
|
||||
#define AD9834_REG_FREQ1 (2 << 14)
|
||||
#define AD9834_REG_PHASE0 (6 << 13)
|
||||
#define AD9834_REG_PHASE1 (7 << 13)
|
||||
|
||||
/* Command Control Bits */
|
||||
|
||||
#define AD9834_B28 (1 << 13)
|
||||
#define AD9834_HLB (1 << 12)
|
||||
#define AD9834_FSEL (1 << 11)
|
||||
#define AD9834_PSEL (1 << 10)
|
||||
#define AD9834_PIN_SW (1 << 9)
|
||||
#define AD9834_RESET (1 << 8)
|
||||
#define AD9834_SLEEP1 (1 << 7)
|
||||
#define AD9834_SLEEP12 (1 << 6)
|
||||
#define AD9834_OPBITEN (1 << 5)
|
||||
#define AD9834_SIGN_PIB (1 << 4)
|
||||
#define AD9834_DIV2 (1 << 3)
|
||||
#define AD9834_MODE (1 << 1)
|
||||
|
||||
#define AD9834_FREQ_BITS 28
|
||||
#define AD9834_PHASE_BITS 12
|
||||
|
||||
#define RES_MASK(bits) ((1 << (bits)) - 1)
|
||||
|
||||
/**
|
||||
* struct ad9834_state - driver instance specific data
|
||||
* @indio_dev: the industrial I/O device
|
||||
* @spi: spi_device
|
||||
* @reg: supply regulator
|
||||
* @mclk: external master clock
|
||||
* @control: cached control word
|
||||
* @xfer: default spi transfer
|
||||
* @msg: default spi message
|
||||
* @freq_xfer: tuning word spi transfer
|
||||
* @freq_msg: tuning word spi message
|
||||
* @data: spi transmit buffer
|
||||
* @freq_data: tuning word spi transmit buffer
|
||||
*/
|
||||
|
||||
struct ad9834_state {
|
||||
struct iio_dev *indio_dev;
|
||||
struct spi_device *spi;
|
||||
struct regulator *reg;
|
||||
unsigned int mclk;
|
||||
unsigned short control;
|
||||
unsigned short devid;
|
||||
struct spi_transfer xfer;
|
||||
struct spi_message msg;
|
||||
struct spi_transfer freq_xfer[2];
|
||||
struct spi_message freq_msg;
|
||||
|
||||
/*
|
||||
* DMA (thus cache coherency maintenance) requires the
|
||||
* transfer buffers to live in their own cache lines.
|
||||
*/
|
||||
unsigned short data ____cacheline_aligned;
|
||||
unsigned short freq_data[2] ;
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* TODO: struct ad7887_platform_data needs to go into include/linux/iio
|
||||
*/
|
||||
|
||||
/**
|
||||
* struct ad9834_platform_data - platform specific information
|
||||
* @mclk: master clock in Hz
|
||||
* @freq0: power up freq0 tuning word in Hz
|
||||
* @freq1: power up freq1 tuning word in Hz
|
||||
* @phase0: power up phase0 value [0..4095] correlates with 0..2PI
|
||||
* @phase1: power up phase1 value [0..4095] correlates with 0..2PI
|
||||
* @en_div2: digital output/2 is passed to the SIGN BIT OUT pin
|
||||
* @en_signbit_msb_out: the MSB (or MSB/2) of the DAC data is connected to the
|
||||
* SIGN BIT OUT pin. en_div2 controls whether it is the MSB
|
||||
* or MSB/2 that is output. if en_signbit_msb_out=false,
|
||||
* the on-board comparator is connected to SIGN BIT OUT
|
||||
*/
|
||||
|
||||
struct ad9834_platform_data {
|
||||
unsigned int mclk;
|
||||
unsigned int freq0;
|
||||
unsigned int freq1;
|
||||
unsigned short phase0;
|
||||
unsigned short phase1;
|
||||
bool en_div2;
|
||||
bool en_signbit_msb_out;
|
||||
};
|
||||
|
||||
/**
|
||||
* ad9834_supported_device_ids:
|
||||
*/
|
||||
|
||||
enum ad9834_supported_device_ids {
|
||||
ID_AD9833,
|
||||
ID_AD9834,
|
||||
};
|
||||
|
||||
#endif /* IIO_DDS_AD9834_H_ */
|
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