staging: sbe-2t3e3: Remove code that will never execute
This patch removes all references of "if 0" blocks in the sbe-2t3e3 driver. Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Родитель
be408d7807
Коммит
12f3f21d08
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@ -801,9 +801,6 @@ u32 cpld_read(struct channel *sc, u32 reg);
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void cpld_set_crc(struct channel *, u32);
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void cpld_start_intr(struct channel *);
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void cpld_stop_intr(struct channel *);
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#if 0
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void cpld_led_onoff(struct channel *, u32, u32, u32, u32);
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#endif
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void cpld_set_clock(struct channel *sc, u32 mode);
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void cpld_set_scrambler(struct channel *, u32);
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void cpld_select_panel(struct channel *, u32);
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@ -41,14 +41,6 @@ static inline void cpld_clear_bit(struct channel *channel, unsigned reg, u32 bit
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void cpld_init(struct channel *sc)
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{
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u32 val;
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#if 0
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/* reset LIU and Framer */
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val = cpld_val_map[SBE_2T3E3_CPLD_VAL_LIU_FRAMER_RESET][sc->h.slot];
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cpld_write(sc, SBE_2T3E3_CPLD_REG_STATIC_RESET, val);
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udelay(10000); /* TODO - how long? */
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val = 0;
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cpld_write(sc, SBE_2T3E3_CPLD_REG_STATIC_RESET, val);
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#endif
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/* PCRA */
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val = SBE_2T3E3_CPLD_VAL_CRC32 |
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@ -109,13 +101,6 @@ void cpld_start_intr(struct channel *sc)
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val = SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_ETHERNET_ENABLE |
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SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_FRAMER_ENABLE;
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cpld_write(sc, SBE_2T3E3_CPLD_REG_PIER, val);
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#if 0
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/*
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do you want to hang up your computer?
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ENABLE REST OF INTERRUPTS !!!
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you have been warned :).
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*/
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#endif
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}
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void cpld_stop_intr(struct channel *sc)
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@ -230,11 +230,9 @@ void t3e3_port_get_stats(struct channel *sc,
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result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2);
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sc->s.LOF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_LOF ? 1 : 0;
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sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF ? 1 : 0;
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#if 0
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sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS ? 1 : 0;
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#else
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cpld_LOS_update(sc);
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#endif
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sc->s.AIS = result & SBE_2T3E3_FRAMER_VAL_E3_RX_AIS ? 1 : 0;
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sc->s.FERF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_FERF ? 1 : 0;
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break;
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@ -243,11 +241,9 @@ void t3e3_port_get_stats(struct channel *sc,
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case SBE_2T3E3_FRAME_TYPE_T3_M13:
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result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS);
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sc->s.AIS = result & SBE_2T3E3_FRAMER_VAL_T3_RX_AIS ? 1 : 0;
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#if 0
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sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS ? 1 : 0;
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#else
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cpld_LOS_update(sc);
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#endif
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sc->s.IDLE = result & SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE ? 1 : 0;
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sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF ? 1 : 0;
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@ -322,10 +318,6 @@ void t3e3_if_config(struct channel *sc, u32 cmd, char *set,
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*rlen = sizeof(ret->u.data);
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break;
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case SBE_2T3E3_PORT_WRITE_REGS:
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#if 0
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printk(KERN_DEBUG "SBE_2T3E3_PORT_WRITE_REGS, 0x%x, 0x%x, 0x%x\n",
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((int*)data)[0], ((int*)data)[1], ((int*)data)[2]);
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#endif
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t3e3_reg_write(sc, data);
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*rlen = 0;
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break;
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@ -336,9 +328,6 @@ void t3e3_if_config(struct channel *sc, u32 cmd, char *set,
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*rlen = 0;
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break;
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}
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/* turn on interrupt */
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/* cpld_start_intr(sc); */
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}
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void t3e3_sc_init(struct channel *sc)
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@ -63,14 +63,6 @@ void dc_init(struct channel *sc)
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if (sc->p.loopback == SBE_2T3E3_LOOPBACK_ETHERNET)
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sc->p.loopback = SBE_2T3E3_LOOPBACK_NONE;
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#if 0 /* No need to clear this register - and it may be in use */
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/*
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* BOOT_ROM_SERIAL_ROM_AND_MII_MANAGEMENT (CSR9)
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*/
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val = 0;
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dc_write(sc->addr, SBE_2T3E3_21143_REG_BOOT_ROM_SERIAL_ROM_AND_MII_MANAGEMENT, val);
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#endif
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/*
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* GENERAL_PURPOSE_TIMER_AND_INTERRUPT_MITIGATION_CONTROL (CSR11)
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*/
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@ -301,15 +293,6 @@ void dc_set_loopback(struct channel *sc, u32 mode)
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return;
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}
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#if 0
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/* restart SIA */
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dc_clear_bits(sc->addr, SBE_2T3E3_21143_REG_SIA_CONNECTIVITY,
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SBE_2T3E3_21143_VAL_SIA_RESET);
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udelay(1000);
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dc_set_bits(sc->addr, SBE_2T3E3_21143_REG_SIA_CONNECTIVITY,
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SBE_2T3E3_21143_VAL_SIA_RESET);
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#endif
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/* select loopback mode */
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val = dc_read(sc->addr, SBE_2T3E3_21143_REG_OPERATION_MODE) &
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~SBE_2T3E3_21143_VAL_OPERATING_MODE;
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@ -78,64 +78,32 @@ void exar7250_start_intr(struct channel *sc, u32 type)
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case SBE_2T3E3_FRAME_TYPE_E3_G751:
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case SBE_2T3E3_FRAME_TYPE_E3_G832:
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val = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2);
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#if 0
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sc->s.LOS = val & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS ? 1 : 0;
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#else
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cpld_LOS_update(sc);
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#endif
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sc->s.OOF = val & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF ? 1 : 0;
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exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_1);
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_1,
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SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE);
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#if 0
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/*SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_ENABLE);*/
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#endif
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exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_2);
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#if 0
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_2,
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SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_ENABLE);
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#endif
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break;
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case SBE_2T3E3_FRAME_TYPE_T3_CBIT:
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case SBE_2T3E3_FRAME_TYPE_T3_M13:
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val = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS);
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#if 0
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sc->s.LOS = val & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS ? 1 : 0;
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#else
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cpld_LOS_update(sc);
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#endif
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sc->s.OOF = val & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF ? 1 : 0;
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exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_STATUS);
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_ENABLE,
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SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE);
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#if 0
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/* SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_ENABLE);*/
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#endif
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exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS);
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#if 0
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS,
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SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_ENABLE);
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#endif
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_CONTROL, 0);
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break;
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@ -43,23 +43,6 @@ void exar7300_set_loopback(struct channel *sc, u32 mode)
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val &= ~(SBE_2T3E3_LIU_VAL_LOCAL_LOOPBACK | SBE_2T3E3_LIU_VAL_REMOTE_LOOPBACK);
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val |= mode;
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exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4, val);
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#if 0
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/* TODO - is it necessary? idea from 2T3E3_HW_Test_code */
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switch (mode) {
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case SBE_2T3E3_LIU_VAL_LOOPBACK_OFF:
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break;
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case SBE_2T3E3_LIU_VAL_LOOPBACK_REMOTE:
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exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
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break;
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case SBE_2T3E3_LIU_VAL_LOOPBACK_ANALOG:
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exar7300_receive_equalization_onoff(sc, SBE_2T3E3_OFF);
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break;
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case SBE_2T3E3_LIU_VAL_LOOPBACK_DIGITAL:
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exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
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break;
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}
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#endif
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}
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void exar7300_set_frame_type(struct channel *sc, u32 type)
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@ -434,11 +434,6 @@ void exar7250_intr(struct channel *sc)
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{
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u32 status, old_OOF;
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#if 0
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/* disable interrupts */
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_ENABLE, 0);
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#endif
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old_OOF = sc->s.OOF;
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status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_STATUS);
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@ -479,13 +474,6 @@ void exar7250_intr(struct channel *sc)
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dc_start_intr(sc);
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}
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}
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#if 0
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/* reenable interrupts */
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_ENABLE,
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SBE_2T3E3_FRAMER_VAL_RX_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_TX_INTERRUPT_ENABLE
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);
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#endif
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}
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@ -503,16 +491,8 @@ void exar7250_T3_intr(struct channel *sc, u32 block_status)
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result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS);
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#if 0
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if (status & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_STATUS) {
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dev_dbg(&sc->pdev->dev,
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"Framer interrupt T3: LOS\n");
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sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS ? 1 : 0;
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}
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#else
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cpld_LOS_update(sc);
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#endif
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if (status & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_STATUS) {
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sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF ? 1 : 0;
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dev_dbg(&sc->pdev->dev,
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@ -523,16 +503,6 @@ void exar7250_T3_intr(struct channel *sc, u32 block_status)
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_ENABLE,
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SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE);
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#if 0
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SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_ENABLE
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#endif
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}
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status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS);
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@ -540,12 +510,6 @@ void exar7250_T3_intr(struct channel *sc, u32 block_status)
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dev_dbg(&sc->pdev->dev,
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"Framer interrupt T3 RX (REG[0x17] = %02X)\n",
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status);
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#if 0
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS,
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SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_ENABLE
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);
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#endif
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}
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status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_CONTROL);
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@ -582,15 +546,8 @@ void exar7250_E3_intr(struct channel *sc, u32 block_status)
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result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2);
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#if 0
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if (status & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_STATUS) {
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dev_dbg(&sc->pdev->dev,
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"Framer interrupt E3: LOS\n");
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sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS ? 1 : 0;
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}
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#else
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cpld_LOS_update(sc);
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#endif
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if (status & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_STATUS) {
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sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF ? 1 : 0;
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dev_dbg(&sc->pdev->dev,
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@ -602,13 +559,6 @@ void exar7250_E3_intr(struct channel *sc, u32 block_status)
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SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE
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);
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#if 0
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SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_ENABLE
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#endif
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}
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status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_2);
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@ -617,12 +567,6 @@ void exar7250_E3_intr(struct channel *sc, u32 block_status)
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"Framer interrupt E3 RX (REG[0x15] = %02X)\n",
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status);
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#if 0
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exar7250_write(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_2,
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SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_ENABLE |
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SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_ENABLE);
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||||
#endif
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -199,15 +199,6 @@ u32 exar7250_read(struct channel *channel, u32 reg)
|
|||
u32 result;
|
||||
unsigned long flags;
|
||||
|
||||
#if 0
|
||||
switch (reg) {
|
||||
case SBE_2T3E3_FRAMER_REG_OPERATING_MODE:
|
||||
return channel->framer_regs[reg];
|
||||
break;
|
||||
default:
|
||||
}
|
||||
#endif
|
||||
|
||||
spin_lock_irqsave(&channel->card->bootrom_lock, flags);
|
||||
|
||||
result = bootrom_read(channel, cpld_reg_map[SBE_2T3E3_CPLD_REG_FRAMER_BASE_ADDRESS]
|
||||
|
@ -243,18 +234,6 @@ u32 exar7300_read(struct channel *channel, u32 reg)
|
|||
unsigned long addr = channel->card->bootrom_addr, flags;
|
||||
u32 i, val;
|
||||
|
||||
#if 0
|
||||
switch (reg) {
|
||||
case SBE_2T3E3_LIU_REG_REG1:
|
||||
case SBE_2T3E3_LIU_REG_REG2:
|
||||
case SBE_2T3E3_LIU_REG_REG3:
|
||||
case SBE_2T3E3_LIU_REG_REG4:
|
||||
return channel->liu_regs[reg];
|
||||
break;
|
||||
default:
|
||||
}
|
||||
#endif
|
||||
|
||||
/* select correct Serial Chip */
|
||||
|
||||
spin_lock_irqsave(&channel->card->bootrom_lock, flags);
|
||||
|
|
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