ASoC: wm8904: configure sysclk/FLL automatically
This adds a new mode WM8904_CLK_AUTO which automatically enables the FLL if a frequency different than the MCLK is set. These additions make the codec work with the simple-card driver in general and especially in systems where the MCLK doesn't match the required clock. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20191108203152.19098-1-michael@walle.cc Signed-off-by: Mark Brown <broonie@kernel.org>
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e2db787bdc
Коммит
13409d27cb
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@ -1410,34 +1410,6 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
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return 0;
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}
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static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct snd_soc_component *component = dai->component;
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struct wm8904_priv *priv = snd_soc_component_get_drvdata(component);
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switch (clk_id) {
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case WM8904_CLK_MCLK:
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priv->sysclk_src = clk_id;
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priv->mclk_rate = freq;
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break;
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case WM8904_CLK_FLL:
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priv->sysclk_src = clk_id;
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break;
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default:
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return -EINVAL;
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}
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dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq);
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wm8904_configure_clocking(component);
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return 0;
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}
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static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_component *component = dai->component;
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@ -1824,6 +1796,50 @@ out:
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return 0;
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}
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static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct snd_soc_component *component = dai->component;
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struct wm8904_priv *priv = snd_soc_component_get_drvdata(component);
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unsigned long mclk_freq;
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int ret;
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switch (clk_id) {
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case WM8904_CLK_AUTO:
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mclk_freq = clk_get_rate(priv->mclk);
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/* enable FLL if a different sysclk is desired */
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if (mclk_freq != freq) {
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priv->sysclk_src = WM8904_CLK_FLL;
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ret = wm8904_set_fll(dai, WM8904_FLL_MCLK,
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WM8904_FLL_MCLK,
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mclk_freq, freq);
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if (ret)
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return ret;
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break;
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}
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clk_id = WM8904_CLK_MCLK;
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/* fallthrough */
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case WM8904_CLK_MCLK:
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priv->sysclk_src = clk_id;
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priv->mclk_rate = freq;
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break;
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case WM8904_CLK_FLL:
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priv->sysclk_src = clk_id;
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break;
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default:
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return -EINVAL;
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}
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dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq);
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wm8904_configure_clocking(component);
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return 0;
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}
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static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute)
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{
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struct snd_soc_component *component = codec_dai->component;
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@ -10,6 +10,7 @@
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#ifndef _WM8904_H
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#define _WM8904_H
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#define WM8904_CLK_AUTO 0
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#define WM8904_CLK_MCLK 1
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#define WM8904_CLK_FLL 2
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