drm/meson: dw_hdmi: add resume/suspend hooks
Add the suspend and resume hooks to: - reset the whole HDMI glue and HDMI controller on suspend - re-init the HDMI glue and HDMI controller on resume The HDMI glue init is refactored to be re-used from the resume hook. It makes usage of dw_hdmi_resume() to recover a functionnal DDC bus. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Kevin Hilman <khilman@baylibre.com> [narmstrong: fixed typo in commit log, and rebased on drm-misc-next] Link: https://patchwork.freedesktop.org/patch/msgid/20190827095825.21015-2-narmstrong@baylibre.com
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@ -802,6 +802,47 @@ static bool meson_hdmi_connector_is_available(struct device *dev)
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return false;
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}
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static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
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{
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struct meson_drm *priv = meson_dw_hdmi->priv;
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/* Enable clocks */
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regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);
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/* Bring HDMITX MEM output of power down */
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regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
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/* Reset HDMITX APB & TX & PHY */
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reset_control_reset(meson_dw_hdmi->hdmitx_apb);
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reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
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reset_control_reset(meson_dw_hdmi->hdmitx_phy);
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/* Enable APB3 fail on error */
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if (!meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
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writel_bits_relaxed(BIT(15), BIT(15),
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meson_dw_hdmi->hdmitx + HDMITX_TOP_CTRL_REG);
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writel_bits_relaxed(BIT(15), BIT(15),
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meson_dw_hdmi->hdmitx + HDMITX_DWC_CTRL_REG);
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}
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/* Bring out of reset */
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meson_dw_hdmi->data->top_write(meson_dw_hdmi,
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HDMITX_TOP_SW_RESET, 0);
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msleep(20);
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meson_dw_hdmi->data->top_write(meson_dw_hdmi,
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HDMITX_TOP_CLK_CNTL, 0xff);
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/* Enable HDMI-TX Interrupt */
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meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,
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HDMITX_TOP_INTR_CORE);
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meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_MASKN,
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HDMITX_TOP_INTR_CORE);
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}
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static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
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void *data)
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{
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@ -925,40 +966,7 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
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DRM_DEBUG_DRIVER("encoder initialized\n");
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/* Enable clocks */
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regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);
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/* Bring HDMITX MEM output of power down */
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regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
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/* Reset HDMITX APB & TX & PHY */
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reset_control_reset(meson_dw_hdmi->hdmitx_apb);
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reset_control_reset(meson_dw_hdmi->hdmitx_ctrl);
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reset_control_reset(meson_dw_hdmi->hdmitx_phy);
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/* Enable APB3 fail on error */
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if (!meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
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writel_bits_relaxed(BIT(15), BIT(15),
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meson_dw_hdmi->hdmitx + HDMITX_TOP_CTRL_REG);
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writel_bits_relaxed(BIT(15), BIT(15),
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meson_dw_hdmi->hdmitx + HDMITX_DWC_CTRL_REG);
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}
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/* Bring out of reset */
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meson_dw_hdmi->data->top_write(meson_dw_hdmi,
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HDMITX_TOP_SW_RESET, 0);
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msleep(20);
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meson_dw_hdmi->data->top_write(meson_dw_hdmi,
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HDMITX_TOP_CLK_CNTL, 0xff);
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/* Enable HDMI-TX Interrupt */
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meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,
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HDMITX_TOP_INTR_CORE);
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meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_MASKN,
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HDMITX_TOP_INTR_CORE);
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meson_dw_hdmi_init(meson_dw_hdmi);
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/* Bridge / Connector */
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@ -994,6 +1002,34 @@ static const struct component_ops meson_dw_hdmi_ops = {
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.unbind = meson_dw_hdmi_unbind,
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};
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static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
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{
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struct meson_dw_hdmi *meson_dw_hdmi = dev_get_drvdata(dev);
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if (!meson_dw_hdmi)
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return 0;
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/* Reset TOP */
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meson_dw_hdmi->data->top_write(meson_dw_hdmi,
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HDMITX_TOP_SW_RESET, 0);
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return 0;
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}
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static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
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{
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struct meson_dw_hdmi *meson_dw_hdmi = dev_get_drvdata(dev);
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if (!meson_dw_hdmi)
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return 0;
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meson_dw_hdmi_init(meson_dw_hdmi);
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dw_hdmi_resume(meson_dw_hdmi->hdmi);
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return 0;
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}
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static int meson_dw_hdmi_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &meson_dw_hdmi_ops);
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@ -1006,6 +1042,11 @@ static int meson_dw_hdmi_remove(struct platform_device *pdev)
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return 0;
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}
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static const struct dev_pm_ops meson_dw_hdmi_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(meson_dw_hdmi_pm_suspend,
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meson_dw_hdmi_pm_resume)
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};
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static const struct of_device_id meson_dw_hdmi_of_table[] = {
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{ .compatible = "amlogic,meson-gxbb-dw-hdmi",
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.data = &meson_dw_hdmi_gx_data },
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@ -1025,6 +1066,7 @@ static struct platform_driver meson_dw_hdmi_platform_driver = {
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = meson_dw_hdmi_of_table,
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.pm = &meson_dw_hdmi_pm_ops,
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},
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};
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module_platform_driver(meson_dw_hdmi_platform_driver);
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