omap3 flash: rename board-sdp-flash.c to be use by other boards
rename board-sdp-flash.c(board-flash.c) and board-sdp.h(board-flash.h) to used by other board e.g. zoom Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -121,7 +121,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \
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hsmmc.o
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obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \
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hsmmc.o \
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board-sdp-flash.o
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board-flash.o
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obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
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obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
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board-rx51-sdram.o \
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@ -41,7 +41,7 @@
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#include <plat/control.h>
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#include <plat/gpmc-smc91x.h>
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#include <mach/board-sdp.h>
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#include <mach/board-flash.h>
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#include "mux.h"
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#include "sdram-qimonda-hyb18m512160af-6.h"
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@ -667,6 +667,18 @@ static struct omap_board_mux board_mux[] __initdata = {
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#define board_mux NULL
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#endif
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/*
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* SDP3430 V2 Board CS organization
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* Different from SDP3430 V1. Now 4 switches used to specify CS
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*
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* See also the Switch S8 settings in the comments.
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*/
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static char chip_sel_3430[][GPMC_CS_NUM] = {
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{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
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{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
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{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
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};
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static struct mtd_partition sdp_nor_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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@ -797,7 +809,7 @@ static void __init omap_3430sdp_init(void)
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omap_serial_init();
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usb_musb_init(&musb_board_data);
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board_smc91x_init();
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sdp_flash_init(sdp_flash_partitions);
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board_flash_init(sdp_flash_partitions, chip_sel_3430);
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sdp3430_display_init();
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enable_board_wakeup_source();
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usb_ehci_init(&ehci_pdata);
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@ -21,7 +21,7 @@
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#include <plat/nand.h>
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#include <plat/onenand.h>
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#include <plat/tc.h>
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#include <mach/board-sdp.h>
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#include <mach/board-flash.h>
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#define REG_FPGA_REV 0x10
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#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
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@ -29,72 +29,53 @@
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#define DEBUG_BASE 0x08000000 /* debug board */
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#define PDC_NOR 1
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#define PDC_NAND 2
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#define PDC_ONENAND 3
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#define DBG_MPDB 4
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/* various memory sizes */
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#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
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#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
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/*
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* SDP3430 V2 Board CS organization
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* Different from SDP3430 V1. Now 4 switches used to specify CS
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*
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* See also the Switch S8 settings in the comments.
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*
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* REVISIT: Add support for 2430 SDP
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*/
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static const unsigned char chip_sel_sdp[][GPMC_CS_NUM] = {
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{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
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{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
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{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
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};
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static struct physmap_flash_data sdp_nor_data = {
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static struct physmap_flash_data board_nor_data = {
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.width = 2,
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};
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static struct resource sdp_nor_resource = {
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static struct resource board_nor_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device sdp_nor_device = {
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static struct platform_device board_nor_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &sdp_nor_data,
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.platform_data = &board_nor_data,
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},
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.num_resources = 1,
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.resource = &sdp_nor_resource,
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.resource = &board_nor_resource,
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};
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static void
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__init board_nor_init(struct flash_partitions sdp_nor_parts, u8 cs)
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__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
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{
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int err;
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sdp_nor_data.parts = sdp_nor_parts.parts;
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sdp_nor_data.nr_parts = sdp_nor_parts.nr_parts;
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board_nor_data.parts = nor_parts;
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board_nor_data.nr_parts = nr_parts;
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/* Configure start address and size of NOR device */
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if (omap_rev() >= OMAP3430_REV_ES1_0) {
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err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
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(unsigned long *)&sdp_nor_resource.start);
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sdp_nor_resource.end = sdp_nor_resource.start
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(unsigned long *)&board_nor_resource.start);
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board_nor_resource.end = board_nor_resource.start
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+ FLASH_SIZE_SDPV2 - 1;
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} else {
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err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
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(unsigned long *)&sdp_nor_resource.start);
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sdp_nor_resource.end = sdp_nor_resource.start
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(unsigned long *)&board_nor_resource.start);
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board_nor_resource.end = board_nor_resource.start
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+ FLASH_SIZE_SDPV1 - 1;
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}
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if (err < 0) {
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printk(KERN_ERR "NOR: Can't request GPMC CS\n");
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return;
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}
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if (platform_device_register(&sdp_nor_device) < 0)
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if (platform_device_register(&board_nor_device) < 0)
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printk(KERN_ERR "Unable to register NOR device\n");
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}
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@ -105,17 +86,18 @@ static struct omap_onenand_platform_data board_onenand_data = {
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};
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static void
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__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)
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__init board_onenand_init(struct mtd_partition *onenand_parts,
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u8 nr_parts, u8 cs)
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{
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board_onenand_data.cs = cs;
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board_onenand_data.parts = sdp_onenand_parts.parts;
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board_onenand_data.nr_parts = sdp_onenand_parts.nr_parts;
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board_onenand_data.parts = onenand_parts;
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board_onenand_data.nr_parts = nr_parts;
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gpmc_onenand_init(&board_onenand_data);
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}
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#else
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static void
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__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)
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__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
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{
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}
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#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
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@ -147,7 +129,7 @@ static struct gpmc_timings nand_timings = {
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.wr_data_mux_bus = 0,
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};
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static struct omap_nand_platform_data sdp_nand_data = {
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static struct omap_nand_platform_data board_nand_data = {
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.nand_setup = NULL,
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.gpmc_t = &nand_timings,
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.dma_channel = -1, /* disable DMA in OMAP NAND driver */
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@ -155,18 +137,18 @@ static struct omap_nand_platform_data sdp_nand_data = {
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.devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */
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};
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static void
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__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)
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void
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__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
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{
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sdp_nand_data.cs = cs;
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sdp_nand_data.parts = sdp_nand_parts.parts;
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sdp_nand_data.nr_parts = sdp_nand_parts.nr_parts;
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board_nand_data.cs = cs;
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board_nand_data.parts = nand_parts;
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board_nand_data.nr_parts = nr_parts;
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gpmc_nand_init(&sdp_nand_data);
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gpmc_nand_init(&board_nand_data);
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}
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#else
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static void
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__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)
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void
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__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
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{
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}
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#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
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@ -210,7 +192,8 @@ unmap:
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*
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* @return - void.
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*/
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void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
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void board_flash_init(struct flash_partitions partition_info[],
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char chip_sel_board[][GPMC_CS_NUM])
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{
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u8 cs = 0;
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u8 norcs = GPMC_CS_NUM + 1;
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@ -227,7 +210,7 @@ void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
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printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
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return;
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}
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config_sel = (unsigned char *)(chip_sel_sdp[idx]);
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config_sel = (unsigned char *)(chip_sel_board[idx]);
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while (cs < GPMC_CS_NUM) {
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switch (config_sel[cs]) {
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@ -251,17 +234,20 @@ void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
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printk(KERN_INFO "NOR: Unable to find configuration "
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"in GPMC\n");
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else
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board_nor_init(sdp_partition_info[0], norcs);
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board_nor_init(partition_info[0].parts,
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partition_info[0].nr_parts, norcs);
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if (onenandcs > GPMC_CS_NUM)
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printk(KERN_INFO "OneNAND: Unable to find configuration "
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"in GPMC\n");
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else
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board_onenand_init(sdp_partition_info[1], onenandcs);
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board_onenand_init(partition_info[1].parts,
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partition_info[1].nr_parts, onenandcs);
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if (nandcs > GPMC_CS_NUM)
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printk(KERN_INFO "NAND: Unable to find configuration "
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"in GPMC\n");
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else
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board_nand_init(sdp_partition_info[2], nandcs);
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board_nand_init(partition_info[2].parts,
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partition_info[2].nr_parts, nandcs);
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}
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@ -12,10 +12,17 @@
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*/
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <plat/gpmc.h>
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#define PDC_NOR 1
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#define PDC_NAND 2
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#define PDC_ONENAND 3
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#define DBG_MPDB 4
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struct flash_partitions {
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struct mtd_partition *parts;
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int nr_parts;
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};
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extern void sdp_flash_init(struct flash_partitions []);
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extern void board_flash_init(struct flash_partitions [],
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char chip_sel[][GPMC_CS_NUM]);
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