clk: sunxi-ng: Support multiple variable pre-dividers

On the A83T, the AHB1 clock has a shared pre-divider on the two
PLL-PERIPH clock parents. To support such instances of shared
pre-dividers, this patch extends the mux clock type to support
multiple variable pre-dividers.

As the pre-dividers are only used to calculate the rate, but
do not participate in the factorization process, this is fairly
straightforward.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

drivers/clk/sunxi-ng/ccu-sun50i-a64.c

@@ -211,6 +211,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
 
 static const char * const ahb1_parents[] = { "osc32k", "osc24M",
 					     "axi", "pll-periph0" };
+static const struct ccu_mux_var_prediv ahb1_predivs[] = {
+	{ .index = 3, .shift = 6, .width = 2 },
+};
 static struct ccu_div ahb1_clk = {
 	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
 
@@ -218,11 +221,8 @@ static struct ccu_div ahb1_clk = {
 		.shift	= 12,
 		.width	= 2,
 
-		.variable_prediv	= {
+		.var_predivs	= ahb1_predivs,
-			.index	= 3,
+		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),
-			.shift	= 6,
-			.width	= 2,
-		},
 	},
 
 	.common		= {

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

@@ -195,6 +195,9 @@ static SUNXI_CCU_DIV_TABLE(axi_clk, "axi", "cpu",
 
 static const char * const ahb1_parents[] = { "osc32k", "osc24M",
 					     "axi", "pll-periph" };
+static const struct ccu_mux_var_prediv ahb1_predivs[] = {
+	{ .index = 3, .shift = 6, .width = 2 },
+};
 
 static struct ccu_div ahb1_clk = {
 	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
@@ -203,11 +206,8 @@ static struct ccu_div ahb1_clk = {
 		.shift	= 12,
 		.width	= 2,
 
-		.variable_prediv	= {
+		.var_predivs	= ahb1_predivs,
-			.index	= 3,
+		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),
-			.shift	= 6,
-			.width	= 2,
-		},
 	},
 
 	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-a23.c

@@ -169,6 +169,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
 
 static const char * const ahb1_parents[] = { "osc32k", "osc24M",
 					     "axi" , "pll-periph" };
+static const struct ccu_mux_var_prediv ahb1_predivs[] = {
+	{ .index = 3, .shift = 6, .width = 2 },
+};
 static struct ccu_div ahb1_clk = {
 	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
 
@@ -176,11 +179,8 @@ static struct ccu_div ahb1_clk = {
 		.shift	= 12,
 		.width	= 2,
 
-		.variable_prediv	= {
+		.var_predivs	= ahb1_predivs,
-			.index	= 3,
+		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),
-			.shift	= 6,
-			.width	= 2,
-		},
 	},
 
 	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-a33.c

@@ -180,6 +180,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
 
 static const char * const ahb1_parents[] = { "osc32k", "osc24M",
 					     "axi" , "pll-periph" };
+static const struct ccu_mux_var_prediv ahb1_predivs[] = {
+	{ .index = 3, .shift = 6, .width = 2 },
+};
 static struct ccu_div ahb1_clk = {
 	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
 
@@ -187,11 +190,8 @@ static struct ccu_div ahb1_clk = {
 		.shift	= 12,
 		.width	= 2,
 
-		.variable_prediv	= {
+		.var_predivs	= ahb1_predivs,
-			.index	= 3,
+		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),
-			.shift	= 6,
-			.width	= 2,
-		},
 	},
 
 	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-h3.c

@@ -141,6 +141,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
 
 static const char * const ahb1_parents[] = { "osc32k", "osc24M",
 					     "axi" , "pll-periph0" };
+static const struct ccu_mux_var_prediv ahb1_predivs[] = {
+	{ .index = 3, .shift = 6, .width = 2 },
+};
 static struct ccu_div ahb1_clk = {
 	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
 
@@ -148,11 +151,8 @@ static struct ccu_div ahb1_clk = {
 		.shift	= 12,
 		.width	= 2,
 
-		.variable_prediv	= {
+		.var_predivs	= ahb1_predivs,
-			.index	= 3,
+		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),
-			.shift	= 6,
-			.width	= 2,
-		},
 	},
 
 	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-r.c

@@ -27,6 +27,9 @@
 
 static const char * const ar100_parents[] = { "osc32k", "osc24M",
 					     "pll-periph0", "iosc" };
+static const struct ccu_mux_var_prediv ar100_predivs[] = {
+	{ .index = 2, .shift = 8, .width = 5 },
+};
 
 static struct ccu_div ar100_clk = {
 	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
@@ -35,11 +38,8 @@ static struct ccu_div ar100_clk = {
 		.shift	= 16,
 		.width	= 2,
 
-		.variable_prediv	= {
+		.var_predivs	= ar100_predivs,
-			.index	= 2,
+		.n_var_predivs	= ARRAY_SIZE(ar100_predivs),
-			.shift	= 8,
-			.width	= 5,
-		},
 	},
 
 	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

@@ -132,6 +132,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpu", 0x050, 0, 2, 0);
 
 static const char * const ahb1_parents[] = { "osc32k", "osc24M",
 					     "axi", "pll-periph0" };
+static const struct ccu_mux_var_prediv ahb1_predivs[] = {
+	{ .index = 3, .shift = 6, .width = 2 },
+};
 static struct ccu_div ahb1_clk = {
 	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
 
@@ -139,11 +142,8 @@ static struct ccu_div ahb1_clk = {
 		.shift	= 12,
 		.width	= 2,
 
-		.variable_prediv	= {
+		.var_predivs	= ahb1_predivs,
-			.index	= 3,
+		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),
-			.shift	= 6,
-			.width	= 2,
-		},
 	},
 
 	.common		= {

drivers/clk/sunxi-ng/ccu_mux.c

@@ -44,14 +44,18 @@ static u16 ccu_mux_get_prediv(struct ccu_common *common,
 				prediv = cm->fixed_predivs[i].div;
 	}
 
-	if (common->features & CCU_FEATURE_VARIABLE_PREDIV)
+	if (common->features & CCU_FEATURE_VARIABLE_PREDIV) {
-		if (parent_index == cm->variable_prediv.index) {
+		int i;
-			u8 div;
 
-			div = reg >> cm->variable_prediv.shift;
+		for (i = 0; i < cm->n_var_predivs; i++)
-			div &= (1 << cm->variable_prediv.width) - 1;
+			if (parent_index == cm->var_predivs[i].index) {
-			prediv = div + 1;
+				u8 div;
-		}
+
+				div = reg >> cm->var_predivs[i].shift;
+				div &= (1 << cm->var_predivs[i].width) - 1;
+				prediv = div + 1;
+			}
+	}
 
 	return prediv;
 }

drivers/clk/sunxi-ng/ccu_mux.h

@@ -10,6 +10,12 @@ struct ccu_mux_fixed_prediv {
 	u16	div;
 };
 
+struct ccu_mux_var_prediv {
+	u8	index;
+	u8	shift;
+	u8	width;
+};
+
 struct ccu_mux_internal {
 	u8		shift;
 	u8		width;
@@ -18,11 +24,8 @@ struct ccu_mux_internal {
 	const struct ccu_mux_fixed_prediv	*fixed_predivs;
 	u8		n_predivs;
 
-	struct {
+	const struct ccu_mux_var_prediv		*var_predivs;
-		u8	index;
+	u8		n_var_predivs;
-		u8	shift;
-		u8	width;
-	} variable_prediv;
 };
 
 #define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table)	\