Merge branches 'sh/dwarf-unwinder', 'sh/g3-prep' and 'sh/stable-updates'
This commit is contained in:
Коммит
13fd7aeb9a
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@ -243,16 +243,13 @@ struct dwarf_cie {
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unsigned long cie_pointer;
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struct list_head link;
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unsigned long flags;
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#define DWARF_CIE_Z_AUGMENTATION (1 << 0)
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/*
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* 'mod' will be non-NULL if this CIE came from a module's
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* .eh_frame section.
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*/
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struct module *mod;
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/* linked-list entry if this CIE is from a module */
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struct list_head link;
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struct rb_node node;
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};
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/**
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@ -266,13 +263,11 @@ struct dwarf_fde {
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unsigned long address_range;
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unsigned char *instructions;
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unsigned char *end;
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/* linked-list entry if this FDE is from a module */
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struct list_head link;
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/*
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* 'mod' will be non-NULL if this FDE came from a module's
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* .eh_frame section.
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*/
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struct module *mod;
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struct rb_node node;
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};
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/**
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@ -1,7 +1,22 @@
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#ifndef _ASM_SH_MODULE_H
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#define _ASM_SH_MODULE_H
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#include <asm-generic/module.h>
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struct mod_arch_specific {
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#ifdef CONFIG_DWARF_UNWINDER
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struct list_head fde_list;
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struct list_head cie_list;
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#endif
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};
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#ifdef CONFIG_64BIT
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#define Elf_Shdr Elf64_Shdr
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#define Elf_Sym Elf64_Sym
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#define Elf_Ehdr Elf64_Ehdr
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#else
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#define Elf_Shdr Elf32_Shdr
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#define Elf_Sym Elf32_Sym
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#define Elf_Ehdr Elf32_Ehdr
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#endif
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# ifdef CONFIG_CPU_SH2
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@ -132,7 +132,6 @@ ENTRY(tlb_protection_violation_store)
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mov #1, r5
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call_handle_tlbmiss:
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setup_frame_reg
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mov.l 1f, r0
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mov r5, r8
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mov.l @r0, r6
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@ -365,6 +364,8 @@ handle_exception:
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mov.l @k2, k2 ! read out vector and keep in k2
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handle_exception_special:
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setup_frame_reg
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! Setup return address and jump to exception handler
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mov.l 7f, r9 ! fetch return address
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stc r2_bank, r0 ! k2 (vector)
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@ -39,10 +39,10 @@ static mempool_t *dwarf_frame_pool;
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static struct kmem_cache *dwarf_reg_cachep;
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static mempool_t *dwarf_reg_pool;
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static LIST_HEAD(dwarf_cie_list);
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static struct rb_root cie_root;
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static DEFINE_SPINLOCK(dwarf_cie_lock);
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static LIST_HEAD(dwarf_fde_list);
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static struct rb_root fde_root;
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static DEFINE_SPINLOCK(dwarf_fde_lock);
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static struct dwarf_cie *cached_cie;
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@ -301,7 +301,8 @@ static inline int dwarf_entry_len(char *addr, unsigned long *len)
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*/
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static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
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{
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struct dwarf_cie *cie;
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struct rb_node **rb_node = &cie_root.rb_node;
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struct dwarf_cie *cie = NULL;
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unsigned long flags;
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spin_lock_irqsave(&dwarf_cie_lock, flags);
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@ -315,16 +316,24 @@ static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
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goto out;
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}
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list_for_each_entry(cie, &dwarf_cie_list, link) {
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if (cie->cie_pointer == cie_ptr) {
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cached_cie = cie;
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break;
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while (*rb_node) {
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struct dwarf_cie *cie_tmp;
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cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
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BUG_ON(!cie_tmp);
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if (cie_ptr == cie_tmp->cie_pointer) {
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cie = cie_tmp;
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cached_cie = cie_tmp;
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goto out;
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} else {
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if (cie_ptr < cie_tmp->cie_pointer)
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rb_node = &(*rb_node)->rb_left;
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else
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rb_node = &(*rb_node)->rb_right;
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}
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}
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/* Couldn't find the entry in the list. */
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if (&cie->link == &dwarf_cie_list)
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cie = NULL;
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out:
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spin_unlock_irqrestore(&dwarf_cie_lock, flags);
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return cie;
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@ -336,25 +345,34 @@ out:
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*/
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struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
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{
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struct dwarf_fde *fde;
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struct rb_node **rb_node = &fde_root.rb_node;
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struct dwarf_fde *fde = NULL;
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unsigned long flags;
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spin_lock_irqsave(&dwarf_fde_lock, flags);
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list_for_each_entry(fde, &dwarf_fde_list, link) {
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unsigned long start, end;
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while (*rb_node) {
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struct dwarf_fde *fde_tmp;
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unsigned long tmp_start, tmp_end;
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start = fde->initial_location;
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end = fde->initial_location + fde->address_range;
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fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
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BUG_ON(!fde_tmp);
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if (pc >= start && pc < end)
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break;
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tmp_start = fde_tmp->initial_location;
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tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
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if (pc < tmp_start) {
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rb_node = &(*rb_node)->rb_left;
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} else {
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if (pc < tmp_end) {
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fde = fde_tmp;
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goto out;
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} else
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rb_node = &(*rb_node)->rb_right;
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}
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}
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/* Couldn't find the entry in the list. */
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if (&fde->link == &dwarf_fde_list)
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fde = NULL;
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out:
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spin_unlock_irqrestore(&dwarf_fde_lock, flags);
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return fde;
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@ -540,6 +558,8 @@ void dwarf_free_frame(struct dwarf_frame *frame)
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mempool_free(frame, dwarf_frame_pool);
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}
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extern void ret_from_irq(void);
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/**
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* dwarf_unwind_stack - unwind the stack
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*
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@ -550,8 +570,8 @@ void dwarf_free_frame(struct dwarf_frame *frame)
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* on the callstack. Each of the lower (older) stack frames are
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* linked via the "prev" member.
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*/
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struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
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struct dwarf_frame *prev)
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struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
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struct dwarf_frame *prev)
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{
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struct dwarf_frame *frame;
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struct dwarf_cie *cie;
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@ -678,6 +698,24 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
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addr = frame->cfa + reg->addr;
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frame->return_addr = __raw_readl(addr);
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/*
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* Ah, the joys of unwinding through interrupts.
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*
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* Interrupts are tricky - the DWARF info needs to be _really_
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* accurate and unfortunately I'm seeing a lot of bogus DWARF
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* info. For example, I've seen interrupts occur in epilogues
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* just after the frame pointer (r14) had been restored. The
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* problem was that the DWARF info claimed that the CFA could be
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* reached by using the value of the frame pointer before it was
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* restored.
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*
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* So until the compiler can be trusted to produce reliable
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* DWARF info when it really matters, let's stop unwinding once
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* we've calculated the function that was interrupted.
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*/
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if (prev && prev->pc == (unsigned long)ret_from_irq)
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frame->return_addr = 0;
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return frame;
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bail:
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@ -688,6 +726,8 @@ bail:
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static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
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unsigned char *end, struct module *mod)
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{
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struct rb_node **rb_node = &cie_root.rb_node;
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struct rb_node *parent;
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struct dwarf_cie *cie;
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unsigned long flags;
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int count;
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@ -782,11 +822,30 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
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cie->initial_instructions = p;
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cie->instructions_end = end;
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cie->mod = mod;
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/* Add to list */
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spin_lock_irqsave(&dwarf_cie_lock, flags);
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list_add_tail(&cie->link, &dwarf_cie_list);
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while (*rb_node) {
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struct dwarf_cie *cie_tmp;
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cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
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parent = *rb_node;
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if (cie->cie_pointer < cie_tmp->cie_pointer)
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rb_node = &parent->rb_left;
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else if (cie->cie_pointer >= cie_tmp->cie_pointer)
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rb_node = &parent->rb_right;
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else
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WARN_ON(1);
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}
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rb_link_node(&cie->node, parent, rb_node);
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rb_insert_color(&cie->node, &cie_root);
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if (mod != NULL)
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list_add_tail(&cie->link, &mod->arch.cie_list);
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spin_unlock_irqrestore(&dwarf_cie_lock, flags);
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return 0;
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@ -796,6 +855,8 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
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void *start, unsigned long len,
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unsigned char *end, struct module *mod)
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{
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struct rb_node **rb_node = &fde_root.rb_node;
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struct rb_node *parent;
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struct dwarf_fde *fde;
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struct dwarf_cie *cie;
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unsigned long flags;
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@ -843,11 +904,38 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
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fde->instructions = p;
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fde->end = end;
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fde->mod = mod;
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/* Add to list. */
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spin_lock_irqsave(&dwarf_fde_lock, flags);
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list_add_tail(&fde->link, &dwarf_fde_list);
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while (*rb_node) {
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struct dwarf_fde *fde_tmp;
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unsigned long tmp_start, tmp_end;
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unsigned long start, end;
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fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
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start = fde->initial_location;
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end = fde->initial_location + fde->address_range;
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tmp_start = fde_tmp->initial_location;
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tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
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parent = *rb_node;
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if (start < tmp_start)
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rb_node = &parent->rb_left;
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else if (start >= tmp_end)
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rb_node = &parent->rb_right;
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else
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WARN_ON(1);
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}
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rb_link_node(&fde->node, parent, rb_node);
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rb_insert_color(&fde->node, &fde_root);
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if (mod != NULL)
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list_add_tail(&fde->link, &mod->arch.fde_list);
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spin_unlock_irqrestore(&dwarf_fde_lock, flags);
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return 0;
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|
@ -892,19 +980,29 @@ static struct unwinder dwarf_unwinder = {
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static void dwarf_unwinder_cleanup(void)
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{
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struct dwarf_cie *cie, *cie_tmp;
|
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struct dwarf_fde *fde, *fde_tmp;
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struct rb_node **fde_rb_node = &fde_root.rb_node;
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struct rb_node **cie_rb_node = &cie_root.rb_node;
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|
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/*
|
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* Deallocate all the memory allocated for the DWARF unwinder.
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* Traverse all the FDE/CIE lists and remove and free all the
|
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* memory associated with those data structures.
|
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*/
|
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list_for_each_entry_safe(cie, cie_tmp, &dwarf_cie_list, link)
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kfree(cie);
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while (*fde_rb_node) {
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struct dwarf_fde *fde;
|
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|
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list_for_each_entry_safe(fde, fde_tmp, &dwarf_fde_list, link)
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fde = rb_entry(*fde_rb_node, struct dwarf_fde, node);
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rb_erase(*fde_rb_node, &fde_root);
|
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kfree(fde);
|
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}
|
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|
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while (*cie_rb_node) {
|
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struct dwarf_cie *cie;
|
||||
|
||||
cie = rb_entry(*cie_rb_node, struct dwarf_cie, node);
|
||||
rb_erase(*cie_rb_node, &cie_root);
|
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kfree(cie);
|
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}
|
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|
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kmem_cache_destroy(dwarf_reg_cachep);
|
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kmem_cache_destroy(dwarf_frame_cachep);
|
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|
@ -1004,6 +1102,8 @@ int module_dwarf_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
|
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|
||||
/* Did we find the .eh_frame section? */
|
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if (i != hdr->e_shnum) {
|
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INIT_LIST_HEAD(&me->arch.cie_list);
|
||||
INIT_LIST_HEAD(&me->arch.fde_list);
|
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err = dwarf_parse_section((char *)start, (char *)end, me);
|
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if (err) {
|
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printk(KERN_WARNING "%s: failed to parse DWARF info\n",
|
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|
@ -1024,38 +1124,26 @@ int module_dwarf_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
|
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*/
|
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void module_dwarf_cleanup(struct module *mod)
|
||||
{
|
||||
struct dwarf_fde *fde;
|
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struct dwarf_cie *cie;
|
||||
struct dwarf_fde *fde, *ftmp;
|
||||
struct dwarf_cie *cie, *ctmp;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&dwarf_cie_lock, flags);
|
||||
|
||||
again_cie:
|
||||
list_for_each_entry(cie, &dwarf_cie_list, link) {
|
||||
if (cie->mod == mod)
|
||||
break;
|
||||
}
|
||||
|
||||
if (&cie->link != &dwarf_cie_list) {
|
||||
list_for_each_entry_safe(cie, ctmp, &mod->arch.cie_list, link) {
|
||||
list_del(&cie->link);
|
||||
rb_erase(&cie->node, &cie_root);
|
||||
kfree(cie);
|
||||
goto again_cie;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&dwarf_cie_lock, flags);
|
||||
|
||||
spin_lock_irqsave(&dwarf_fde_lock, flags);
|
||||
|
||||
again_fde:
|
||||
list_for_each_entry(fde, &dwarf_fde_list, link) {
|
||||
if (fde->mod == mod)
|
||||
break;
|
||||
}
|
||||
|
||||
if (&fde->link != &dwarf_fde_list) {
|
||||
list_for_each_entry_safe(fde, ftmp, &mod->arch.fde_list, link) {
|
||||
list_del(&fde->link);
|
||||
rb_erase(&fde->node, &fde_root);
|
||||
kfree(fde);
|
||||
goto again_fde;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&dwarf_fde_lock, flags);
|
||||
|
@ -1074,8 +1162,6 @@ again_fde:
|
|||
static int __init dwarf_unwinder_init(void)
|
||||
{
|
||||
int err;
|
||||
INIT_LIST_HEAD(&dwarf_cie_list);
|
||||
INIT_LIST_HEAD(&dwarf_fde_list);
|
||||
|
||||
dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
|
||||
sizeof(struct dwarf_frame), 0,
|
||||
|
|
|
@ -70,8 +70,14 @@ ret_from_exception:
|
|||
CFI_STARTPROC simple
|
||||
CFI_DEF_CFA r14, 0
|
||||
CFI_REL_OFFSET 17, 64
|
||||
CFI_REL_OFFSET 15, 0
|
||||
CFI_REL_OFFSET 15, 60
|
||||
CFI_REL_OFFSET 14, 56
|
||||
CFI_REL_OFFSET 13, 52
|
||||
CFI_REL_OFFSET 12, 48
|
||||
CFI_REL_OFFSET 11, 44
|
||||
CFI_REL_OFFSET 10, 40
|
||||
CFI_REL_OFFSET 9, 36
|
||||
CFI_REL_OFFSET 8, 32
|
||||
preempt_stop()
|
||||
ENTRY(ret_from_irq)
|
||||
!
|
||||
|
|
|
@ -518,34 +518,6 @@ static inline int sci_rxd_in(struct uart_port *port)
|
|||
{
|
||||
if (port->mapbase == 0xfffffe80)
|
||||
return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */
|
||||
if (port->mapbase == 0xa4000150)
|
||||
return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xa4000140)
|
||||
return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == SCIF0)
|
||||
return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
|
||||
if (port->mapbase == SCIF2)
|
||||
return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7721)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xa4430000)
|
||||
return sci_in(port, SCxSR) & 0x0003 ? 1 : 0;
|
||||
else if (port->mapbase == 0xa4438000)
|
||||
return sci_in(port, SCxSR) & 0x0003 ? 1 : 0;
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
|
||||
|
@ -558,207 +530,17 @@ static inline int sci_rxd_in(struct uart_port *port)
|
|||
{
|
||||
if (port->mapbase == 0xffe00000)
|
||||
return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */
|
||||
if (port->mapbase == 0xffe80000)
|
||||
return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffe80000)
|
||||
return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xfe4b0000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0;
|
||||
if (port->mapbase == 0xfe4c0000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0;
|
||||
if (port->mapbase == 0xfe4d0000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xfe600000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfe610000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfe620000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffe00000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffe10000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffe20000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffe30000)
|
||||
return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffe00000)
|
||||
return __raw_readb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffe00000)
|
||||
return __raw_readb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
|
||||
if (port->mapbase == 0xffe10000)
|
||||
return __raw_readb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
|
||||
if (port->mapbase == 0xffe20000)
|
||||
return __raw_readb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
|
||||
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffe00000)
|
||||
return __raw_readb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */
|
||||
if (port->mapbase == 0xffe10000)
|
||||
return __raw_readb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */
|
||||
if (port->mapbase == 0xffe20000)
|
||||
return __raw_readb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */
|
||||
if (port->mapbase == 0xa4e30000)
|
||||
return __raw_readb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */
|
||||
if (port->mapbase == 0xa4e40000)
|
||||
return __raw_readb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */
|
||||
if (port->mapbase == 0xa4e50000)
|
||||
return __raw_readb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
|
||||
# define SCFSR 0x0010
|
||||
# define SCASSR 0x0014
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->type == PORT_SCIF)
|
||||
return __raw_readw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0;
|
||||
if (port->type == PORT_SCIFA)
|
||||
return __raw_readw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0;
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
return sci_in(port, SCSPTR)&0x0001 ? 1 : 0; /* SCIF */
|
||||
}
|
||||
#elif defined(__H8300H__) || defined(__H8300S__)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
int ch = (port->mapbase - SMR0) >> 3;
|
||||
return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
|
||||
#else /* default case for non-SCI processors */
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffe00000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffe08000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffe10000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */
|
||||
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xff923000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xff924000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xff925000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffe00000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffe10000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7786)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffea0000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffeb0000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffec0000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffed0000)
|
||||
return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffee0000)
|
||||
return __raw_readw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffef0000)
|
||||
return __raw_readw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7203) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7206) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7263)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xfffe8000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffe8800)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffe9000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffe9800)
|
||||
return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7201)
|
||||
if (port->mapbase == 0xfffeA000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffeA800)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffeB000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xfffeB800)
|
||||
return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
#endif
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xf8400000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xf8410000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xf8420000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SHX3)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffc30000)
|
||||
return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffc40000)
|
||||
return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffc50000)
|
||||
return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffc60000)
|
||||
return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
|
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