x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86'
Several fields in struct cpuinfo_x86 were not defined for the !SMP case, likely to save space. However, those fields still have some meaning for UP, and keeping them allows some #ifdef removal from other files. The additional size of the UP kernel from this change is not significant enough to worry about keeping up the distinction: text data bss dec hex filename 4737168 506459 972040 6215667 5ed7f3 vmlinux.o.before 4737444 506459 972040 6215943 5ed907 vmlinux.o.after for a difference of 276 bytes for an example UP config. If someone wants those 276 bytes back badly then it should be implemented in a cleaner way. Signed-off-by: Kevin Winchester <kjwinchester@gmail.com> Cc: Steffen Persvold <sp@numascale.com> Link: http://lkml.kernel.org/r/1324428742-12498-1-git-send-email-kjwinchester@gmail.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -99,7 +99,6 @@ struct cpuinfo_x86 {
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u16 apicid;
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u16 initial_apicid;
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u16 x86_clflush_size;
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#ifdef CONFIG_SMP
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/* number of cores as seen by the OS: */
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u16 booted_cores;
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/* Physical processor id: */
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@ -110,7 +109,6 @@ struct cpuinfo_x86 {
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u8 compute_unit_id;
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/* Index into per_cpu list: */
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u16 cpu_index;
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#endif
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u32 microcode;
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} __attribute__((__aligned__(SMP_CACHE_BYTES)));
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@ -123,16 +123,14 @@ int amd_get_subcaches(int cpu)
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{
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struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
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unsigned int mask;
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int cuid = 0;
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int cuid;
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if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
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return 0;
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pci_read_config_dword(link, 0x1d4, &mask);
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#ifdef CONFIG_SMP
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cuid = cpu_data(cpu).compute_unit_id;
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#endif
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return (mask >> (4 * cuid)) & 0xf;
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}
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@ -141,7 +139,7 @@ int amd_set_subcaches(int cpu, int mask)
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static unsigned int reset, ban;
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struct amd_northbridge *nb = node_to_amd_nb(amd_get_nb_id(cpu));
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unsigned int reg;
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int cuid = 0;
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int cuid;
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if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING) || mask > 0xf)
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return -EINVAL;
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@ -159,9 +157,7 @@ int amd_set_subcaches(int cpu, int mask)
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pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000);
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}
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#ifdef CONFIG_SMP
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cuid = cpu_data(cpu).compute_unit_id;
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#endif
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mask <<= 4 * cuid;
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mask |= (0xf ^ (1 << cuid)) << 26;
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@ -148,7 +148,6 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
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static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_SMP
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/* calling is from identify_secondary_cpu() ? */
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if (!c->cpu_index)
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return;
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@ -192,7 +191,6 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
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valid_k7:
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;
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#endif
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}
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static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
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@ -676,9 +676,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
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if (this_cpu->c_early_init)
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this_cpu->c_early_init(c);
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#ifdef CONFIG_SMP
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c->cpu_index = 0;
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#endif
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filter_cpuid_features(c, false);
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setup_smep(c);
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@ -764,10 +762,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
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c->apicid = c->initial_apicid;
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# endif
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#endif
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#ifdef CONFIG_X86_HT
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c->phys_proc_id = c->initial_apicid;
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#endif
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}
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setup_smep(c);
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@ -1146,9 +1141,7 @@ static void dbg_restore_debug_regs(void)
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*/
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void __cpuinit x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node)
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{
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#ifdef CONFIG_NUMA
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pr_err("NUMA core number %d differs from configured core number %d\n", node, c->phys_proc_id);
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#endif
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}
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/*
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@ -181,7 +181,6 @@ static void __cpuinit trap_init_f00f_bug(void)
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static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_SMP
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/* calling is from identify_secondary_cpu() ? */
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if (!c->cpu_index)
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return;
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@ -198,7 +197,6 @@ static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
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WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
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"with B stepping processors.\n");
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}
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#endif
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}
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static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
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@ -119,9 +119,7 @@ void mce_setup(struct mce *m)
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m->time = get_seconds();
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m->cpuvendor = boot_cpu_data.x86_vendor;
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m->cpuid = cpuid_eax(1);
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#ifdef CONFIG_SMP
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m->socketid = cpu_data(m->extcpu).phys_proc_id;
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#endif
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m->apicid = cpu_data(m->extcpu).initial_apicid;
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rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap);
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}
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@ -64,11 +64,9 @@ struct threshold_bank {
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};
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static DEFINE_PER_CPU(struct threshold_bank * [NR_BANKS], threshold_banks);
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#ifdef CONFIG_SMP
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static unsigned char shared_bank[NR_BANKS] = {
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0, 0, 0, 0, 1
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};
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#endif
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static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
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@ -202,10 +200,9 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
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if (!block)
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per_cpu(bank_map, cpu) |= (1 << bank);
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#ifdef CONFIG_SMP
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if (shared_bank[bank] && c->cpu_core_id)
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break;
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#endif
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offset = setup_APIC_mce(offset,
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(high & MASK_LVTOFF_HI) >> 20);
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@ -531,7 +528,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
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sprintf(name, "threshold_bank%i", bank);
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#ifdef CONFIG_SMP
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if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
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i = cpumask_first(cpu_llc_shared_mask(cpu));
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@ -558,7 +554,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
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goto out;
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}
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#endif
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b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
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if (!b) {
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@ -64,12 +64,10 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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struct cpuinfo_x86 *c = v;
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unsigned int cpu = 0;
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unsigned int cpu;
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int i;
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#ifdef CONFIG_SMP
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cpu = c->cpu_index;
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#endif
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seq_printf(m, "processor\t: %u\n"
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"vendor_id\t: %s\n"
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"cpu family\t: %d\n"
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@ -1609,11 +1609,9 @@ static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val,
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mce->cpuvendor, mce->cpuid, mce->time,
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mce->socketid, mce->apicid);
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#ifdef CONFIG_SMP
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/* Only handle if it is the right mc controller */
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if (cpu_data(mce->cpu).phys_proc_id != pvt->sbridge_dev->mc)
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return NOTIFY_DONE;
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#endif
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smp_rmb();
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if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) {
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@ -57,16 +57,15 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
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#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
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#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
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#ifdef CONFIG_SMP
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#define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
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#define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
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#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
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#ifdef CONFIG_SMP
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#define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
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#else
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#define TO_PHYS_ID(cpu) (cpu)
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#define TO_CORE_ID(cpu) (cpu)
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#define for_each_sibling(i, cpu) for (i = 0; false; )
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#endif
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#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
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/*
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* Per-Core Temperature Data
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