Some Atmel framebuffer driver enhancements with modification
of configuration data in ARM/AT91 and AVR32/AP7 trees. A merge of these modifications seems easier through arm-soc git tree nowadays. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJRQvOVAAoJEAf03oE53VmQCT0IAItl95etDFP0rmSq9QQYqeEn mllGVB7+REAGPd7hSoS4vgaw9izDaS/OXGmFavEaHskM3/JojcHktAU4gyWbCGE3 CtK6yqfxc9LyyZ8hMc+ID+zFp0UvydmBhUvp6PBM/uAGvK2H3tCMFjepd0rv6ozz oUnQnbmEg/LzLQmyiRFMxi2lOXXUgjq+7Xtvn/Nq/HN2AraiB+0dcqt+6pLALKdQ UPLX6uPPajsMFTIqw2UgsBk4VvbLMqlWI2qQn1NRAoTrviZKVhKXmmmlK5HC7TcO VE+U/PX3bPlURtsLYiEXU6/vb7oOG8dFAwGvulv2/Nfy0AcgCXl1brgrUGzfXJg= =6RC1 -----END PGP SIGNATURE----- Merge tag 'at91-driversLCD' of git://github.com/at91linux/linux-at91 into next/drivers From Nicolas Ferre <nicolas.ferre@atmel.com>: Some Atmel framebuffer driver enhancements with modification of configuration data in ARM/AT91 and AVR32/AP7 trees. A merge of these modifications seems easier through arm-soc git tree nowadays. * tag 'at91-driversLCD' of git://github.com/at91linux/linux-at91: ARM: at91/avr32/atmel_lcdfb: add platform device-id table atmel_lcdfb: move lcdcon2 register access to compute_hozval ARM: at91/avr32/atmel_lcdfb: add bus-clock entry ARM: at91: fix LCD-wiring mode atmel_lcdfb: fix 16-bpp modes on older SOCs Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Коммит
1414fbdcb2
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@ -169,6 +169,8 @@ static struct clk *periph_clocks[] __initdata = {
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};
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static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("hclk", "at91sam9261-lcdfb.0", &hck1),
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CLKDEV_CON_DEV_ID("hclk", "at91sam9g10-lcdfb.0", &hck1),
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
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CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
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@ -488,7 +488,6 @@ static struct resource lcdc_resources[] = {
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};
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static struct platform_device at91_lcdc_device = {
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.name = "atmel_lcdfb",
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.id = 0,
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.dev = {
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.dma_mask = &lcdc_dmamask,
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@ -505,6 +504,11 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
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return;
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}
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if (cpu_is_at91sam9g10())
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at91_lcdc_device.name = "at91sam9g10-lcdfb";
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else
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at91_lcdc_device.name = "at91sam9261-lcdfb";
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#if defined(CONFIG_FB_ATMEL_STN)
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at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */
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at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
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@ -190,6 +190,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
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CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
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CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
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CLKDEV_CON_DEV_ID("hclk", "at91sam9263-lcdfb.0", &lcdc_clk),
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CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
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CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
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@ -848,7 +848,7 @@ static struct resource lcdc_resources[] = {
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};
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static struct platform_device at91_lcdc_device = {
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.name = "atmel_lcdfb",
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.name = "at91sam9263-lcdfb",
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.id = 0,
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.dev = {
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.dma_mask = &lcdc_dmamask,
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@ -228,6 +228,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_ID("hclk", &macb_clk),
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/* One additional fake clock for ohci */
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CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
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CLKDEV_CON_DEV_ID("hclk", "at91sam9g45-lcdfb.0", &lcdc_clk),
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CLKDEV_CON_DEV_ID("hclk", "at91sam9g45es-lcdfb.0", &lcdc_clk),
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CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
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CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
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CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
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@ -981,7 +981,6 @@ static struct resource lcdc_resources[] = {
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};
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static struct platform_device at91_lcdc_device = {
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.name = "atmel_lcdfb",
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.id = 0,
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.dev = {
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.dma_mask = &lcdc_dmamask,
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@ -997,6 +996,11 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
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if (!data)
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return;
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if (cpu_is_at91sam9g45es())
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at91_lcdc_device.name = "at91sam9g45es-lcdfb";
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else
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at91_lcdc_device.name = "at91sam9g45-lcdfb";
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at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
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at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
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@ -179,6 +179,7 @@ static struct clk *periph_clocks[] __initdata = {
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};
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static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("hclk", "at91sam9rl-lcdfb.0", &lcdc_clk),
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CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
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CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
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CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
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@ -514,7 +514,7 @@ static struct resource lcdc_resources[] = {
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};
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static struct platform_device at91_lcdc_device = {
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.name = "atmel_lcdfb",
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.name = "at91sam9rl-lcdfb",
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.id = 0,
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.dev = {
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.dma_mask = &lcdc_dmamask,
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@ -1453,7 +1453,7 @@ static struct resource atmel_lcdfb0_resource[] = {
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},
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};
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DEFINE_DEV_DATA(atmel_lcdfb, 0);
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DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
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DEV_CLK(hclk, atmel_lcdfb0, hsb, 7);
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static struct clk atmel_lcdfb0_pixclk = {
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.name = "lcdc_clk",
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.dev = &atmel_lcdfb0_device.dev,
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@ -1530,6 +1530,8 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
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memcpy(info, data, sizeof(struct atmel_lcdfb_info));
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info->default_monspecs = monspecs;
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pdev->name = "at32ap-lcdfb";
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platform_device_register(pdev);
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return pdev;
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@ -2246,7 +2248,7 @@ static __initdata struct clk *init_clocks[] = {
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&atmel_twi0_pclk,
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&atmel_mci0_pclk,
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#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
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&atmel_lcdfb0_hck1,
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&atmel_lcdfb0_hclk,
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&atmel_lcdfb0_pixclk,
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#endif
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&ssc0_pclk,
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@ -34,6 +34,77 @@
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#define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
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#define ATMEL_LCDC_FIFO_SIZE 512 /* words */
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struct atmel_lcdfb_config {
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bool have_alt_pixclock;
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bool have_hozval;
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bool have_intensity_bit;
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};
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static struct atmel_lcdfb_config at91sam9261_config = {
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.have_hozval = true,
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.have_intensity_bit = true,
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};
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static struct atmel_lcdfb_config at91sam9263_config = {
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.have_intensity_bit = true,
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};
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static struct atmel_lcdfb_config at91sam9g10_config = {
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.have_hozval = true,
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};
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static struct atmel_lcdfb_config at91sam9g45_config = {
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.have_alt_pixclock = true,
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};
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static struct atmel_lcdfb_config at91sam9g45es_config = {
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};
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static struct atmel_lcdfb_config at91sam9rl_config = {
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.have_intensity_bit = true,
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};
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static struct atmel_lcdfb_config at32ap_config = {
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.have_hozval = true,
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};
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static const struct platform_device_id atmel_lcdfb_devtypes[] = {
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{
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.name = "at91sam9261-lcdfb",
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.driver_data = (unsigned long)&at91sam9261_config,
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}, {
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.name = "at91sam9263-lcdfb",
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.driver_data = (unsigned long)&at91sam9263_config,
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}, {
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.name = "at91sam9g10-lcdfb",
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.driver_data = (unsigned long)&at91sam9g10_config,
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}, {
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.name = "at91sam9g45-lcdfb",
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.driver_data = (unsigned long)&at91sam9g45_config,
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}, {
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.name = "at91sam9g45es-lcdfb",
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.driver_data = (unsigned long)&at91sam9g45es_config,
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}, {
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.name = "at91sam9rl-lcdfb",
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.driver_data = (unsigned long)&at91sam9rl_config,
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}, {
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.name = "at32ap-lcdfb",
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.driver_data = (unsigned long)&at32ap_config,
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}, {
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/* terminator */
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}
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};
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static struct atmel_lcdfb_config *
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atmel_lcdfb_get_config(struct platform_device *pdev)
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{
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unsigned long data;
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data = platform_get_device_id(pdev)->driver_data;
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return (struct atmel_lcdfb_config *)data;
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}
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#if defined(CONFIG_ARCH_AT91)
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#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
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| FBINFO_PARTIAL_PAN_OK \
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@ -193,14 +264,16 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
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.accel = FB_ACCEL_NONE,
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};
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static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
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static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
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unsigned long xres)
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{
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unsigned long lcdcon2;
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unsigned long value;
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if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
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|| cpu_is_at32ap7000()))
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if (!sinfo->config->have_hozval)
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return xres;
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lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
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value = xres;
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if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
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/* STN display */
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@ -422,17 +495,22 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
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= var->bits_per_pixel;
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break;
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case 16:
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/* Older SOCs use IBGR:555 rather than BGR:565. */
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if (sinfo->config->have_intensity_bit)
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var->green.length = 5;
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else
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var->green.length = 6;
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if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
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/* RGB:565 mode */
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var->red.offset = 11;
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/* RGB:5X5 mode */
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var->red.offset = var->green.length + 5;
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var->blue.offset = 0;
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} else {
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/* BGR:565 mode */
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/* BGR:5X5 mode */
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var->red.offset = 0;
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var->blue.offset = 11;
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var->blue.offset = var->green.length + 5;
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}
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var->green.offset = 5;
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var->green.length = 6;
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var->red.length = var->blue.length = 5;
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break;
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case 32:
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@ -526,7 +604,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
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/* Now, the LCDC core... */
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/* Set pixel clock */
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if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
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if (sinfo->config->have_alt_pixclock)
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pix_factor = 1;
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clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
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@ -586,8 +664,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
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lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
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/* Horizontal value (aka line size) */
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hozval_linesz = compute_hozval(info->var.xres,
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lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
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hozval_linesz = compute_hozval(sinfo, info->var.xres);
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/* Display size */
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value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
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@ -679,8 +756,7 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
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case FB_VISUAL_PSEUDOCOLOR:
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if (regno < 256) {
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if (cpu_is_at91sam9261() || cpu_is_at91sam9263()
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|| cpu_is_at91sam9rl()) {
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if (sinfo->config->have_intensity_bit) {
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/* old style I+BGR:555 */
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val = ((red >> 11) & 0x001f);
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val |= ((green >> 6) & 0x03e0);
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@ -817,15 +893,13 @@ static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
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static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
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{
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if (sinfo->bus_clk)
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clk_enable(sinfo->bus_clk);
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clk_enable(sinfo->bus_clk);
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clk_enable(sinfo->lcdc_clk);
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}
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static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
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{
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if (sinfo->bus_clk)
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clk_disable(sinfo->bus_clk);
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clk_disable(sinfo->bus_clk);
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clk_disable(sinfo->lcdc_clk);
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}
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@ -870,6 +944,9 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
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}
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sinfo->info = info;
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sinfo->pdev = pdev;
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sinfo->config = atmel_lcdfb_get_config(pdev);
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if (!sinfo->config)
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goto free_info;
|
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|
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strcpy(info->fix.id, sinfo->pdev->name);
|
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info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
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@ -880,13 +957,10 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
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info->fix = atmel_lcdfb_fix;
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/* Enable LCDC Clocks */
|
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if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
|
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|| cpu_is_at32ap7000()) {
|
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sinfo->bus_clk = clk_get(dev, "hck1");
|
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if (IS_ERR(sinfo->bus_clk)) {
|
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ret = PTR_ERR(sinfo->bus_clk);
|
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goto free_info;
|
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}
|
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sinfo->bus_clk = clk_get(dev, "hclk");
|
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if (IS_ERR(sinfo->bus_clk)) {
|
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ret = PTR_ERR(sinfo->bus_clk);
|
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goto free_info;
|
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}
|
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sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
|
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if (IS_ERR(sinfo->lcdc_clk)) {
|
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|
@ -1047,8 +1121,7 @@ stop_clk:
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atmel_lcdfb_stop_clock(sinfo);
|
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clk_put(sinfo->lcdc_clk);
|
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put_bus_clk:
|
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if (sinfo->bus_clk)
|
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clk_put(sinfo->bus_clk);
|
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clk_put(sinfo->bus_clk);
|
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free_info:
|
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framebuffer_release(info);
|
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out:
|
||||
|
@ -1073,8 +1146,7 @@ static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
|
|||
unregister_framebuffer(info);
|
||||
atmel_lcdfb_stop_clock(sinfo);
|
||||
clk_put(sinfo->lcdc_clk);
|
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if (sinfo->bus_clk)
|
||||
clk_put(sinfo->bus_clk);
|
||||
clk_put(sinfo->bus_clk);
|
||||
fb_dealloc_cmap(&info->cmap);
|
||||
free_irq(sinfo->irq_base, info);
|
||||
iounmap(sinfo->mmio);
|
||||
|
@ -1143,7 +1215,7 @@ static struct platform_driver atmel_lcdfb_driver = {
|
|||
.remove = __exit_p(atmel_lcdfb_remove),
|
||||
.suspend = atmel_lcdfb_suspend,
|
||||
.resume = atmel_lcdfb_resume,
|
||||
|
||||
.id_table = atmel_lcdfb_devtypes,
|
||||
.driver = {
|
||||
.name = "atmel_lcdfb",
|
||||
.owner = THIS_MODULE,
|
||||
|
|
|
@ -30,8 +30,8 @@
|
|||
*/
|
||||
#define ATMEL_LCDC_WIRING_BGR 0
|
||||
#define ATMEL_LCDC_WIRING_RGB 1
|
||||
#define ATMEL_LCDC_WIRING_RGB555 2
|
||||
|
||||
struct atmel_lcdfb_config;
|
||||
|
||||
/* LCD Controller info data structure, stored in device platform_data */
|
||||
struct atmel_lcdfb_info {
|
||||
|
@ -62,6 +62,8 @@ struct atmel_lcdfb_info {
|
|||
void (*atmel_lcdfb_power_control)(int on);
|
||||
struct fb_monspecs *default_monspecs;
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u32 pseudo_palette[16];
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struct atmel_lcdfb_config *config;
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||||
};
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||||
#define ATMEL_LCDC_DMABADDR1 0x00
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