KVM: arm64: Restore mdcr_el2 from vcpu
On deactivating traps, restore the value of mdcr_el2 from the newly created and preserved host value vcpu context, rather than directly reading the hardware register. Up until and including this patch the two values are the same, i.e., the hardware register and the vcpu one. A future patch will be changing the value of mdcr_el2 on activating traps, and this ensures that its value will be restored. No functional change intended. Signed-off-by: Fuad Tabba <tabba@google.com> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210817081134.2918285-7-tabba@google.com
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@ -287,10 +287,13 @@ struct kvm_vcpu_arch {
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/* Stage 2 paging state used by the hardware on next switch */
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struct kvm_s2_mmu *hw_mmu;
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/* HYP configuration */
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/* Values of trap registers for the guest. */
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u64 hcr_el2;
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u64 mdcr_el2;
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/* Values of trap registers for the host before guest entry. */
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u64 mdcr_el2_host;
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/* Exception Information */
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struct kvm_vcpu_fault_info fault;
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@ -95,7 +95,7 @@ void __sve_restore_state(void *sve_pffr, u32 *fpsr);
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#ifndef __KVM_NVHE_HYPERVISOR__
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void activate_traps_vhe_load(struct kvm_vcpu *vcpu);
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void deactivate_traps_vhe_put(void);
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void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu);
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#endif
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u64 __guest_enter(struct kvm_vcpu *vcpu);
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@ -92,11 +92,15 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu)
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write_sysreg(0, pmselr_el0);
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write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0);
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}
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vcpu->arch.mdcr_el2_host = read_sysreg(mdcr_el2);
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write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2);
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}
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static inline void __deactivate_traps_common(void)
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static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu)
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{
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write_sysreg(vcpu->arch.mdcr_el2_host, mdcr_el2);
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write_sysreg(0, hstr_el2);
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if (kvm_arm_support_pmu_v3())
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write_sysreg(0, pmuserenr_el0);
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@ -69,12 +69,10 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
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static void __deactivate_traps(struct kvm_vcpu *vcpu)
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{
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extern char __kvm_hyp_host_vector[];
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u64 mdcr_el2, cptr;
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u64 cptr;
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___deactivate_traps(vcpu);
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mdcr_el2 = read_sysreg(mdcr_el2);
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if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) {
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u64 val;
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@ -92,13 +90,12 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
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isb();
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}
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__deactivate_traps_common();
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vcpu->arch.mdcr_el2_host &= MDCR_EL2_HPMN_MASK |
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MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT |
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MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT;
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mdcr_el2 &= MDCR_EL2_HPMN_MASK;
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mdcr_el2 |= MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT;
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mdcr_el2 |= MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT;
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__deactivate_traps_common(vcpu);
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write_sysreg(mdcr_el2, mdcr_el2);
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write_sysreg(this_cpu_ptr(&kvm_init_params)->hcr_el2, hcr_el2);
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cptr = CPTR_EL2_DEFAULT;
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@ -91,17 +91,13 @@ void activate_traps_vhe_load(struct kvm_vcpu *vcpu)
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__activate_traps_common(vcpu);
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}
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void deactivate_traps_vhe_put(void)
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void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu)
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{
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u64 mdcr_el2 = read_sysreg(mdcr_el2);
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vcpu->arch.mdcr_el2_host &= MDCR_EL2_HPMN_MASK |
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MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT |
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MDCR_EL2_TPMS;
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mdcr_el2 &= MDCR_EL2_HPMN_MASK |
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MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT |
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MDCR_EL2_TPMS;
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write_sysreg(mdcr_el2, mdcr_el2);
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__deactivate_traps_common();
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__deactivate_traps_common(vcpu);
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}
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/* Switch to the guest for VHE systems running in EL2 */
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@ -101,7 +101,7 @@ void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu)
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struct kvm_cpu_context *host_ctxt;
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host_ctxt = &this_cpu_ptr(&kvm_host_data)->host_ctxt;
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deactivate_traps_vhe_put();
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deactivate_traps_vhe_put(vcpu);
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__sysreg_save_el1_state(guest_ctxt);
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__sysreg_save_user_state(guest_ctxt);
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