x86, MCA: Finish mca_config conversion
mce_ser, mce_bios_cmci_threshold and mce_disabled are the last three bools which need conversion. Move them to the mca_config struct and adjust usage sites accordingly. Signed-off-by: Borislav Petkov <bp@alien8.de> Acked-by: Tony Luck <tony.luck@intel.com>
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Коммит
1462594bf2
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@ -124,6 +124,9 @@ struct mca_config {
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bool dont_log_ce;
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bool cmci_disabled;
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bool ignore_ce;
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bool disabled;
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bool ser;
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bool bios_cmci_threshold;
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u8 banks;
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s8 bootlog;
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int tolerant;
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@ -140,7 +143,6 @@ extern void mce_unregister_decode_chain(struct notifier_block *nb);
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#include <linux/init.h>
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#include <linux/atomic.h>
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extern int mce_disabled;
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extern int mce_p5_enabled;
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#ifdef CONFIG_X86_MCE
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@ -173,7 +175,6 @@ DECLARE_PER_CPU(struct device *, mce_device);
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#define MAX_NR_BANKS 32
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#ifdef CONFIG_X86_MCE_INTEL
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extern int mce_bios_cmci_threshold;
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void mce_intel_feature_init(struct cpuinfo_x86 *c);
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void cmci_clear(void);
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void cmci_reenable(void);
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@ -24,8 +24,6 @@ struct mce_bank {
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int mce_severity(struct mce *a, int tolerant, char **msg);
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struct dentry *mce_get_debugfs_dir(void);
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extern int mce_ser;
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extern struct mce_bank *mce_banks;
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#ifdef CONFIG_X86_MCE_INTEL
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@ -193,9 +193,9 @@ int mce_severity(struct mce *m, int tolerant, char **msg)
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continue;
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if ((m->mcgstatus & s->mcgmask) != s->mcgres)
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continue;
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if (s->ser == SER_REQUIRED && !mce_ser)
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if (s->ser == SER_REQUIRED && !mca_cfg.ser)
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continue;
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if (s->ser == NO_SER && mce_ser)
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if (s->ser == NO_SER && mca_cfg.ser)
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continue;
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if (s->context && ctx != s->context)
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continue;
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@ -58,18 +58,13 @@ static DEFINE_MUTEX(mce_chrdev_read_mutex);
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#define CREATE_TRACE_POINTS
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#include <trace/events/mce.h>
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int mce_disabled __read_mostly;
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#define SPINUNIT 100 /* 100ns */
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atomic_t mce_entry;
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DEFINE_PER_CPU(unsigned, mce_exception_count);
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int mce_ser __read_mostly;
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int mce_bios_cmci_threshold __read_mostly;
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struct mce_bank *mce_banks __read_mostly;
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struct mce_bank *mce_banks __read_mostly;
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struct mca_config mca_cfg __read_mostly = {
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.bootlog = -1,
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@ -510,7 +505,7 @@ static int mce_ring_add(unsigned long pfn)
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int mce_available(struct cpuinfo_x86 *c)
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{
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if (mce_disabled)
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if (mca_cfg.disabled)
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return 0;
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return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
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}
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@ -562,7 +557,7 @@ static void mce_read_aux(struct mce *m, int i)
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/*
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* Mask the reported address by the reported granularity.
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*/
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if (mce_ser && (m->status & MCI_STATUS_MISCV)) {
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if (mca_cfg.ser && (m->status & MCI_STATUS_MISCV)) {
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u8 shift = MCI_MISC_ADDR_LSB(m->misc);
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m->addr >>= shift;
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m->addr <<= shift;
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@ -617,7 +612,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
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* TBD do the same check for MCI_STATUS_EN here?
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*/
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if (!(flags & MCP_UC) &&
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(m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)))
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(m.status & (mca_cfg.ser ? MCI_STATUS_S : MCI_STATUS_UC)))
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continue;
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mce_read_aux(&m, i);
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@ -1009,6 +1004,7 @@ static void mce_clear_info(struct mce_info *mi)
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*/
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void do_machine_check(struct pt_regs *regs, long error_code)
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{
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struct mca_config *cfg = &mca_cfg;
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struct mce m, *final;
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int i;
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int worst = 0;
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@ -1036,7 +1032,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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this_cpu_inc(mce_exception_count);
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if (!mca_cfg.banks)
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if (!cfg->banks)
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goto out;
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mce_gather_info(&m, regs);
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@ -1063,7 +1059,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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* because the first one to see it will clear it.
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*/
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order = mce_start(&no_way_out);
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for (i = 0; i < mca_cfg.banks; i++) {
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for (i = 0; i < cfg->banks; i++) {
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__clear_bit(i, toclear);
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if (!test_bit(i, valid_banks))
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continue;
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@ -1082,7 +1078,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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* Non uncorrected or non signaled errors are handled by
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* machine_check_poll. Leave them alone, unless this panics.
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*/
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if (!(m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
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if (!(m.status & (cfg->ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
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!no_way_out)
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continue;
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@ -1091,7 +1087,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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*/
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add_taint(TAINT_MACHINE_CHECK);
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severity = mce_severity(&m, mca_cfg.tolerant, NULL);
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severity = mce_severity(&m, cfg->tolerant, NULL);
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/*
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* When machine check was for corrected handler don't touch,
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@ -1147,7 +1143,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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* issues we try to recover, or limit damage to the current
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* process.
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*/
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if (mca_cfg.tolerant < 3) {
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if (cfg->tolerant < 3) {
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if (no_way_out)
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mce_panic("Fatal machine check on current CPU", &m, msg);
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if (worst == MCE_AR_SEVERITY) {
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@ -1426,7 +1422,7 @@ static int __cpuinit __mcheck_cpu_cap_init(void)
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mca_cfg.rip_msr = MSR_IA32_MCG_EIP;
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if (cap & MCG_SER_P)
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mce_ser = 1;
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mca_cfg.ser = true;
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return 0;
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}
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@ -1675,7 +1671,7 @@ void (*machine_check_vector)(struct pt_regs *, long error_code) =
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*/
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void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c)
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{
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if (mce_disabled)
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if (mca_cfg.disabled)
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return;
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if (__mcheck_cpu_ancient_init(c))
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@ -1685,7 +1681,7 @@ void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c)
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return;
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if (__mcheck_cpu_cap_init() < 0 || __mcheck_cpu_apply_quirks(c) < 0) {
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mce_disabled = 1;
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mca_cfg.disabled = true;
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return;
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}
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@ -1967,7 +1963,7 @@ static int __init mcheck_enable(char *str)
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if (*str == '=')
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str++;
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if (!strcmp(str, "off"))
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mce_disabled = 1;
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cfg->disabled = true;
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else if (!strcmp(str, "no_cmci"))
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cfg->cmci_disabled = true;
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else if (!strcmp(str, "dont_log_ce"))
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@ -1977,7 +1973,7 @@ static int __init mcheck_enable(char *str)
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else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog"))
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cfg->bootlog = (str[0] == 'b');
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else if (!strcmp(str, "bios_cmci_threshold"))
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mce_bios_cmci_threshold = 1;
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cfg->bios_cmci_threshold = true;
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else if (isdigit(str[0])) {
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get_option(&str, &(cfg->tolerant));
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if (*str == ',') {
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@ -2435,7 +2431,7 @@ device_initcall_sync(mcheck_init_device);
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*/
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static int __init mcheck_disable(char *str)
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{
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mce_disabled = 1;
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mca_cfg.disabled = true;
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return 1;
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}
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__setup("nomce", mcheck_disable);
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@ -200,7 +200,7 @@ static void cmci_discover(int banks)
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continue;
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}
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if (!mce_bios_cmci_threshold) {
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if (!mca_cfg.bios_cmci_threshold) {
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val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
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val |= CMCI_THRESHOLD;
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} else if (!(val & MCI_CTL2_CMCI_THRESHOLD_MASK)) {
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@ -227,7 +227,7 @@ static void cmci_discover(int banks)
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* set the thresholds properly or does not work with
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* this boot option. Note down now and report later.
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*/
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if (mce_bios_cmci_threshold && bios_zero_thresh &&
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if (mca_cfg.bios_cmci_threshold && bios_zero_thresh &&
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(val & MCI_CTL2_CMCI_THRESHOLD_MASK))
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bios_wrong_thresh = 1;
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} else {
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@ -235,7 +235,7 @@ static void cmci_discover(int banks)
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}
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}
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raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
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if (mce_bios_cmci_threshold && bios_wrong_thresh) {
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if (mca_cfg.bios_cmci_threshold && bios_wrong_thresh) {
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pr_info_once(
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"bios_cmci_threshold: Some banks do not have valid thresholds set\n");
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pr_info_once(
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@ -1412,7 +1412,7 @@ __init void lguest_init(void)
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/* We don't have features. We have puppies! Puppies! */
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#ifdef CONFIG_X86_MCE
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mce_disabled = 1;
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mca_cfg.disabled = true;
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#endif
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#ifdef CONFIG_ACPI
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acpi_disabled = 1;
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