net: gianfar: Implement rx_missed_errors counter
Devices with RMON support has a 16-bit RDRP counter. It provides: "Receive dropped packets counter. Increments for frames received which are streamed to system but are later dropped due to lack of system resources." To handle more than 2^16 dropped packets, a carry bit in CAR1 register is set on overflow, so we enable irq when this is set, extending the counter to 2^64 for handling situations where lots of packets are missed (e.g. during heavy network storms). Signed-off-by: Esben Haabendal <esben@geanix.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Родитель
8da32a1071
Коммит
14870b75fe
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@ -289,6 +289,29 @@ static void gfar_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *s
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stats->tx_bytes += priv->tx_queue[i]->stats.tx_bytes;
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stats->tx_packets += priv->tx_queue[i]->stats.tx_packets;
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}
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if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
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struct rmon_mib __iomem *rmon = &priv->gfargrp[0].regs->rmon;
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unsigned long flags;
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u32 rdrp, car, car_before;
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u64 rdrp_offset;
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spin_lock_irqsave(&priv->rmon_overflow.lock, flags);
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car = gfar_read(&rmon->car1) & CAR1_C1RDR;
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do {
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car_before = car;
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rdrp = gfar_read(&rmon->rdrp);
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car = gfar_read(&rmon->car1) & CAR1_C1RDR;
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} while (car != car_before);
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if (car) {
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priv->rmon_overflow.rdrp++;
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gfar_write(&rmon->car1, car);
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}
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rdrp_offset = priv->rmon_overflow.rdrp;
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spin_unlock_irqrestore(&priv->rmon_overflow.lock, flags);
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stats->rx_missed_errors = rdrp + (rdrp_offset << 16);
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}
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}
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/* Set the appropriate hash bit for the given addr */
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@ -379,7 +402,8 @@ static void gfar_ints_enable(struct gfar_private *priv)
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for (i = 0; i < priv->num_grps; i++) {
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struct gfar __iomem *regs = priv->gfargrp[i].regs;
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/* Unmask the interrupts we look for */
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gfar_write(®s->imask, IMASK_DEFAULT);
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gfar_write(®s->imask,
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IMASK_DEFAULT | priv->rmon_overflow.imask);
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}
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}
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@ -2287,7 +2311,7 @@ static irqreturn_t gfar_receive(int irq, void *grp_id)
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if (likely(napi_schedule_prep(&grp->napi_rx))) {
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spin_lock_irqsave(&grp->grplock, flags);
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imask = gfar_read(&grp->regs->imask);
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imask &= IMASK_RX_DISABLED;
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imask &= IMASK_RX_DISABLED | grp->priv->rmon_overflow.imask;
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gfar_write(&grp->regs->imask, imask);
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spin_unlock_irqrestore(&grp->grplock, flags);
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__napi_schedule(&grp->napi_rx);
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@ -2311,7 +2335,7 @@ static irqreturn_t gfar_transmit(int irq, void *grp_id)
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if (likely(napi_schedule_prep(&grp->napi_tx))) {
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spin_lock_irqsave(&grp->grplock, flags);
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imask = gfar_read(&grp->regs->imask);
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imask &= IMASK_TX_DISABLED;
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imask &= IMASK_TX_DISABLED | grp->priv->rmon_overflow.imask;
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gfar_write(&grp->regs->imask, imask);
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spin_unlock_irqrestore(&grp->grplock, flags);
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__napi_schedule(&grp->napi_tx);
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@ -2682,6 +2706,18 @@ static irqreturn_t gfar_error(int irq, void *grp_id)
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}
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netif_dbg(priv, tx_err, dev, "Transmit Error\n");
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}
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if (events & IEVENT_MSRO) {
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struct rmon_mib __iomem *rmon = ®s->rmon;
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u32 car;
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spin_lock(&priv->rmon_overflow.lock);
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car = gfar_read(&rmon->car1) & CAR1_C1RDR;
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if (car) {
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priv->rmon_overflow.rdrp++;
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gfar_write(&rmon->car1, car);
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}
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spin_unlock(&priv->rmon_overflow.lock);
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}
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if (events & IEVENT_BSY) {
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dev->stats.rx_over_errors++;
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atomic64_inc(&priv->extra_stats.rx_bsy);
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@ -3259,6 +3295,14 @@ static int gfar_probe(struct platform_device *ofdev)
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gfar_hw_init(priv);
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if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
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struct rmon_mib __iomem *rmon = &priv->gfargrp[0].regs->rmon;
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spin_lock_init(&priv->rmon_overflow.lock);
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priv->rmon_overflow.imask = IMASK_MSRO;
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gfar_write(&rmon->cam1, gfar_read(&rmon->cam1) & ~CAM1_M1RDR);
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}
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/* Carrier starts down, phylib will bring it up */
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netif_carrier_off(dev);
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@ -663,6 +663,15 @@ struct rmon_mib
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u32 cam2; /* 0x.73c - Carry Mask Register Two */
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};
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struct rmon_overflow {
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/* lock for synchronization of the rdrp field of this struct, and
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* CAR1/CAR2 registers
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*/
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spinlock_t lock;
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u32 imask;
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u64 rdrp;
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};
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struct gfar_extra_stats {
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atomic64_t rx_alloc_err;
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atomic64_t rx_large;
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@ -1150,6 +1159,7 @@ struct gfar_private {
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/* Network Statistics */
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struct gfar_extra_stats extra_stats;
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struct rmon_overflow rmon_overflow;
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/* PHY stuff */
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phy_interface_t interface;
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