IB/mthca: Write FW commands through doorbell page
This patch is checks whether the HCA supports posting FW commands through a doorbell page (user access region 0, or "UAR0"). If this is supported, the driver maps UAR0 and uses it for FW commands. This can be controlled by the value of a writable module parameter fw_cmd_doorbell. When the parameter is 0, the commands are posted through HCR using the old method; otherwise if HCA is capable commands go through UAR0. This use of UAR0 to post commands eliminates the need for polling the "go" bit prior to posting a new command. Since reading from a PCI device is much more expensive then issuing a posted write, it is expected that issuing FW commands this way will provide better CPU utilization. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
Eli Cohen
Roland Dreier
Родитель
ea88fd16d6
Коммит
14abdffcc0
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@ -182,25 +182,58 @@ struct mthca_cmd_context {
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u8 status;
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};
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static int fw_cmd_doorbell = 1;
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module_param(fw_cmd_doorbell, int, 0644);
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MODULE_PARM_DESC(fw_cmd_doorbell, "post FW commands through doorbell page if nonzero "
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"(and supported by FW)");
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static inline int go_bit(struct mthca_dev *dev)
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{
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return readl(dev->hcr + HCR_STATUS_OFFSET) &
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swab32(1 << HCR_GO_BIT);
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}
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static int mthca_cmd_post(struct mthca_dev *dev,
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u64 in_param,
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u64 out_param,
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u32 in_modifier,
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u8 op_modifier,
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u16 op,
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u16 token,
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int event)
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static void mthca_cmd_post_dbell(struct mthca_dev *dev,
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u64 in_param,
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u64 out_param,
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u32 in_modifier,
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u8 op_modifier,
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u16 op,
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u16 token)
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{
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int err = 0;
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void __iomem *ptr = dev->cmd.dbell_map;
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u16 *offs = dev->cmd.dbell_offsets;
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mutex_lock(&dev->cmd.hcr_mutex);
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__raw_writel((__force u32) cpu_to_be32(in_param >> 32), ptr + offs[0]);
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wmb();
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__raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), ptr + offs[1]);
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wmb();
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__raw_writel((__force u32) cpu_to_be32(in_modifier), ptr + offs[2]);
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wmb();
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__raw_writel((__force u32) cpu_to_be32(out_param >> 32), ptr + offs[3]);
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wmb();
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__raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), ptr + offs[4]);
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wmb();
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__raw_writel((__force u32) cpu_to_be32(token << 16), ptr + offs[5]);
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wmb();
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__raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) |
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(1 << HCA_E_BIT) |
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(op_modifier << HCR_OPMOD_SHIFT) |
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op), ptr + offs[6]);
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wmb();
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__raw_writel((__force u32) 0, ptr + offs[7]);
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wmb();
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}
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static int mthca_cmd_post_hcr(struct mthca_dev *dev,
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u64 in_param,
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u64 out_param,
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u32 in_modifier,
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u8 op_modifier,
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u16 op,
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u16 token,
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int event)
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{
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if (event) {
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unsigned long end = jiffies + GO_BIT_TIMEOUT;
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@ -210,10 +243,8 @@ static int mthca_cmd_post(struct mthca_dev *dev,
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}
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}
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if (go_bit(dev)) {
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err = -EAGAIN;
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goto out;
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}
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if (go_bit(dev))
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return -EAGAIN;
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/*
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* We use writel (instead of something like memcpy_toio)
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@ -236,7 +267,29 @@ static int mthca_cmd_post(struct mthca_dev *dev,
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(op_modifier << HCR_OPMOD_SHIFT) |
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op), dev->hcr + 6 * 4);
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out:
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return 0;
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}
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static int mthca_cmd_post(struct mthca_dev *dev,
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u64 in_param,
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u64 out_param,
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u32 in_modifier,
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u8 op_modifier,
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u16 op,
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u16 token,
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int event)
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{
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int err = 0;
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mutex_lock(&dev->cmd.hcr_mutex);
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if (event && dev->cmd.flags & MTHCA_CMD_POST_DOORBELLS && fw_cmd_doorbell)
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mthca_cmd_post_dbell(dev, in_param, out_param, in_modifier,
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op_modifier, op, token);
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else
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err = mthca_cmd_post_hcr(dev, in_param, out_param, in_modifier,
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op_modifier, op, token, event);
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mutex_unlock(&dev->cmd.hcr_mutex);
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return err;
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}
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@ -386,7 +439,7 @@ static int mthca_cmd_box(struct mthca_dev *dev,
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unsigned long timeout,
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u8 *status)
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{
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if (dev->cmd.use_events)
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if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS)
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return mthca_cmd_wait(dev, in_param, &out_param, 0,
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in_modifier, op_modifier, op,
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timeout, status);
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@ -423,7 +476,7 @@ static int mthca_cmd_imm(struct mthca_dev *dev,
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unsigned long timeout,
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u8 *status)
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{
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if (dev->cmd.use_events)
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if (dev->cmd.flags & MTHCA_CMD_USE_EVENTS)
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return mthca_cmd_wait(dev, in_param, out_param, 1,
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in_modifier, op_modifier, op,
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timeout, status);
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@ -437,7 +490,7 @@ int mthca_cmd_init(struct mthca_dev *dev)
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{
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mutex_init(&dev->cmd.hcr_mutex);
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sema_init(&dev->cmd.poll_sem, 1);
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dev->cmd.use_events = 0;
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dev->cmd.flags = 0;
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dev->hcr = ioremap(pci_resource_start(dev->pdev, 0) + MTHCA_HCR_BASE,
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MTHCA_HCR_SIZE);
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@ -461,6 +514,8 @@ void mthca_cmd_cleanup(struct mthca_dev *dev)
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{
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pci_pool_destroy(dev->cmd.pool);
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iounmap(dev->hcr);
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if (dev->cmd.flags & MTHCA_CMD_POST_DOORBELLS)
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iounmap(dev->cmd.dbell_map);
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}
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/*
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@ -498,7 +553,8 @@ int mthca_cmd_use_events(struct mthca_dev *dev)
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; /* nothing */
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--dev->cmd.token_mask;
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dev->cmd.use_events = 1;
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dev->cmd.flags |= MTHCA_CMD_USE_EVENTS;
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down(&dev->cmd.poll_sem);
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return 0;
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@ -511,7 +567,7 @@ void mthca_cmd_use_polling(struct mthca_dev *dev)
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{
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int i;
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dev->cmd.use_events = 0;
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dev->cmd.flags &= ~MTHCA_CMD_USE_EVENTS;
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for (i = 0; i < dev->cmd.max_cmds; ++i)
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down(&dev->cmd.event_sem);
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@ -661,12 +717,41 @@ int mthca_RUN_FW(struct mthca_dev *dev, u8 *status)
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return mthca_cmd(dev, 0, 0, 0, CMD_RUN_FW, CMD_TIME_CLASS_A, status);
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}
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static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base)
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{
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unsigned long addr;
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u16 max_off = 0;
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int i;
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for (i = 0; i < 8; ++i)
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max_off = max(max_off, dev->cmd.dbell_offsets[i]);
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if ((base & PAGE_MASK) != ((base + max_off) & PAGE_MASK)) {
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mthca_warn(dev, "Firmware doorbell region at 0x%016llx, "
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"length 0x%x crosses a page boundary\n",
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(unsigned long long) base, max_off);
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return;
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}
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addr = pci_resource_start(dev->pdev, 2) +
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((pci_resource_len(dev->pdev, 2) - 1) & base);
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dev->cmd.dbell_map = ioremap(addr, max_off + sizeof(u32));
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if (!dev->cmd.dbell_map)
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return;
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dev->cmd.flags |= MTHCA_CMD_POST_DOORBELLS;
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mthca_dbg(dev, "Mapped doorbell page for posting FW commands\n");
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}
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int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status)
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{
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struct mthca_mailbox *mailbox;
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u32 *outbox;
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u64 base;
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u32 tmp;
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int err = 0;
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u8 lg;
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int i;
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#define QUERY_FW_OUT_SIZE 0x100
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#define QUERY_FW_VER_OFFSET 0x00
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@ -674,6 +759,10 @@ int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status)
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#define QUERY_FW_ERR_START_OFFSET 0x30
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#define QUERY_FW_ERR_SIZE_OFFSET 0x38
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#define QUERY_FW_CMD_DB_EN_OFFSET 0x10
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#define QUERY_FW_CMD_DB_OFFSET 0x50
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#define QUERY_FW_CMD_DB_BASE 0x60
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#define QUERY_FW_START_OFFSET 0x20
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#define QUERY_FW_END_OFFSET 0x28
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@ -702,16 +791,29 @@ int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status)
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((dev->fw_ver & 0xffff0000ull) >> 16) |
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((dev->fw_ver & 0x0000ffffull) << 16);
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mthca_dbg(dev, "FW version %012llx, max commands %d\n",
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(unsigned long long) dev->fw_ver, dev->cmd.max_cmds);
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MTHCA_GET(lg, outbox, QUERY_FW_MAX_CMD_OFFSET);
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dev->cmd.max_cmds = 1 << lg;
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MTHCA_GET(dev->catas_err.addr, outbox, QUERY_FW_ERR_START_OFFSET);
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MTHCA_GET(dev->catas_err.size, outbox, QUERY_FW_ERR_SIZE_OFFSET);
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mthca_dbg(dev, "FW version %012llx, max commands %d\n",
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(unsigned long long) dev->fw_ver, dev->cmd.max_cmds);
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mthca_dbg(dev, "Catastrophic error buffer at 0x%llx, size 0x%x\n",
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(unsigned long long) dev->catas_err.addr, dev->catas_err.size);
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MTHCA_GET(tmp, outbox, QUERY_FW_CMD_DB_EN_OFFSET);
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if (tmp & 0x1) {
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mthca_dbg(dev, "FW supports commands through doorbells\n");
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MTHCA_GET(base, outbox, QUERY_FW_CMD_DB_BASE);
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for (i = 0; i < MTHCA_CMD_NUM_DBELL_DWORDS; ++i)
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MTHCA_GET(dev->cmd.dbell_offsets[i], outbox,
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QUERY_FW_CMD_DB_OFFSET + (i << 1));
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mthca_setup_cmd_doorbells(dev, base);
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}
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if (mthca_is_memfree(dev)) {
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MTHCA_GET(dev->fw.arbel.fw_pages, outbox, QUERY_FW_SIZE_OFFSET);
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MTHCA_GET(dev->fw.arbel.clr_int_base, outbox, QUERY_FW_CLR_INT_BASE_OFFSET);
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@ -110,9 +110,17 @@ enum {
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MTHCA_OPCODE_INVALID = 0xff
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};
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enum {
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MTHCA_CMD_USE_EVENTS = 1 << 0,
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MTHCA_CMD_POST_DOORBELLS = 1 << 1
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};
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enum {
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MTHCA_CMD_NUM_DBELL_DWORDS = 8
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};
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struct mthca_cmd {
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struct pci_pool *pool;
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int use_events;
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struct mutex hcr_mutex;
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struct semaphore poll_sem;
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struct semaphore event_sem;
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@ -121,6 +129,9 @@ struct mthca_cmd {
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int free_head;
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struct mthca_cmd_context *context;
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u16 token_mask;
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u32 flags;
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void __iomem *dbell_map;
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u16 dbell_offsets[MTHCA_CMD_NUM_DBELL_DWORDS];
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};
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struct mthca_limits {
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