ARM: EXYNOS: Add platform driver support for Exynos PMU
This patch modifies Exynos Power Management Unit (PMU) initialization implementation in following way: - Added platform driver support for Exynos PMU IP. - Added platform struct exynos_pmu_data to hold platform specific data. - For each SoC's PMU support now we can add platform data and statically bind PMU configuration and SoC specific initialization function. - Separate each SoC's PMU initialization function and make it as part of platform data. - It also removes uses of soc_is_exynosXYZ(). Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Pankaj Dubey
Kukjin Kim
Родитель
c0adae9e51
Коммит
14fc8b93d4
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@ -24,6 +24,7 @@ menuconfig ARCH_EXYNOS
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select PM_GENERIC_DOMAINS if PM_RUNTIME
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select S5P_DEV_MFC
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select SRAM
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select MFD_SYSCON
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help
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Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
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* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS - CPU PMU(Power Management Unit) support
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@ -10,12 +10,26 @@
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include "common.h"
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#include "regs-pmu.h"
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static const struct exynos_pmu_conf *exynos_pmu_config;
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struct exynos_pmu_data {
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const struct exynos_pmu_conf *pmu_config;
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const struct exynos_pmu_conf *pmu_config_extra;
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void (*pmu_init)(void);
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void (*powerdown_conf)(enum sys_powerdown);
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};
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struct exynos_pmu_context {
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struct device *dev;
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const struct exynos_pmu_data *pmu_data;
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};
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static struct exynos_pmu_context *pmu_context;
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static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
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/* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
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@ -336,7 +350,7 @@ static unsigned int const exynos5_list_disable_wfi_wfe[] = {
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EXYNOS5_ISP_ARM_OPTION,
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};
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static void exynos5_init_pmu(void)
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static void exynos5_powerdown_conf(enum sys_powerdown mode)
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{
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unsigned int i;
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unsigned int tmp;
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@ -344,7 +358,7 @@ static void exynos5_init_pmu(void)
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/*
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* Enable both SC_FEEDBACK and SC_COUNTER
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*/
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for (i = 0 ; i < ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {
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for (i = 0; i < ARRAY_SIZE(exynos5_list_both_cnt_feed); i++) {
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tmp = pmu_raw_readl(exynos5_list_both_cnt_feed[i]);
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tmp |= (EXYNOS5_USE_SC_FEEDBACK |
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EXYNOS5_USE_SC_COUNTER);
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@ -361,7 +375,7 @@ static void exynos5_init_pmu(void)
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/*
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* Disable WFI/WFE on XXX_OPTION
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*/
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for (i = 0 ; i < ARRAY_SIZE(exynos5_list_disable_wfi_wfe) ; i++) {
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for (i = 0; i < ARRAY_SIZE(exynos5_list_disable_wfi_wfe); i++) {
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tmp = pmu_raw_readl(exynos5_list_disable_wfi_wfe[i]);
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tmp &= ~(EXYNOS5_OPTION_USE_STANDBYWFE |
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EXYNOS5_OPTION_USE_STANDBYWFI);
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@ -373,51 +387,124 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
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{
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unsigned int i;
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if (soc_is_exynos5250())
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exynos5_init_pmu();
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const struct exynos_pmu_data *pmu_data = pmu_context->pmu_data;
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for (i = 0; (exynos_pmu_config[i].offset != PMU_TABLE_END) ; i++)
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pmu_raw_writel(exynos_pmu_config[i].val[mode],
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exynos_pmu_config[i].offset);
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if (pmu_data->powerdown_conf)
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pmu_data->powerdown_conf(mode);
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if (soc_is_exynos4412()) {
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for (i = 0; exynos4412_pmu_config[i].offset != PMU_TABLE_END ; i++)
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pmu_raw_writel(exynos4412_pmu_config[i].val[mode],
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exynos4412_pmu_config[i].offset);
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if (pmu_data->pmu_config) {
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for (i = 0; (pmu_data->pmu_config[i].offset != PMU_TABLE_END); i++)
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pmu_raw_writel(pmu_data->pmu_config[i].val[mode],
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pmu_data->pmu_config[i].offset);
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}
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if (pmu_data->pmu_config_extra) {
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for (i = 0; pmu_data->pmu_config_extra[i].offset != PMU_TABLE_END; i++)
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pmu_raw_writel(pmu_data->pmu_config_extra[i].val[mode],
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pmu_data->pmu_config_extra[i].offset);
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}
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}
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static void exynos5250_pmu_init(void)
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{
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unsigned int value;
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/*
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* When SYS_WDTRESET is set, watchdog timer reset request
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* is ignored by power management unit.
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*/
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value = pmu_raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
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value &= ~EXYNOS5_SYS_WDTRESET;
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pmu_raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
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value = pmu_raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
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value &= ~EXYNOS5_SYS_WDTRESET;
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pmu_raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
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}
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static const struct exynos_pmu_data exynos4210_pmu_data = {
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.pmu_config = exynos4210_pmu_config,
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};
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static const struct exynos_pmu_data exynos4212_pmu_data = {
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.pmu_config = exynos4x12_pmu_config,
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};
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static const struct exynos_pmu_data exynos4412_pmu_data = {
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.pmu_config = exynos4x12_pmu_config,
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.pmu_config_extra = exynos4412_pmu_config,
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};
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static const struct exynos_pmu_data exynos5250_pmu_data = {
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.pmu_config = exynos5250_pmu_config,
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.pmu_init = exynos5250_pmu_init,
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.powerdown_conf = exynos5_powerdown_conf,
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};
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/*
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* PMU platform driver and devicetree bindings.
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*/
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static const struct of_device_id exynos_pmu_of_device_ids[] = {
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{
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.compatible = "samsung,exynos4210-pmu",
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.data = &exynos4210_pmu_data,
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}, {
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.compatible = "samsung,exynos4212-pmu",
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.data = &exynos4212_pmu_data,
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}, {
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.compatible = "samsung,exynos4412-pmu",
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.data = &exynos4412_pmu_data,
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}, {
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.compatible = "samsung,exynos5250-pmu",
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.data = &exynos5250_pmu_data,
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},
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{ /*sentinel*/ },
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};
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static int exynos_pmu_probe(struct platform_device *pdev)
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{
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const struct of_device_id *match;
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struct device *dev = &pdev->dev;
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struct resource *res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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pmu_base_addr = devm_ioremap_resource(dev, res);
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if (IS_ERR(pmu_base_addr))
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return PTR_ERR(pmu_base_addr);
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pmu_context = devm_kzalloc(&pdev->dev,
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sizeof(struct exynos_pmu_context),
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GFP_KERNEL);
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if (!pmu_context) {
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dev_err(dev, "Cannot allocate memory.\n");
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return -ENOMEM;
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}
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pmu_context->dev = dev;
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match = of_match_node(exynos_pmu_of_device_ids, dev->of_node);
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pmu_context->pmu_data = match->data;
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if (pmu_context->pmu_data->pmu_init)
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pmu_context->pmu_data->pmu_init();
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platform_set_drvdata(pdev, pmu_context);
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dev_dbg(dev, "Exynos PMU Driver probe done\n");
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return 0;
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}
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static struct platform_driver exynos_pmu_driver = {
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.driver = {
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.name = "exynos-pmu",
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.owner = THIS_MODULE,
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.of_match_table = exynos_pmu_of_device_ids,
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},
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.probe = exynos_pmu_probe,
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};
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static int __init exynos_pmu_init(void)
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{
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unsigned int value;
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return platform_driver_register(&exynos_pmu_driver);
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exynos_pmu_config = exynos4210_pmu_config;
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if (soc_is_exynos4210()) {
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exynos_pmu_config = exynos4210_pmu_config;
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pr_info("EXYNOS4210 PMU Initialize\n");
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} else if (soc_is_exynos4212() || soc_is_exynos4412()) {
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exynos_pmu_config = exynos4x12_pmu_config;
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pr_info("EXYNOS4x12 PMU Initialize\n");
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} else if (soc_is_exynos5250()) {
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/*
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* When SYS_WDTRESET is set, watchdog timer reset request
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* is ignored by power management unit.
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*/
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value = pmu_raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
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value &= ~EXYNOS5_SYS_WDTRESET;
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pmu_raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
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value = pmu_raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
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value &= ~EXYNOS5_SYS_WDTRESET;
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pmu_raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
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exynos_pmu_config = exynos5250_pmu_config;
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pr_info("EXYNOS5250 PMU Initialize\n");
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} else {
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pr_info("EXYNOS: PMU not supported\n");
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}
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return 0;
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}
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arch_initcall(exynos_pmu_init);
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postcore_initcall(exynos_pmu_init);
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