ARM: dma-mapping: move all dma bounce code to separate dma ops structure
This patch removes dma bounce hooks from the common dma mapping implementation on ARM architecture and creates a separate set of dma_map_ops for dma bounce devices. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
This commit is contained in:
Родитель
2a550e73d3
Коммит
15237e1f50
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@ -308,8 +308,9 @@ static inline void unmap_single(struct device *dev, struct safe_buffer *buf,
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* substitute the safe buffer for the unsafe one.
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* (basically move the buffer from an unsafe area to a safe one)
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*/
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dma_addr_t __dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir)
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static dma_addr_t dmabounce_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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dma_addr_t dma_addr;
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int ret;
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@ -324,7 +325,7 @@ dma_addr_t __dma_map_page(struct device *dev, struct page *page,
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return DMA_ERROR_CODE;
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if (ret == 0) {
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__dma_page_cpu_to_dev(page, offset, size, dir);
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arm_dma_ops.sync_single_for_device(dev, dma_addr, size, dir);
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return dma_addr;
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}
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@ -335,7 +336,6 @@ dma_addr_t __dma_map_page(struct device *dev, struct page *page,
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return map_single(dev, page_address(page) + offset, size, dir);
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}
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EXPORT_SYMBOL(__dma_map_page);
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/*
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* see if a mapped address was really a "safe" buffer and if so, copy
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@ -343,8 +343,8 @@ EXPORT_SYMBOL(__dma_map_page);
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* the safe buffer. (basically return things back to the way they
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* should be)
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*/
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void __dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction dir)
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static void dmabounce_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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struct safe_buffer *buf;
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@ -353,16 +353,14 @@ void __dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
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buf = find_safe_buffer_dev(dev, dma_addr, __func__);
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if (!buf) {
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__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, dma_addr)),
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dma_addr & ~PAGE_MASK, size, dir);
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arm_dma_ops.sync_single_for_cpu(dev, dma_addr, size, dir);
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return;
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}
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unmap_single(dev, buf, size, dir);
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}
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EXPORT_SYMBOL(__dma_unmap_page);
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int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
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static int __dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
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size_t sz, enum dma_data_direction dir)
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{
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struct safe_buffer *buf;
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@ -392,9 +390,17 @@ int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
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}
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return 0;
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}
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EXPORT_SYMBOL(dmabounce_sync_for_cpu);
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int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
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static void dmabounce_sync_for_cpu(struct device *dev,
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dma_addr_t handle, size_t size, enum dma_data_direction dir)
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{
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if (!__dmabounce_sync_for_cpu(dev, handle, size, dir))
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return;
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arm_dma_ops.sync_single_for_cpu(dev, handle, size, dir);
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}
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static int __dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
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size_t sz, enum dma_data_direction dir)
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{
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struct safe_buffer *buf;
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@ -424,7 +430,35 @@ int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
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}
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return 0;
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}
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EXPORT_SYMBOL(dmabounce_sync_for_device);
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static void dmabounce_sync_for_device(struct device *dev,
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dma_addr_t handle, size_t size, enum dma_data_direction dir)
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{
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if (!__dmabounce_sync_for_device(dev, handle, size, dir))
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return;
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arm_dma_ops.sync_single_for_device(dev, handle, size, dir);
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}
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static int dmabounce_set_mask(struct device *dev, u64 dma_mask)
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{
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if (dev->archdata.dmabounce)
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return 0;
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return arm_dma_ops.set_dma_mask(dev, dma_mask);
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}
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static struct dma_map_ops dmabounce_ops = {
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.map_page = dmabounce_map_page,
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.unmap_page = dmabounce_unmap_page,
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.sync_single_for_cpu = dmabounce_sync_for_cpu,
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.sync_single_for_device = dmabounce_sync_for_device,
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.map_sg = arm_dma_map_sg,
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.unmap_sg = arm_dma_unmap_sg,
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.sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
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.sync_sg_for_device = arm_dma_sync_sg_for_device,
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.set_dma_mask = dmabounce_set_mask,
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};
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static int dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev,
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const char *name, unsigned long size)
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@ -486,6 +520,7 @@ int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
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#endif
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dev->archdata.dmabounce = device_info;
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set_dma_ops(dev, &dmabounce_ops);
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dev_info(dev, "dmabounce: registered device\n");
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@ -504,6 +539,7 @@ void dmabounce_unregister_dev(struct device *dev)
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struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
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dev->archdata.dmabounce = NULL;
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set_dma_ops(dev, NULL);
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if (!device_info) {
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dev_warn(dev,
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@ -84,62 +84,6 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
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}
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#endif
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/*
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* The DMA API is built upon the notion of "buffer ownership". A buffer
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* is either exclusively owned by the CPU (and therefore may be accessed
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* by it) or exclusively owned by the DMA device. These helper functions
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* represent the transitions between these two ownership states.
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*
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* Note, however, that on later ARMs, this notion does not work due to
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* speculative prefetches. We model our approach on the assumption that
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* the CPU does do speculative prefetches, which means we clean caches
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* before transfers and delay cache invalidation until transfer completion.
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*
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* Private support functions: these are not part of the API and are
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* liable to change. Drivers must not use these.
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*/
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static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size,
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enum dma_data_direction dir)
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{
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extern void ___dma_single_cpu_to_dev(const void *, size_t,
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enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_single_cpu_to_dev(kaddr, size, dir);
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}
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static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size,
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enum dma_data_direction dir)
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{
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extern void ___dma_single_dev_to_cpu(const void *, size_t,
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enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_single_dev_to_cpu(kaddr, size, dir);
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}
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static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
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size_t size, enum dma_data_direction dir)
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{
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extern void ___dma_page_cpu_to_dev(struct page *, unsigned long,
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size_t, enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_page_cpu_to_dev(page, off, size, dir);
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}
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static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
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size_t size, enum dma_data_direction dir)
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{
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extern void ___dma_page_dev_to_cpu(struct page *, unsigned long,
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size_t, enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_page_dev_to_cpu(page, off, size, dir);
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}
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extern int dma_supported(struct device *, u64);
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extern int dma_set_mask(struct device *, u64);
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/*
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* DMA errors are defined by all-bits-set in the DMA address.
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*/
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@ -163,6 +107,8 @@ static inline void dma_free_noncoherent(struct device *dev, size_t size,
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{
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}
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extern int dma_supported(struct device *dev, u64 mask);
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/**
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* dma_alloc_coherent - allocate consistent memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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@ -235,7 +181,6 @@ int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
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extern void __init init_consistent_dma_size(unsigned long size);
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#ifdef CONFIG_DMABOUNCE
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/*
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* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
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* and utilize bounce buffers as needed to work around limited DMA windows.
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@ -275,47 +220,7 @@ extern int dmabounce_register_dev(struct device *, unsigned long,
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*/
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extern void dmabounce_unregister_dev(struct device *);
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/*
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* The DMA API, implemented by dmabounce.c. See below for descriptions.
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*/
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extern dma_addr_t __dma_map_page(struct device *, struct page *,
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unsigned long, size_t, enum dma_data_direction);
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extern void __dma_unmap_page(struct device *, dma_addr_t, size_t,
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enum dma_data_direction);
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/*
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* Private functions
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*/
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int dmabounce_sync_for_cpu(struct device *, dma_addr_t, size_t, enum dma_data_direction);
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int dmabounce_sync_for_device(struct device *, dma_addr_t, size_t, enum dma_data_direction);
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#else
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static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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return 1;
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}
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static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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return 1;
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}
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static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir)
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{
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__dma_page_cpu_to_dev(page, offset, size, dir);
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return pfn_to_dma(dev, page_to_pfn(page)) + offset;
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}
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static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
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handle & ~PAGE_MASK, size, dir);
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}
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#endif /* CONFIG_DMABOUNCE */
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/*
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* The scatter list versions of the above methods.
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@ -29,6 +29,75 @@
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#include "mm.h"
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/*
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* The DMA API is built upon the notion of "buffer ownership". A buffer
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* is either exclusively owned by the CPU (and therefore may be accessed
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* by it) or exclusively owned by the DMA device. These helper functions
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* represent the transitions between these two ownership states.
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*
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* Note, however, that on later ARMs, this notion does not work due to
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* speculative prefetches. We model our approach on the assumption that
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* the CPU does do speculative prefetches, which means we clean caches
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* before transfers and delay cache invalidation until transfer completion.
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*
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* Private support functions: these are not part of the API and are
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* liable to change. Drivers must not use these.
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*/
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static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size,
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enum dma_data_direction dir)
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{
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extern void ___dma_single_cpu_to_dev(const void *, size_t,
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enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_single_cpu_to_dev(kaddr, size, dir);
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}
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static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size,
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enum dma_data_direction dir)
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{
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extern void ___dma_single_dev_to_cpu(const void *, size_t,
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enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_single_dev_to_cpu(kaddr, size, dir);
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}
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static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
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size_t size, enum dma_data_direction dir)
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{
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extern void ___dma_page_cpu_to_dev(struct page *, unsigned long,
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size_t, enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_page_cpu_to_dev(page, off, size, dir);
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}
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static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
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size_t size, enum dma_data_direction dir)
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{
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extern void ___dma_page_dev_to_cpu(struct page *, unsigned long,
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size_t, enum dma_data_direction);
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if (!arch_is_coherent())
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___dma_page_dev_to_cpu(page, off, size, dir);
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}
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static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir)
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{
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__dma_page_cpu_to_dev(page, offset, size, dir);
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return pfn_to_dma(dev, page_to_pfn(page)) + offset;
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}
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static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
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handle & ~PAGE_MASK, size, dir);
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}
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/**
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* arm_dma_map_page - map a portion of a page for streaming DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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@ -76,9 +145,6 @@ static inline void arm_dma_sync_single_for_cpu(struct device *dev,
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{
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unsigned int offset = handle & (PAGE_SIZE - 1);
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struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
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if (!dmabounce_sync_for_cpu(dev, handle, size, dir))
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return;
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__dma_page_dev_to_cpu(page, offset, size, dir);
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}
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@ -87,9 +153,6 @@ static inline void arm_dma_sync_single_for_device(struct device *dev,
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{
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unsigned int offset = handle & (PAGE_SIZE - 1);
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struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
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if (!dmabounce_sync_for_device(dev, handle, size, dir))
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return;
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__dma_page_cpu_to_dev(page, offset, size, dir);
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}
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@ -599,7 +662,6 @@ void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,
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}
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/* FIXME: non-speculating: flush on bidirectional mappings? */
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}
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EXPORT_SYMBOL(___dma_page_cpu_to_dev);
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void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
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size_t size, enum dma_data_direction dir)
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@ -619,7 +681,6 @@ void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
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if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
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set_bit(PG_dcache_clean, &page->flags);
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}
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EXPORT_SYMBOL(___dma_page_dev_to_cpu);
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/**
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* arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
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@ -737,9 +798,7 @@ static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
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if (!dev->dma_mask || !dma_supported(dev, dma_mask))
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return -EIO;
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#ifndef CONFIG_DMABOUNCE
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*dev->dma_mask = dma_mask;
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#endif
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return 0;
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}
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