dt-bindings: dma: Convert ADMA doc to json-schema
Move ADMA documentation to YAML format. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Sameer Pujar
Thierry Reding
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* NVIDIA Tegra Audio DMA (ADMA) controller
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The Tegra Audio DMA controller that is used for transferring data
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between system memory and the Audio Processing Engine (APE).
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Required properties:
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- compatible: Should contain one of the following:
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- "nvidia,tegra210-adma": for Tegra210
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- "nvidia,tegra186-adma": for Tegra186 and Tegra194
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- reg: Should contain DMA registers location and length. This should be
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a single entry that includes all of the per-channel registers in one
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contiguous bank.
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- interrupts: Should contain all of the per-channel DMA interrupts in
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ascending order with respect to the DMA channel index.
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- clocks: Must contain one entry for the ADMA module clock
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(TEGRA210_CLK_D_AUDIO).
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- clock-names: Must contain the name "d_audio" for the corresponding
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'clocks' entry.
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- #dma-cells : Must be 1. The first cell denotes the receive/transmit
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request number and should be between 1 and the maximum number of
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requests supported. This value corresponds to the RX/TX_REQUEST_SELECT
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fields in the ADMA_CHn_CTRL register.
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Example:
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adma: dma@702e2000 {
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compatible = "nvidia,tegra210-adma";
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reg = <0x0 0x702e2000 0x0 0x2000>;
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interrupt-parent = <&tegra_agic>;
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
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clock-names = "d_audio";
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#dma-cells = <1>;
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra Audio DMA (ADMA) controller
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description: |
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The Tegra Audio DMA controller is used for transferring data
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between system memory and the Audio Processing Engine (APE).
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maintainers:
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- Jon Hunter <jonathanh@nvidia.com>
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allOf:
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- $ref: "dma-controller.yaml#"
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properties:
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compatible:
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oneOf:
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- enum:
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- nvidia,tegra210-adma
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- nvidia,tegra186-adma
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- items:
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- const: nvidia,tegra194-adma
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- const: nvidia,tegra186-adma
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reg:
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maxItems: 1
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interrupts:
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description: |
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Should contain all of the per-channel DMA interrupts in
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ascending order with respect to the DMA channel index.
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minItems: 1
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maxItems: 32
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clocks:
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description: Must contain one entry for the ADMA module clock
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maxItems: 1
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clock-names:
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const: d_audio
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"#dma-cells":
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description: |
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The first cell denotes the receive/transmit request number and
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should be between 1 and the maximum number of requests supported.
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This value corresponds to the RX/TX_REQUEST_SELECT fields in the
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ADMA_CHn_CTRL register.
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include<dt-bindings/clock/tegra210-car.h>
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dma-controller@702e2000 {
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compatible = "nvidia,tegra210-adma";
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reg = <0x702e2000 0x2000>;
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interrupt-parent = <&tegra_agic>;
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
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clock-names = "d_audio";
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#dma-cells = <1>;
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};
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...
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