[POWERPC] Cell iommu support
This patch adds full cell iommu support (and iommu disabled mode). It implements mapping/unmapping of iommu pages on demand using the standard powerpc iommu framework. It also supports running with iommu disabled for machines with less than 2GB of memory. (The default is off in that case, though it can be forced on with the kernel command line option iommu=force). Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -173,8 +173,8 @@ static unsigned long __initdata dt_string_start, dt_string_end;
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static unsigned long __initdata prom_initrd_start, prom_initrd_end;
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#ifdef CONFIG_PPC64
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static int __initdata iommu_force_on;
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static int __initdata ppc64_iommu_off;
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static int __initdata prom_iommu_force_on;
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static int __initdata prom_iommu_off;
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static unsigned long __initdata prom_tce_alloc_start;
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static unsigned long __initdata prom_tce_alloc_end;
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#endif
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@ -582,9 +582,9 @@ static void __init early_cmdline_parse(void)
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while (*opt && *opt == ' ')
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opt++;
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if (!strncmp(opt, RELOC("off"), 3))
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RELOC(ppc64_iommu_off) = 1;
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RELOC(prom_iommu_off) = 1;
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else if (!strncmp(opt, RELOC("force"), 5))
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RELOC(iommu_force_on) = 1;
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RELOC(prom_iommu_force_on) = 1;
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}
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#endif
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}
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@ -1167,7 +1167,7 @@ static void __init prom_initialize_tce_table(void)
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u64 local_alloc_top, local_alloc_bottom;
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u64 i;
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if (RELOC(ppc64_iommu_off))
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if (RELOC(prom_iommu_off))
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return;
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prom_debug("starting prom_initialize_tce_table\n");
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@ -2283,11 +2283,11 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
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* Fill in some infos for use by the kernel later on
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*/
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#ifdef CONFIG_PPC64
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if (RELOC(ppc64_iommu_off))
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if (RELOC(prom_iommu_off))
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prom_setprop(_prom->chosen, "/chosen", "linux,iommu-off",
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NULL, 0);
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if (RELOC(iommu_force_on))
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if (RELOC(prom_iommu_force_on))
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prom_setprop(_prom->chosen, "/chosen", "linux,iommu-force-on",
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NULL, 0);
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@ -1,67 +0,0 @@
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#ifndef CELL_IOMMU_H
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#define CELL_IOMMU_H
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/* some constants */
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enum {
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/* segment table entries */
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IOST_VALID_MASK = 0x8000000000000000ul,
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IOST_TAG_MASK = 0x3000000000000000ul,
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IOST_PT_BASE_MASK = 0x000003fffffff000ul,
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IOST_NNPT_MASK = 0x0000000000000fe0ul,
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IOST_PS_MASK = 0x000000000000000ful,
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IOST_PS_4K = 0x1,
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IOST_PS_64K = 0x3,
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IOST_PS_1M = 0x5,
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IOST_PS_16M = 0x7,
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/* iopt tag register */
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IOPT_VALID_MASK = 0x0000000200000000ul,
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IOPT_TAG_MASK = 0x00000001fffffffful,
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/* iopt cache register */
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IOPT_PROT_MASK = 0xc000000000000000ul,
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IOPT_PROT_NONE = 0x0000000000000000ul,
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IOPT_PROT_READ = 0x4000000000000000ul,
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IOPT_PROT_WRITE = 0x8000000000000000ul,
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IOPT_PROT_RW = 0xc000000000000000ul,
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IOPT_COHERENT = 0x2000000000000000ul,
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IOPT_ORDER_MASK = 0x1800000000000000ul,
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/* order access to same IOID/VC on same address */
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IOPT_ORDER_ADDR = 0x0800000000000000ul,
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/* similar, but only after a write access */
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IOPT_ORDER_WRITES = 0x1000000000000000ul,
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/* Order all accesses to same IOID/VC */
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IOPT_ORDER_VC = 0x1800000000000000ul,
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IOPT_RPN_MASK = 0x000003fffffff000ul,
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IOPT_HINT_MASK = 0x0000000000000800ul,
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IOPT_IOID_MASK = 0x00000000000007fful,
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IOSTO_ENABLE = 0x8000000000000000ul,
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IOSTO_ORIGIN = 0x000003fffffff000ul,
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IOSTO_HW = 0x0000000000000800ul,
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IOSTO_SW = 0x0000000000000400ul,
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IOCMD_CONF_TE = 0x0000800000000000ul,
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/* memory mapped registers */
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IOC_PT_CACHE_DIR = 0x000,
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IOC_ST_CACHE_DIR = 0x800,
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IOC_PT_CACHE_REG = 0x910,
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IOC_ST_ORIGIN = 0x918,
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IOC_CONF = 0x930,
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/* The high bit needs to be set on every DMA address when using
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* a spider bridge and only 2GB are addressable with the current
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* iommu code.
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*/
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SPIDER_DMA_VALID = 0x80000000,
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CELL_DMA_MASK = 0x7fffffff,
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};
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void cell_init_iommu(void);
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#endif
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@ -30,7 +30,6 @@
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#include <linux/console.h>
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#include <linux/mutex.h>
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#include <linux/memory_hotplug.h>
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#include <linux/notifier.h>
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#include <asm/mmu.h>
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#include <asm/processor.h>
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@ -55,7 +54,6 @@
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#include <asm/of_platform.h>
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#include "interrupt.h"
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#include "iommu.h"
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#include "cbe_regs.h"
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#include "pervasive.h"
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#include "ras.h"
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@ -83,38 +81,11 @@ static void cell_progress(char *s, unsigned short hex)
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printk("*** %04x : %s\n", hex, s ? s : "");
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}
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static int cell_of_bus_notify(struct notifier_block *nb, unsigned long action,
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void *data)
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{
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struct device *dev = data;
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if (action != BUS_NOTIFY_ADD_DEVICE)
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return 0;
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/* For now, we just use the PCI DMA ops for everything, though
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* we'll need something better when we have a real iommu
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* implementation.
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*/
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dev->archdata.dma_ops = pci_dma_ops;
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return 0;
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}
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static struct notifier_block cell_of_bus_notifier = {
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.notifier_call = cell_of_bus_notify
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};
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static int __init cell_publish_devices(void)
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{
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if (!machine_is(cell))
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return 0;
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/* Register callbacks on OF platform device addition/removal
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* to handle linking them to the right DMA operations
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*/
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bus_register_notifier(&of_platform_bus_type, &cell_of_bus_notifier);
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/* Publish OF platform devices for southbridge IOs */
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of_platform_bus_probe(NULL, NULL, NULL);
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@ -205,19 +176,6 @@ static void __init cell_setup_arch(void)
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mmio_nvram_init();
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}
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/*
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* Early initialization. Relocation is on but do not reference unbolted pages
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*/
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static void __init cell_init_early(void)
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{
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DBG(" -> cell_init_early()\n");
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cell_init_iommu();
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DBG(" <- cell_init_early()\n");
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}
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static int __init cell_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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@ -244,7 +202,6 @@ define_machine(cell) {
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.name = "Cell",
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.probe = cell_probe,
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.setup_arch = cell_setup_arch,
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.init_early = cell_init_early,
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.show_cpuinfo = cell_show_cpuinfo,
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.restart = rtas_restart,
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.power_off = rtas_power_off,
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@ -48,9 +48,6 @@
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#include "dart.h"
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extern int iommu_is_off;
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extern int iommu_force_on;
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/* Physical base address and size of the DART table */
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unsigned long dart_tablebase; /* exported to htab_initialize */
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static unsigned long dart_tablesize;
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@ -34,7 +34,9 @@
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#define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1))
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#define IOMMU_PAGE_ALIGN(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE)
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#ifndef __ASSEMBLY__
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/* Boot time flags */
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extern int iommu_is_off;
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extern int iommu_force_on;
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/* Pure 2^n version of get_order */
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static __inline__ __attribute_const__ int get_iommu_order(unsigned long size)
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@ -42,8 +44,6 @@ static __inline__ __attribute_const__ int get_iommu_order(unsigned long size)
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return __ilog2((size - 1) >> IOMMU_PAGE_SHIFT) + 1;
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}
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#endif /* __ASSEMBLY__ */
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/*
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* IOMAP_MAX_ORDER defines the largest contiguous block
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