ALSA: hda/cs8409: Support i2c bulk read/write functions
This allows mutex locks to be moved into i2c functions, as the bulk read/write functions can lock/unlock themselves to prevent interruption of sequence reads/writes. Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com> Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com> Link: https://lore.kernel.org/r/20210811185654.6837-17-vitalyr@opensource.cirrus.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Lucas Tanure
Takashi Iwai
Родитель
8de4e5a668
Коммит
165b81c4ac
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@ -146,7 +146,7 @@ const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
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};
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/* Vendor specific HW configuration for CS42L42 */
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const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
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const struct cs8409_i2c_param cs42l42_init_reg_seq[CS42L42_INIT_REG_SEQ_SIZE] = {
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{ 0x1010, 0xB0 },
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{ 0x1D01, 0x00 },
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{ 0x1D02, 0x06 },
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@ -206,7 +206,6 @@ const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
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{ 0x1320, 0xff },
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{ 0x1b79, 0xff },
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{ 0x1b7a, 0xff },
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{} /* Terminator */
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};
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/* Vendor specific hw configuration for CS8409 */
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@ -86,13 +86,13 @@ static void cs8409_disable_i2c_clock(struct hda_codec *codec)
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{
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struct cs8409_spec *spec = codec->spec;
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mutex_lock(&spec->cs8409_i2c_mux);
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mutex_lock(&spec->i2c_mux);
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if (spec->i2c_clck_enabled) {
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cs8409_vendor_coef_set(spec->codec, 0x0,
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cs8409_vendor_coef_get(spec->codec, 0x0) & 0xfffffff7);
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spec->i2c_clck_enabled = 0;
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}
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mutex_unlock(&spec->cs8409_i2c_mux);
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mutex_unlock(&spec->i2c_mux);
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}
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/*
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@ -195,12 +195,12 @@ static int cs8409_i2c_set_page(struct hda_codec *codec, unsigned int i2c_reg)
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* cs8409_i2c_read - CS8409 I2C Read.
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* @codec: the codec instance
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* @i2c_address: I2C Address
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* @i2c_reg: Register to read
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* @addr: Register to read
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*
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* CS8409 I2C Read.
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* Returns negative on error, otherwise returns read value in bits 0-7.
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*/
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static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg)
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static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, unsigned int addr)
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{
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struct cs8409_spec *spec = codec->spec;
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unsigned int i2c_reg_data;
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@ -209,41 +209,90 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un
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if (spec->cs42l42_suspended)
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return -EPERM;
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mutex_lock(&spec->i2c_mux);
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cs8409_enable_i2c_clock(codec);
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cs8409_set_i2c_dev_addr(codec, i2c_address);
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if (cs8409_i2c_set_page(codec, i2c_reg)) {
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if (cs8409_i2c_set_page(codec, addr)) {
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codec_err(codec, "%s() Paged Transaction Failed 0x%02x : 0x%04x\n",
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__func__, i2c_address, i2c_reg);
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__func__, i2c_address, addr);
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return -EIO;
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}
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i2c_reg_data = (i2c_reg << 8) & 0x0ffff;
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i2c_reg_data = (addr << 8) & 0x0ffff;
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cs8409_vendor_coef_set(codec, CS8409_I2C_QREAD, i2c_reg_data);
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if (cs8409_i2c_wait_complete(codec) < 0) {
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codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n",
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__func__, i2c_address, i2c_reg);
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return -EIO;
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}
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if (cs8409_i2c_wait_complete(codec) < 0)
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goto error;
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/* Register in bits 15-8 and the data in 7-0 */
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read_data = cs8409_vendor_coef_get(codec, CS8409_I2C_QREAD);
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mutex_unlock(&spec->i2c_mux);
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return read_data & 0x0ff;
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error:
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mutex_unlock(&spec->i2c_mux);
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codec_err(codec, "%s() Failed 0x%02x : 0x%04x\n", __func__, i2c_address, addr);
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return -EIO;
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}
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/**
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* cs8409_i2c_bulk_read - CS8409 I2C Read Sequence.
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* @codec: the codec instance
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* @seq: Register Sequence to read
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* @count: Number of registeres to read
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*
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* Returns negative on error, values are read into value element of cs8409_i2c_param sequence.
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*/
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static int cs8409_i2c_bulk_read(struct hda_codec *codec, unsigned int i2c_address,
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struct cs8409_i2c_param *seq, int count)
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{
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struct cs8409_spec *spec = codec->spec;
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unsigned int i2c_reg_data;
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int i;
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if (spec->cs42l42_suspended)
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return -EPERM;
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mutex_lock(&spec->i2c_mux);
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cs8409_set_i2c_dev_addr(codec, i2c_address);
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for (i = 0; i < count; i++) {
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cs8409_enable_i2c_clock(codec);
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if (cs8409_i2c_set_page(codec, seq[i].addr))
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goto error;
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i2c_reg_data = (seq[i].addr << 8) & 0x0ffff;
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cs8409_vendor_coef_set(codec, CS8409_I2C_QREAD, i2c_reg_data);
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if (cs8409_i2c_wait_complete(codec) < 0)
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goto error;
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seq[i].value = cs8409_vendor_coef_get(codec, CS8409_I2C_QREAD) & 0xff;
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}
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mutex_unlock(&spec->i2c_mux);
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return 0;
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error:
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mutex_unlock(&spec->i2c_mux);
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codec_err(codec, "I2C Bulk Write Failed 0x%02x\n", i2c_address);
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return -EIO;
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}
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/**
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* cs8409_i2c_write - CS8409 I2C Write.
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* @codec: the codec instance
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* @i2c_address: I2C Address
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* @i2c_reg: Register to write to
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* @i2c_data: Data to write
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* @addr: Register to write to
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* @value: Data to write
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*
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* CS8409 I2C Write.
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* Returns negative on error, otherwise returns 0.
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*/
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static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg,
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unsigned int i2c_data)
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static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, unsigned int addr,
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unsigned int value)
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{
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struct cs8409_spec *spec = codec->spec;
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unsigned int i2c_reg_data;
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@ -251,25 +300,73 @@ static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, u
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if (spec->cs42l42_suspended)
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return -EPERM;
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mutex_lock(&spec->i2c_mux);
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cs8409_enable_i2c_clock(codec);
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cs8409_set_i2c_dev_addr(codec, i2c_address);
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if (cs8409_i2c_set_page(codec, i2c_reg)) {
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if (cs8409_i2c_set_page(codec, addr)) {
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codec_err(codec, "%s() Paged Transaction Failed 0x%02x : 0x%04x\n",
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__func__, i2c_address, i2c_reg);
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__func__, i2c_address, addr);
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return -EIO;
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}
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i2c_reg_data = ((i2c_reg << 8) & 0x0ff00) | (i2c_data & 0x0ff);
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i2c_reg_data = ((addr << 8) & 0x0ff00) | (value & 0x0ff);
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cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg_data);
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if (cs8409_i2c_wait_complete(codec) < 0) {
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codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n",
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__func__, i2c_address, i2c_reg);
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return -EIO;
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if (cs8409_i2c_wait_complete(codec) < 0)
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goto error;
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mutex_unlock(&spec->i2c_mux);
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return 0;
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error:
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mutex_unlock(&spec->i2c_mux);
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codec_err(codec, "%s() Failed 0x%02x : 0x%04x\n", __func__, i2c_address, addr);
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return -EIO;
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}
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/**
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* cs8409_i2c_bulk_write - CS8409 I2C Write Sequence.
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* @codec: the codec instance
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* @seq: Register Sequence to write
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* @count: Number of registeres to write
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*
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* Returns negative on error.
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*/
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static int cs8409_i2c_bulk_write(struct hda_codec *codec, unsigned int i2c_address,
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const struct cs8409_i2c_param *seq, int count)
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{
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struct cs8409_spec *spec = codec->spec;
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unsigned int i2c_reg_data;
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int i;
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if (spec->cs42l42_suspended)
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return -EPERM;
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mutex_lock(&spec->i2c_mux);
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cs8409_set_i2c_dev_addr(codec, i2c_address);
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for (i = 0; i < count; i++) {
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cs8409_enable_i2c_clock(codec);
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if (cs8409_i2c_set_page(codec, seq[i].addr))
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goto error;
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i2c_reg_data = ((seq[i].addr << 8) & 0x0ff00) | (seq[i].value & 0x0ff);
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cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg_data);
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if (cs8409_i2c_wait_complete(codec) < 0)
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goto error;
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}
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mutex_unlock(&spec->i2c_mux);
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return 0;
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error:
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mutex_unlock(&spec->i2c_mux);
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codec_err(codec, "I2C Bulk Write Failed 0x%02x\n", i2c_address);
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return -EIO;
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}
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int cs8409_cs42l42_volume_info(struct snd_kcontrol *kctrl, struct snd_ctl_elem_info *uinfo)
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@ -333,7 +430,6 @@ int cs8409_cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_va
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switch (ofs) {
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case CS42L42_VOL_DAC:
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mutex_lock(&spec->cs8409_i2c_mux);
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if (chs & BIT(0)) {
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spec->vol[ofs] = *valp;
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cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS8409_CS42L42_REG_HS_VOL_CHA,
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@ -346,16 +442,13 @@ int cs8409_cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_va
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cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS8409_CS42L42_REG_HS_VOL_CHB,
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-(spec->vol[ofs]) & CS8409_CS42L42_REG_HS_VOL_MASK);
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}
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mutex_unlock(&spec->cs8409_i2c_mux);
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break;
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case CS42L42_VOL_ADC:
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mutex_lock(&spec->cs8409_i2c_mux);
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if (chs & BIT(0)) {
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spec->vol[ofs] = *valp;
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cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS8409_CS42L42_REG_AMIC_VOL,
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spec->vol[ofs] & CS8409_CS42L42_REG_AMIC_VOL_MASK);
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}
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mutex_unlock(&spec->cs8409_i2c_mux);
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break;
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default:
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break;
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@ -368,6 +461,12 @@ int cs8409_cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_va
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static void cs8409_cs42l42_reset(struct hda_codec *codec)
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{
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struct cs8409_spec *spec = codec->spec;
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struct cs8409_i2c_param irq_regs[] = {
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{ 0x1308, 0x00 },
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{ 0x1309, 0x00 },
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{ 0x130A, 0x00 },
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{ 0x130F, 0x00 },
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};
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/* Assert RTS# line */
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snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0);
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@ -381,25 +480,13 @@ static void cs8409_cs42l42_reset(struct hda_codec *codec)
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spec->cs42l42_suspended = 0;
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spec->last_page = 0;
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mutex_lock(&spec->cs8409_i2c_mux);
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/* Clear interrupts, by reading interrupt status registers */
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cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308);
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cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1309);
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cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130A);
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cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130F);
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mutex_unlock(&spec->cs8409_i2c_mux);
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cs8409_i2c_bulk_read(codec, CS42L42_I2C_ADDR, irq_regs, ARRAY_SIZE(irq_regs));
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}
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/* Configure CS42L42 slave codec for jack autodetect */
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static void cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec)
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{
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struct cs8409_spec *spec = codec->spec;
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mutex_lock(&spec->cs8409_i2c_mux);
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/* Set TIP_SENSE_EN for analog front-end of tip sense.
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* Additionally set HSBIAS_SENSE_EN for some variants.
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*/
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@ -418,17 +505,11 @@ static void cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec)
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cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f);
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/* Enable interrupt */
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cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xF3);
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mutex_unlock(&spec->cs8409_i2c_mux);
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}
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/* Enable and run CS42L42 slave codec jack auto detect */
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static void cs8409_cs42l42_run_jack_detect(struct hda_codec *codec)
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{
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struct cs8409_spec *spec = codec->spec;
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mutex_lock(&spec->cs8409_i2c_mux);
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/* Clear interrupts */
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cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308);
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cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b77);
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@ -447,22 +528,6 @@ static void cs8409_cs42l42_run_jack_detect(struct hda_codec *codec)
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/* Wait ~10ms */
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usleep_range(10000, 25000);
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mutex_unlock(&spec->cs8409_i2c_mux);
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}
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static void cs8409_cs42l42_reg_setup(struct hda_codec *codec)
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{
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const struct cs8409_i2c_param *seq = cs42l42_init_reg_seq;
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struct cs8409_spec *spec = codec->spec;
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mutex_lock(&spec->cs8409_i2c_mux);
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for (; seq->addr; seq++)
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cs8409_i2c_write(codec, CS42L42_I2C_ADDR, seq->addr, seq->reg);
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mutex_unlock(&spec->cs8409_i2c_mux);
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}
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/*
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@ -490,15 +555,11 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res)
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if (res & CS8409_CS42L42_INT)
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return;
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mutex_lock(&spec->cs8409_i2c_mux);
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/* Read jack detect status registers */
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reg_cdc_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308);
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reg_hs_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1124);
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reg_ts_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f);
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mutex_unlock(&spec->cs8409_i2c_mux);
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/* If status values are < 0, read error has occurred. */
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if (reg_cdc_status < 0 || reg_hs_status < 0 || reg_ts_status < 0)
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return;
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@ -506,10 +567,8 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res)
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/* HSDET_AUTO_DONE */
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if (reg_cdc_status & CS42L42_HSDET_AUTO_DONE) {
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mutex_lock(&spec->cs8409_i2c_mux);
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/* Disable HSDET_AUTO_DONE */
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cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x131b, 0xFF);
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mutex_unlock(&spec->cs8409_i2c_mux);
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type = ((reg_hs_status & CS42L42_HSTYPE_MASK) + 1);
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/* CS42L42 reports optical jack as type 4
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@ -533,10 +592,8 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res)
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}
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}
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mutex_lock(&spec->cs8409_i2c_mux);
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/* Re-Enable Tip Sense Interrupt */
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cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xF3);
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mutex_unlock(&spec->cs8409_i2c_mux);
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} else {
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/* TIP_SENSE INSERT/REMOVE */
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@ -600,10 +657,8 @@ static int cs8409_suspend(struct hda_codec *codec)
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cs8409_enable_ur(codec, 0);
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||||
mutex_lock(&spec->cs8409_i2c_mux);
|
||||
/* Power down CS42L42 ASP/EQ/MIX/HP */
|
||||
cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1101, 0xfe);
|
||||
mutex_unlock(&spec->cs8409_i2c_mux);
|
||||
|
||||
spec->cs42l42_suspended = 1;
|
||||
|
||||
|
|
@ -660,26 +715,23 @@ static void cs8409_cs42l42_hw_init(struct hda_codec *codec)
|
|||
cs8409_cs42l42_reset(codec);
|
||||
|
||||
/* Initialise CS42L42 companion codec */
|
||||
cs8409_cs42l42_reg_setup(codec);
|
||||
cs8409_i2c_bulk_write(codec, CS42L42_I2C_ADDR, cs42l42_init_reg_seq,
|
||||
CS42L42_INIT_REG_SEQ_SIZE);
|
||||
|
||||
if (codec->fixup_id == CS8409_WARLOCK || codec->fixup_id == CS8409_CYBORG) {
|
||||
/* FULL_SCALE_VOL = 0 for Warlock / Cyborg */
|
||||
mutex_lock(&spec->cs8409_i2c_mux);
|
||||
cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x2001, 0x01);
|
||||
mutex_unlock(&spec->cs8409_i2c_mux);
|
||||
/* DMIC1_MO=00b, DMIC1/2_SR=1 */
|
||||
cs8409_vendor_coef_set(codec, 0x09, 0x0003);
|
||||
}
|
||||
|
||||
/* Restore Volumes after Resume */
|
||||
mutex_lock(&spec->cs8409_i2c_mux);
|
||||
cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS8409_CS42L42_REG_HS_VOL_CHA,
|
||||
-(spec->vol[1]) & CS8409_CS42L42_REG_HS_VOL_MASK);
|
||||
cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS8409_CS42L42_REG_HS_VOL_CHB,
|
||||
-(spec->vol[2]) & CS8409_CS42L42_REG_HS_VOL_MASK);
|
||||
cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS8409_CS42L42_REG_AMIC_VOL,
|
||||
spec->vol[0] & CS8409_CS42L42_REG_AMIC_VOL_MASK);
|
||||
mutex_unlock(&spec->cs8409_i2c_mux);
|
||||
|
||||
cs8409_cs42l42_enable_jack_detect(codec);
|
||||
|
||||
|
|
@ -768,7 +820,7 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix,
|
|||
spec->exec_verb = codec->core.exec_verb;
|
||||
codec->core.exec_verb = cs8409_cs42l42_exec_verb;
|
||||
|
||||
mutex_init(&spec->cs8409_i2c_mux);
|
||||
mutex_init(&spec->i2c_mux);
|
||||
|
||||
codec->patch_ops = cs8409_cs42l42_patch_ops;
|
||||
|
||||
|
|
|
|||
|
|
@ -243,6 +243,8 @@ enum cs8409_coefficient_index_registers {
|
|||
#define CS8409_CS42L42_DMIC_PIN_NID CS8409_PIN_DMIC1_IN
|
||||
#define CS8409_CS42L42_DMIC_ADC_PIN_NID CS8409_PIN_DMIC1
|
||||
|
||||
#define CS42L42_INIT_REG_SEQ_SIZE 59
|
||||
|
||||
enum {
|
||||
CS8409_BULLSEYE,
|
||||
CS8409_WARLOCK,
|
||||
|
|
@ -257,7 +259,7 @@ enum {
|
|||
|
||||
struct cs8409_i2c_param {
|
||||
unsigned int addr;
|
||||
unsigned int reg;
|
||||
unsigned int value;
|
||||
};
|
||||
|
||||
struct cs8409_cir_param {
|
||||
|
|
@ -279,7 +281,7 @@ struct cs8409_spec {
|
|||
unsigned int cs42l42_suspended:1;
|
||||
s8 vol[CS42L42_VOLUMES];
|
||||
|
||||
struct mutex cs8409_i2c_mux;
|
||||
struct mutex i2c_mux;
|
||||
unsigned int i2c_clck_enabled;
|
||||
unsigned int dev_addr;
|
||||
struct delayed_work i2c_clk_work;
|
||||
|
|
@ -303,7 +305,7 @@ extern const struct hda_model_fixup cs8409_models[];
|
|||
extern const struct hda_fixup cs8409_fixups[];
|
||||
extern const struct hda_verb cs8409_cs42l42_init_verbs[];
|
||||
extern const struct hda_pintbl cs8409_cs42l42_pincfgs[];
|
||||
extern const struct cs8409_i2c_param cs42l42_init_reg_seq[];
|
||||
extern const struct cs8409_i2c_param cs42l42_init_reg_seq[CS42L42_INIT_REG_SEQ_SIZE];
|
||||
extern const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[];
|
||||
extern const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[];
|
||||
|
||||
|
|
|
|||
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